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Posted to commits@nuttx.apache.org by an...@apache.org on 2021/05/07 21:39:21 UTC
[incubator-nuttx] branch master updated (90a4e8d -> 17b7863)
This is an automated email from the ASF dual-hosted git repository.
antmerlino pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 90a4e8d risc-v/esp32c3: Fix DMA channels' interrupt IDs
new c45e03b stm32f7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency
new 3e49d49 stm32h7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency
new 17b7863 stm32:SDIO:Use 250 Ms Data path timeout, regardless of Card Clock frequency
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/stm32/stm32_sdio.c | 47 ++++++++++++++++++++-------
arch/arm/src/stm32f7/stm32_sdmmc.c | 60 +++++++++++++++++++++++++++--------
arch/arm/src/stm32h7/stm32_sdmmc.c | 65 +++++++++++++++++++++++++++++---------
3 files changed, 131 insertions(+), 41 deletions(-)
[incubator-nuttx] 01/03: stm32f7:SDMMC:Use 250 Ms Data path timeout,
regardless of Card Clock frequency
Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
antmerlino pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit c45e03b75f4f5b099cbc2a455f4b2f2c5ee1b904
Author: David Sidrane <Da...@NscDg.com>
AuthorDate: Wed May 5 12:26:29 2021 -0700
stm32f7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency
---
arch/arm/src/stm32f7/stm32_sdmmc.c | 60 +++++++++++++++++++++++++++++---------
1 file changed, 46 insertions(+), 14 deletions(-)
diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.c b/arch/arm/src/stm32f7/stm32_sdmmc.c
index 047210e..1ce89cc 100644
--- a/arch/arm/src/stm32f7/stm32_sdmmc.c
+++ b/arch/arm/src/stm32f7/stm32_sdmmc.c
@@ -49,6 +49,7 @@
#include "stm32_dtcm.h"
#include "stm32_dma.h"
#include "stm32_gpio.h"
+#include "stm32_rcc.h"
#include "stm32_sdmmc.h"
#if defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2)
@@ -130,6 +131,11 @@
# else
# undef CONFIG_STM32F7_SDMMC1_DMAPRIO
# endif
+# if STM32_RCC_DCKCFGR2_SDMMCSRC == RCC_DCKCFGR2_SDMMCSEL_48MHZ
+# define STM32_SDMMC1_CLK UINT32_C(48000000)
+# else
+# define STM32_SDMMC1_CLK STM32_SYSCLK_FREQUENCY
+# endif
#endif
#ifdef CONFIG_STM32F7_SDMMC2
@@ -143,6 +149,11 @@
# else
# undef CONFIG_STM32F7_SDMMC2_DMAPRIO
# endif
+# if STM32_RCC_DCKCFGR2_SDMMCSRC == RCC_DCKCFGR2_SDMMCSEL_48MHZ
+# define STM32_SDMMC2_CLK UINT32_C(48000000)
+# else
+# define STM32_SDMMC2_CLK STM32_SYSCLK_FREQUENCY
+# endif
#endif
#undef HAVE_SDMMC_SDIO_MODE
@@ -214,9 +225,9 @@
#define SDMMC_CMDTIMEOUT (100000)
#define SDMMC_LONGTIMEOUT (0x7fffffff)
-/* Big DTIMER setting */
+/* DTIMER setting */
-#define SDMMC_DTIMER_DATATIMEOUT (0x003d0900) /* 250 ms @ 16 MHz */
+#define SDMMC_DTIMER_DATATIMEOUT_MS 250
/* DMA channel/stream configuration register settings. The following
* must be selected. The DMA driver will select the remaining fields.
@@ -368,6 +379,7 @@ struct stm32_dev_s
uint32_t base;
int nirq;
+ uint32_t sdio_clk;
#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
uint32_t d0_gpio;
#endif
@@ -625,6 +637,7 @@ struct stm32_dev_s g_sdmmcdev1 =
},
.base = STM32_SDMMC1_BASE,
.nirq = STM32_IRQ_SDMMC1,
+ .sdio_clk = STM32_SDMMC1_CLK,
#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
.d0_gpio = SDMMC1_SDIO_PULL(GPIO_SDMMC1_D0),
#endif
@@ -684,6 +697,7 @@ struct stm32_dev_s g_sdmmcdev2 =
},
.base = STM32_SDMMC2_BASE,
.nirq = STM32_IRQ_SDMMC2,
+ .sdio_clk = STM32_SDMMC2_CLK,
#ifdef CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE
.d0_gpio = SDMMC2_SDIO_PULL(GPIO_SDMMC2_D0),
#endif
@@ -1223,9 +1237,26 @@ static uint8_t stm32_log2(uint16_t value)
static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
uint32_t dlen, uint32_t dctrl)
{
- uint32_t regval = 0;
+ uint32_t clkdiv;
+ uint32_t regval;
+ uint32_t sdio_clk = priv->sdio_clk;
+
+ /* Enable data path using a timeout scaled to the SD_CLOCK (the card
+ * clock).
+ */
- /* Enable data path */
+ regval = sdmmc_getreg32(priv, STM32_SDMMC_CLKCR_OFFSET);
+ clkdiv = (regval & STM32_SDMMC_CLKCR_CLKDIV_MASK) >>
+ STM32_SDMMC_CLKCR_CLKDIV_SHIFT;
+
+ if ((regval & STM32_SDMMC_CLKCR_BYPASS) == 0)
+ {
+ sdio_clk = sdio_clk / (2 + clkdiv);
+ }
+
+ /* Convert Timeout in Ms to SD_CLK counts */
+
+ timeout = timeout * (sdio_clk / 1000);
sdmmc_putreg32(priv, timeout, STM32_SDMMC_DTIMER_OFFSET); /* Set DTIMER */
sdmmc_putreg32(priv, dlen, STM32_SDMMC_DLEN_OFFSET); /* Set DLEN */
@@ -1271,8 +1302,11 @@ static void stm32_datadisable(struct stm32_dev_s *priv)
/* Reset DTIMER */
- sdmmc_putreg32(priv, SDMMC_DTIMER_DATATIMEOUT, STM32_SDMMC_DTIMER_OFFSET);
- sdmmc_putreg32(priv, 0, STM32_SDMMC_DLEN_OFFSET); /* Reset DLEN */
+ sdmmc_putreg32(priv, UINT32_MAX, STM32_SDMMC_DTIMER_OFFSET);
+
+ /* Reset DLEN */
+
+ sdmmc_putreg32(priv, 0, STM32_SDMMC_DLEN_OFFSET);
/* Reset DCTRL DTEN, DTDIR, DTMODE, DMAEN, and DBLOCKSIZE fields */
@@ -2254,8 +2288,8 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
dblksize = stm32_log2(priv->blocksize) <<
STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((nbytes + 511) >> 9),
- nbytes, dblksize | STM32_SDMMC_DCTRL_DTDIR);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, nbytes,
+ dblksize | STM32_SDMMC_DCTRL_DTDIR);
/* And enable interrupts */
@@ -2310,8 +2344,7 @@ static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const
dblksize = stm32_log2(priv->blocksize) <<
STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((nbytes + 511) >> 9),
- nbytes, dblksize);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, nbytes, dblksize);
/* Enable TX interrupts */
@@ -3061,8 +3094,8 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
dblksize = stm32_log2(priv->blocksize) <<
STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((buflen + 511) >> 9),
- buflen, dblksize | STM32_SDMMC_DCTRL_DTDIR);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, buflen,
+ dblksize | STM32_SDMMC_DCTRL_DTDIR);
/* Configure the RX DMA */
@@ -3165,8 +3198,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
dblksize = stm32_log2(priv->blocksize) <<
STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT;
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((buflen + 511) >> 9),
- buflen, dblksize);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, buflen, dblksize);
/* Configure the TX DMA */
[incubator-nuttx] 02/03: stm32h7:SDMMC:Use 250 Ms Data path timeout,
regardless of Card Clock frequency
Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
antmerlino pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 3e49d49cd950699d2b6358b11f51b5d633cfc0a8
Author: David Sidrane <Da...@NscDg.com>
AuthorDate: Thu May 6 09:17:57 2021 -0700
stm32h7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency
---
arch/arm/src/stm32h7/stm32_sdmmc.c | 65 +++++++++++++++++++++++++++++---------
1 file changed, 50 insertions(+), 15 deletions(-)
diff --git a/arch/arm/src/stm32h7/stm32_sdmmc.c b/arch/arm/src/stm32h7/stm32_sdmmc.c
index 37a021b..c813eb8 100644
--- a/arch/arm/src/stm32h7/stm32_sdmmc.c
+++ b/arch/arm/src/stm32h7/stm32_sdmmc.c
@@ -167,7 +167,21 @@
#define FIFO_SIZE_IN_BYTES 64
-/* Friendly CLKCR bit re-definitions ****************************************/
+/* Friendly Clock source & CLKCR bit re-definitions *************************/
+
+/* If not set in board use default pll1_q_ck clock is selected as
+ * kernel peripheral clock (default after reset)
+ */
+
+#if !defined(STM32_RCC_D1CCIPR_SDMMCSEL)
+# define STM32_RCC_D1CCIPR_SDMMCSEL RCC_D1CCIPR_SDMMC_PLL1
+#endif
+
+#if STM32_RCC_D1CCIPR_SDMMCSEL == RCC_D1CCIPR_SDMMC_PLL1
+# define STM32_SDMMC_CLK STM32_PLL1Q_FREQUENCY
+#else
+# define STM32_SDMMC_CLK STM32_PLL2R_FREQUENCY
+#endif
#define STM32_CLKCR_RISINGEDGE (0)
#define STM32_CLKCR_FALLINGEDGE STM32_SDMMC_CLKCR_NEGEDGE
@@ -208,9 +222,9 @@
#define SDMMC_CMDTIMEOUT (100000)
#define SDMMC_LONGTIMEOUT (0x7fffffff)
-/* Big DTIMER setting */
+/* DTIMER setting */
-#define SDMMC_DTIMER_DATATIMEOUT (6250000) /* 250 ms @ 25 MHz */
+#define SDMMC_DTIMER_DATATIMEOUT_MS 250
/* Block size for multi-block transfers */
@@ -1080,7 +1094,10 @@ static uint8_t stm32_log2(uint16_t value)
static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
uint32_t dlen, bool receive)
{
- uint32_t dctrl = 0;
+ uint32_t clkdiv;
+ uint32_t regval;
+ uint32_t dctrl;
+ uint32_t sdio_clk = STM32_SDMMC_CLK;
DEBUGASSERT((sdmmc_getreg32(priv, STM32_SDMMC_IDMACTRLR_OFFSET) &
STM32_SDMMC_IDMACTRLR_IDMAEN) == 0);
@@ -1140,7 +1157,26 @@ static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
/* Enable data path */
- /* Set DTIMER */
+ /* Set DTIMER
+ *
+ * Enable data path using a timeout scaled to the SD_CLOCK (the card
+ * clock).
+ */
+
+ regval = sdmmc_getreg32(priv, STM32_SDMMC_CLKCR_OFFSET);
+ clkdiv = (regval & STM32_SDMMC_CLKCR_CLKDIV_MASK) >>
+ STM32_SDMMC_CLKCR_CLKDIV_SHIFT;
+
+ /* CLKDIV_ of 0x000: is Bypass */
+
+ if (clkdiv != 0)
+ {
+ sdio_clk = sdio_clk / (2 * clkdiv);
+ }
+
+ /* Convert Timeout in Ms to SD_CLK counts */
+
+ timeout = timeout * (sdio_clk / 1000);
sdmmc_putreg32(priv, timeout, STM32_SDMMC_DTIMER_OFFSET);
@@ -1174,8 +1210,11 @@ static void stm32_datadisable(struct stm32_dev_s *priv)
/* Reset DTIMER */
- sdmmc_putreg32(priv, SDMMC_DTIMER_DATATIMEOUT, STM32_SDMMC_DTIMER_OFFSET);
- sdmmc_putreg32(priv, 0, STM32_SDMMC_DLEN_OFFSET); /* Reset DLEN */
+ sdmmc_putreg32(priv, UINT32_MAX, STM32_SDMMC_DTIMER_OFFSET);
+
+ /* Reset DLEN */
+
+ sdmmc_putreg32(priv, 0, STM32_SDMMC_DLEN_OFFSET);
/* Reset DCTRL DTEN, DTDIR, DTMODE, and DBLOCKSIZE fields */
@@ -2305,8 +2344,7 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
/* Then set up the SDIO data path */
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((nbytes + 511) >> 9),
- nbytes, true);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, nbytes, true);
/* Workaround the FIFO data available issue */
@@ -2380,8 +2418,7 @@ static int stm32_sendsetup(FAR struct sdio_dev_s *dev, FAR const
/* Then set up the SDIO data path */
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((nbytes + 511) >> 9),
- nbytes, false);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, nbytes, false);
/* Enable TX interrupts */
@@ -3163,8 +3200,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
/* Then set up the SDIO data path */
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((buflen + 511) >> 9),
- buflen, true);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, buflen, true);
/* Configure the RX DMA */
@@ -3255,8 +3291,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
/* Then set up the SDIO data path */
- stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT * ((buflen + 511) >> 9),
- buflen, false);
+ stm32_dataconfig(priv, SDMMC_DTIMER_DATATIMEOUT_MS, buflen, false);
/* Configure the TX DMA */
[incubator-nuttx] 03/03: stm32:SDIO:Use 250 Ms Data path timeout,
regardless of Card Clock frequency
Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
antmerlino pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 17b786399cc271af02c837a0b69ffe3c17509b11
Author: David Sidrane <Da...@NscDg.com>
AuthorDate: Thu May 6 09:24:31 2021 -0700
stm32:SDIO:Use 250 Ms Data path timeout, regardless of Card Clock frequency
---
arch/arm/src/stm32/stm32_sdio.c | 47 ++++++++++++++++++++++++++++++-----------
1 file changed, 35 insertions(+), 12 deletions(-)
diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c
index 898e32b..5c78d79 100644
--- a/arch/arm/src/stm32/stm32_sdio.c
+++ b/arch/arm/src/stm32/stm32_sdio.c
@@ -153,7 +153,7 @@
# define SDIO_CLKCR_EDGE SDIO_CLKCR_RISINGEDGE
#endif
-/* Mode dependent settings. These depend on clock devisor settings that must
+/* Mode dependent settings. These depend on clock divisor settings that must
* be defined in the board-specific board.h header file: SDIO_INIT_CLKDIV,
* SDIO_MMCXFR_CLKDIV, and SDIO_SDXFR_CLKDIV.
*/
@@ -172,9 +172,12 @@
#define SDIO_CMDTIMEOUT (100000)
#define SDIO_LONGTIMEOUT (0x7fffffff)
-/* Big DTIMER setting */
+/* DTIMER setting */
-#define SDIO_DTIMER_DATATIMEOUT (0x000fffff)
+/* Assuming Max timeout in bypass 48 Mhz */
+
+#define IP_CLCK_FREQ UINT32_C(48000000)
+#define SDIO_DTIMER_DATATIMEOUT_MS 250
/* DMA channel/stream configuration register settings. The following
* must be selected. The DMA driver will select the remaining fields.
@@ -1016,9 +1019,24 @@ static uint8_t stm32_log2(uint16_t value)
static void stm32_dataconfig(uint32_t timeout, uint32_t dlen, uint32_t dctrl)
{
- uint32_t regval = 0;
+ uint32_t clkdiv;
+ uint32_t regval;
+ uint32_t sdio_clk = IP_CLCK_FREQ;
+
+ /* Enable data path using a timeout scaled to the SD_CLOCK (the card
+ * clock).
+ */
- /* Enable data path */
+ regval = getreg32(STM32_SDIO_CLKCR);
+ clkdiv = (regval & SDIO_CLKCR_CLKDIV_MASK) >> SDIO_CLKCR_CLKDIV_SHIFT;
+ if ((regval & SDIO_CLKCR_BYPASS) == 0)
+ {
+ sdio_clk = sdio_clk / (2 + clkdiv);
+ }
+
+ /* Convert Timeout in Ms to SD_CLK counts */
+
+ timeout = timeout * (sdio_clk / 1000);
putreg32(timeout, STM32_SDIO_DTIMER); /* Set DTIMER */
putreg32(dlen, STM32_SDIO_DLEN); /* Set DLEN */
@@ -1049,10 +1067,15 @@ static void stm32_datadisable(void)
{
uint32_t regval;
- /* Disable the data path */
+ /* Disable the data path */
+
+ /* Reset DTIMER */
+
+ putreg32(UINT32_MAX, STM32_SDIO_DTIMER);
+
+ /* Reset DLEN */
- putreg32(SDIO_DTIMER_DATATIMEOUT, STM32_SDIO_DTIMER); /* Reset DTIMER */
- putreg32(0, STM32_SDIO_DLEN); /* Reset DLEN */
+ putreg32(0, STM32_SDIO_DLEN);
/* Reset DCTRL DTEN, DTDIR, DTMODE, DMAEN, and DBLOCKSIZE fields */
@@ -1992,7 +2015,7 @@ static int stm32_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
dblocksize = stm32_log2(nbytes) << SDIO_DCTRL_DBLOCKSIZE_SHIFT;
}
- stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT, nbytes,
+ stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT_MS, nbytes,
dblocksize | SDIO_DCTRL_DTDIR);
/* And enable interrupts */
@@ -2057,7 +2080,7 @@ static int stm32_sendsetup(FAR struct sdio_dev_s *dev,
dblocksize = stm32_log2(nbytes) << SDIO_DCTRL_DBLOCKSIZE_SHIFT;
}
- stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT, nbytes, dblocksize);
+ stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT_MS, nbytes, dblocksize);
/* Enable TX interrupts */
@@ -2800,7 +2823,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
dblocksize = stm32_log2(buflen) << SDIO_DCTRL_DBLOCKSIZE_SHIFT;
}
- stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT, buflen,
+ stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT_MS, buflen,
dblocksize | SDIO_DCTRL_DTDIR);
/* Configure the RX DMA */
@@ -2880,7 +2903,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
dblocksize = stm32_log2(buflen) << SDIO_DCTRL_DBLOCKSIZE_SHIFT;
}
- stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT, buflen, dblocksize);
+ stm32_dataconfig(SDIO_DTIMER_DATATIMEOUT_MS, buflen, dblocksize);
/* Configure the TX DMA */