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Posted to commits@mynewt.apache.org by je...@apache.org on 2021/10/26 17:04:17 UTC

[mynewt-core] 06/10: hw/ipc_nrf5340: Configure shared memory in APP core only

This is an automated email from the ASF dual-hosted git repository.

jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit 19a9df8ae41b10db84d915421b59eddf50238a83
Author: Jerzy Kasenberg <je...@codecoup.pl>
AuthorDate: Wed Oct 20 12:17:11 2021 +0200

    hw/ipc_nrf5340: Configure shared memory in APP core only
    
    So far number of channels and size of memory buffers used for shared
    memory had to be set to same value at compile time for NET and APP
    core. Failure to keep value the same could result in hard to solve
    IPC issues.
    
    This leaves configuration of IPC memory in application only (it is
    part of application RAM that is used for this any way).
    
    It also changes how parameters about SHM (and for vflash) are passed to
    network core.
    For IPC hard-coded .ipc section was used in linker scripts (both cores).
    For net core image NRF_IPC->MEMGP was used.
    
    Now NRF_IPC->MEMGP is used to pass shared data (ipc_shared) to net core.
    It will be used by ipc_nrf5340 driver and by vflash driver on net core.
---
 hw/bsp/nordic_pca10095_net/nrf5340_net.ld          |  1 -
 .../include/ipc_nrf5340/ipc_nrf5340_priv.h}        | 36 ++++++++++++++----
 hw/drivers/ipc_nrf5340/src/ipc_nrf5340.c           | 43 ++++++++++++++++++----
 hw/mcu/nordic/nrf5340/nrf5340.ld                   |  8 ----
 hw/mcu/nordic/nrf5340_net/nrf5340_net.ld           |  6 ---
 hw/mcu/nordic/nrf5340_net/src/hal_vflash.c         |  8 +++-
 6 files changed, 70 insertions(+), 32 deletions(-)

diff --git a/hw/bsp/nordic_pca10095_net/nrf5340_net.ld b/hw/bsp/nordic_pca10095_net/nrf5340_net.ld
index 5327829..0737752 100644
--- a/hw/bsp/nordic_pca10095_net/nrf5340_net.ld
+++ b/hw/bsp/nordic_pca10095_net/nrf5340_net.ld
@@ -20,7 +20,6 @@ MEMORY
 {
   FLASH (rx) : ORIGIN = 0x01008000, LENGTH = 0x30000
   RAM (rwx) : ORIGIN = 0x21000000, LENGTH = 0x10000
-  IPC (rw)  : ORIGIN = 0x20000400, LENGTH = 0x40000
 }
 
 /* This linker script is used for images and thus contains an image header */
diff --git a/hw/bsp/nordic_pca10095_net/nrf5340_net.ld b/hw/drivers/ipc_nrf5340/include/ipc_nrf5340/ipc_nrf5340_priv.h
similarity index 53%
copy from hw/bsp/nordic_pca10095_net/nrf5340_net.ld
copy to hw/drivers/ipc_nrf5340/include/ipc_nrf5340/ipc_nrf5340_priv.h
index 5327829..c1d2e82 100644
--- a/hw/bsp/nordic_pca10095_net/nrf5340_net.ld
+++ b/hw/drivers/ipc_nrf5340/include/ipc_nrf5340/ipc_nrf5340_priv.h
@@ -16,12 +16,34 @@
  * specific language governing permissions and limitations
  * under the License.
  */
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x01008000, LENGTH = 0x30000
-  RAM (rwx) : ORIGIN = 0x21000000, LENGTH = 0x10000
-  IPC (rw)  : ORIGIN = 0x20000400, LENGTH = 0x40000
+
+#ifndef _HW_DRIVERS_IPC_NRF5340_PRIV_H
+#define _HW_DRIVERS_IPC_NRF5340_PRIV_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Initialization structure passed from APP core to NET core.
+ * Keeps various parameters that otherwise should be configured on
+ * both sides.
+ */
+struct ipc_shared {
+    /** NET core embedded image address in application flash */
+    void *net_core_image_address;
+    /** NET core embedded image size */
+    uint32_t net_core_image_size;
+    /** Number of IPC channels */
+    uint8_t ipc_channel_count;
+    /* Array of shared memories used for IPC */
+    struct ipc_shm *ipc_shms;
+};
+
+#ifdef __cplusplus
 }
+#endif
 
-/* This linker script is used for images and thus contains an image header */
-_imghdr_size = 0x20;
+#endif /* _HW_DRIVERS_IPC_NRF5340_PRIV_H */
diff --git a/hw/drivers/ipc_nrf5340/src/ipc_nrf5340.c b/hw/drivers/ipc_nrf5340/src/ipc_nrf5340.c
index bb3ae04..e28fbf2 100644
--- a/hw/drivers/ipc_nrf5340/src/ipc_nrf5340.c
+++ b/hw/drivers/ipc_nrf5340/src/ipc_nrf5340.c
@@ -20,6 +20,7 @@
 #include <errno.h>
 #include <os/os.h>
 #include <ipc_nrf5340/ipc_nrf5340.h>
+#include <ipc_nrf5340/ipc_nrf5340_priv.h>
 #include <nrfx.h>
 #if MYNEWT_VAL(IPC_NRF5340_NET_GPIO)
 #include <mcu/nrf5340_hal.h>
@@ -52,11 +53,24 @@ struct ipc_channel {
 struct ipc_shm {
     volatile uint16_t head;
     volatile uint16_t tail;
-    uint8_t buf[IPC_BUF_SIZE];
+    uint16_t buf_size;
+    uint8_t *buf;
 };
 
 static struct ipc_channel ipcs[IPC_MAX_CHANS];
-static struct ipc_shm __attribute__((section (".ipc"))) shms[IPC_MAX_CHANS];
+#if MYNEWT_VAL(MCU_APP_CORE)
+static struct ipc_shm shms[IPC_MAX_CHANS];
+static uint8_t shms_bufs[IPC_MAX_CHANS][IPC_BUF_SIZE];
+static struct ipc_shared ipc_shared[1];
+
+#else
+static struct ipc_shm *shms;
+static struct ipc_shared *ipc_shared;
+#undef IPC_MAX_CHANS
+#undef IPC_BUF_SIZE
+#define IPC_MAX_CHANS ipc_shared->ipc_channel_count
+#define IPC_BUF_SIZE ipc_shared->ipc_shms->buf_size
+#endif
 
 static uint16_t
 ipc_nrf5340_shm_get_data_length(uint16_t head, uint16_t tail)
@@ -181,9 +195,10 @@ ipc_nrf5340_init_nrf_ipc(void)
 void
 ipc_nrf5340_init(void)
 {
-#if MYNEWT_VAL(IPC_NRF5340_NET_GPIO)
     int i;
 
+#if MYNEWT_VAL(IPC_NRF5340_NET_GPIO)
+
     unsigned int gpios[] = { UNMANGLE_MYNEWT_VAL(MYNEWT_VAL(IPC_NRF5340_NET_GPIO)) };
     NRF_GPIO_Type *nrf_gpio;
 #endif
@@ -191,12 +206,12 @@ ipc_nrf5340_init(void)
 #if MYNEWT_VAL(NRF5340_EMBED_NET_CORE)
     /*
      * Get network core image size and placement in application flash.
-     * Then pass those two values in NRF_IPC GPMEM registers to be used
+     * Then pass those two values to ipc_shared data to be used
      * by virtual flash driver on network side.
      */
     if (&_binary_net_core_img_end - &_binary_net_core_img_start > 32) {
-        NRF_IPC->GPMEM[0] = (uint32_t)&_binary_net_core_img_start;
-        NRF_IPC->GPMEM[1] = &_binary_net_core_img_end - &_binary_net_core_img_start;
+        ipc_shared->net_core_image_address = (void *)&_binary_net_core_img_start;
+        ipc_shared->net_core_image_size = &_binary_net_core_img_end - &_binary_net_core_img_start;
     }
 #endif
 
@@ -204,6 +219,15 @@ ipc_nrf5340_init(void)
     NRF_RESET_S->NETWORK.FORCEOFF = RESET_NETWORK_FORCEOFF_FORCEOFF_Hold;
     memset(shms, 0, sizeof(shms));
 
+    for (i = 0; i < IPC_MAX_CHANS; ++i) {
+        shms[i].buf = shms_bufs[i];
+        shms[i].buf_size = IPC_BUF_SIZE;
+    }
+    ipc_shared->ipc_channel_count = IPC_MAX_CHANS;
+    ipc_shared->ipc_shms = shms;
+
+    NRF_IPC->GPMEM[0] = (uint32_t)ipc_shared;
+
 #if MYNEWT_VAL(IPC_NRF5340_NET_GPIO)
     /* Configure GPIOs for Networking Core */
     for (i = 0; i < ARRAY_SIZE(gpios); i++) {
@@ -236,7 +260,7 @@ ipc_nrf5340_init(void)
          * Application side prepared image for net core.
          * When net core starts it's ipc_nrf5340_init() will clear those.
          */
-        while (NRF_IPC->GPMEM[1]);
+        while (NRF_IPC->GPMEM[0]);
     }
 #endif
 }
@@ -254,8 +278,11 @@ ipc_nrf5340_init(void)
      */
 #define NRF_APP_IPC_NS                  ((NRF_IPC_Type *)0x4002A000)
 #define NRF_APP_IPC_S                   ((NRF_IPC_Type *)0x5002A000)
+    ipc_shared = (struct ipc_shared *)NRF_APP_IPC_S->GPMEM[0];
+    assert(ipc_shared);
+    shms = ipc_shared->ipc_shms;
+    assert(ipc_shared->ipc_channel_count <= ARRAY_SIZE(ipcs));
     NRF_APP_IPC_S->GPMEM[0] = 0;
-    NRF_APP_IPC_S->GPMEM[1] = 0;
 
     ipc_nrf5340_init_nrf_ipc();
 }
diff --git a/hw/mcu/nordic/nrf5340/nrf5340.ld b/hw/mcu/nordic/nrf5340/nrf5340.ld
index 25ce143..ca11f17 100644
--- a/hw/mcu/nordic/nrf5340/nrf5340.ld
+++ b/hw/mcu/nordic/nrf5340/nrf5340.ld
@@ -137,14 +137,6 @@ SECTIONS
         . = ALIGN(4);
     } > RAM
 
-    /* Section for app-net cores IPC */
-    .ipc 0x20000400 (NOLOAD):
-    {
-        . = ALIGN(4);
-        *(.ipc)
-        . = ALIGN(4);
-    } > RAM
-
     /* This section will be zeroed by RTT package init */
     .rtt (NOLOAD):
     {
diff --git a/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld b/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld
index 9a64264..f3f8b4c 100644
--- a/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld
+++ b/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld
@@ -130,12 +130,6 @@ SECTIONS
         . = ALIGN(4);
     } > RAM
 
-    /* Section for app-net cores IPC */
-    .ipc (NOLOAD):
-    {
-        *(.ipc)
-    } > IPC
-
     /* This section will be zeroed by RTT package init */
     .rtt (NOLOAD):
     {
diff --git a/hw/mcu/nordic/nrf5340_net/src/hal_vflash.c b/hw/mcu/nordic/nrf5340_net/src/hal_vflash.c
index c2ffa7f..d06c8a5 100644
--- a/hw/mcu/nordic/nrf5340_net/src/hal_vflash.c
+++ b/hw/mcu/nordic/nrf5340_net/src/hal_vflash.c
@@ -27,6 +27,7 @@
 #include <nrfx_ipc.h>
 #include <bootutil/bootutil.h>
 #include <bootutil/image.h>
+#include <ipc_nrf5340/ipc_nrf5340_priv.h>
 
 #define NRF5340_NET_VFLASH_SECTOR_SZ 2048
 
@@ -217,6 +218,7 @@ static int
 nrf5340_net_vflash_init(const struct hal_flash *dev)
 {
     struct nrf5340_vflash *vflash = (struct nrf5340_vflash *)dev;
+    const struct ipc_shared *ipc_shared = (const struct ipc_shared *)NRF_APP_IPC_S->GPMEM[0];
 
     /*
      * Application side IPC will set GPMEM registers to address and size of
@@ -225,8 +227,10 @@ nrf5340_net_vflash_init(const struct hal_flash *dev)
      * and there no need to provide any data.
      * Set nv_image_size to 0 and all reads will return empty values (0xff)
      */
-    vflash->nv_image_address = (const uint8_t *)NRF_APP_IPC_S->GPMEM[0];
-    vflash->nv_image_size = NRF_APP_IPC_S->GPMEM[1];
+    if (ipc_shared && ipc_shared->net_core_image_address) {
+        vflash->nv_image_address = ipc_shared->net_core_image_address;
+        vflash->nv_image_size = ipc_shared->net_core_image_size;
+    }
 
     return 0;
 }