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Posted to commits@harmony.apache.org by hi...@apache.org on 2010/06/07 09:47:12 UTC
svn commit: r952128 [1/3] - in /harmony/enhanced/java/trunk/drlvm: make/vm/
vm/jitrino/config/em64t/ vm/jitrino/config/ia32/
vm/jitrino/src/codegenerator/ vm/jitrino/src/codegenerator/ia32/
vm/jitrino/src/jet/ vm/jitrino/src/optimizer/ vm/jitrino/src/o...
Author: hindessm
Date: Mon Jun 7 07:47:11 2010
New Revision: 952128
URL: http://svn.apache.org/viewvc?rev=952128&view=rev
Log:
Reverting commit r952017 of the javavect.patch from "[#HARMONY-6517] New
optimization and interface for either automatically or manually
vectorizing Java programs with SSE instructions".
Will apply again once I've clarified the authorship of:
drlvm/vm/jitrino/src/shared/SIMD.*
Removed:
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/em64t/opt_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/em64t/server_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/em64t/server_static_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/ia32/opt_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/ia32/server_aggressive_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/ia32/server_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/config/ia32/server_static_autovect.emconf
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/autovect/
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/shared/SIMD.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/shared/SIMD.h
Modified:
harmony/enhanced/java/trunk/drlvm/make/vm/jitrino.xml
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/CodeGenIntfc.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Encoder.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRConstants.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32StackLayout.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/jet/cg_fld_arr.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/CodeSelectors.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/IRBuilder.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/IRBuilder.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/Inst.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/Inst.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/Opcode.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/Opcode.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/Opnd.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/codelowerer.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/dabce.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/dabce.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/hashvaluenumberer.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/memoryopt.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/simplifier.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/simplifier.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/shared/LoopTree.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/shared/LoopTree.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/shared/Type.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/shared/Type.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.cpp
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/translator/java/JavaByteCodeTranslator.h
harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/vm/VMInterface.cpp
harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.cpp
harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_base.h
harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_defs.h
harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_prvt.h
harmony/enhanced/java/trunk/drlvm/vm/port/src/encoder/ia32_em64t/enc_tabl.cpp
harmony/enhanced/java/trunk/drlvm/vm/vmcore/include/compile.h
harmony/enhanced/java/trunk/drlvm/vm/vmcore/src/util/ia32/base/jit_runtime_support_ia32.cpp
Modified: harmony/enhanced/java/trunk/drlvm/make/vm/jitrino.xml
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/make/vm/jitrino.xml?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/make/vm/jitrino.xml (original)
+++ harmony/enhanced/java/trunk/drlvm/make/vm/jitrino.xml Mon Jun 7 07:47:11 2010
@@ -34,7 +34,6 @@
<include name="optimizer" />
<include name="optimizer/ssa" />
<include name="optimizer/abcd" />
- <include name="optimizer/autovect" />
<include name="translator" />
<include name="translator/java" />
<include name="vm" />
@@ -70,7 +69,6 @@
<include name="optimizer/*.cpp" />
<include name="optimizer/ssa/*.cpp" />
<include name="optimizer/abcd/*.cpp" />
- <include name="optimizer/autovect/*.cpp" />
<include name="translator/*.cpp" />
<include name="translator/java/*.cpp" />
<include name="vm/*.cpp" />
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/CodeGenIntfc.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/CodeGenIntfc.h?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/CodeGenIntfc.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/CodeGenIntfc.h Mon Jun 7 07:47:11 2010
@@ -49,9 +49,7 @@ public:
I4, I4_Ovf, U4_Ovf,
I8, I8_Ovf, U8_Ovf,
I, I_Ovf, U_Ovf,
- F, S, D,
- VI1_16, VI2_8, VI4_4, VI8_2,
- VS_4, VD_2
+ F, S, D
};
};
@@ -67,8 +65,7 @@ public:
enum Types {
I4,
I8,
- I,
- VI1_16, VI2_8, VI4_4, VI8_2
+ I
};
};
@@ -78,9 +75,7 @@ public:
I4, U4,
I8, U8,
I, U,
- F, S, D,
- VI1_16, VI2_8, VI4_4, VI8_2,
- VS_4, VD_2
+ F, S, D
};
};
@@ -97,9 +92,7 @@ public:
I4,
I8,
I,
- F, S, D,
- VI1_16, VI2_8, VI4_4, VI8_2,
- VS_4, VD_2
+ F, S, D
};
};
@@ -110,8 +103,6 @@ public:
I8,
I,
F, S, D,
- VI1_16, VI2_8, VI4_4, VI8_2,
- VS_4, VD_2,
Ref,
CompRef
};
@@ -134,8 +125,6 @@ public:
I4,
I8,
I,
- VI1_16, VI2_8, VI4_4, VI8_2,
- VS_4, VD_2,
Ref,
CompRef
};
@@ -144,8 +133,7 @@ public:
class ConvertToIntOp {
public:
enum Types {
- I1, I2, I4, I8, I,
- VI1_16, VI2_8, VI4_4, VI8_2
+ I1, I2, I4, I8, I
};
enum OverflowMod {
NoOvf,
@@ -159,7 +147,6 @@ public:
enum Types {
Single,
Double,
- VS_4, VD_2,
FloatFromUnsigned
};
};
@@ -214,7 +201,6 @@ public:
virtual CG_OpndHandle* and_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2) = 0;
virtual CG_OpndHandle* or_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2) = 0;
virtual CG_OpndHandle* xor_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2) = 0;
- virtual CG_OpndHandle* andnot_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2) = 0;
virtual CG_OpndHandle* not_(IntegerOp::Types,CG_OpndHandle* src) = 0;
virtual CG_OpndHandle* shladd(IntegerOp::Types,CG_OpndHandle* value,
U_32 shiftamount,
@@ -256,7 +242,6 @@ public:
ConvertToIntOp::OverflowMod,
Type* dstType, CG_OpndHandle* src) = 0;
virtual CG_OpndHandle* convToFp(ConvertToFpOp::Types, Type* dstType, CG_OpndHandle* src) = 0;
- virtual CG_OpndHandle* convToVector(VectorType* dstType, CG_OpndHandle* src, bool is_zero_extend) = 0;
virtual CG_OpndHandle* ldFunAddr(Type* dstType, MethodDesc *desc) = 0;
virtual CG_OpndHandle* tau_ldVirtFunAddr(Type* dstType, CG_OpndHandle* vtableAddr,
@@ -467,16 +452,6 @@ public:
virtual CG_OpndHandle* catchException(Type * exceptionType) = 0;
virtual void prefetch(CG_OpndHandle *addr) = 0;
- virtual CG_OpndHandle* vecAddSub(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2) = 0;
- virtual CG_OpndHandle* vecHadd(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2) = 0;
- virtual CG_OpndHandle* vecHsub(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2) = 0;
- virtual CG_OpndHandle* vecShuffle(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2,
- CG_OpndHandle* pattern) = 0;
- virtual CG_OpndHandle* vecExtract(Type *dst_type, CG_OpndHandle* src, CG_OpndHandle* index) = 0;
- virtual CG_OpndHandle* vecPackScalars(Type *dst_type, U_32 numSrcs, CG_OpndHandle** srcs) = 0;
- virtual CG_OpndHandle* vecInterleave(bool high, Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2) = 0;
- virtual CG_OpndHandle* vecCmpStr(Type *dst_type, U_32 numSrcs, CG_OpndHandle** srcs) = 0;
-
virtual void pseudoInst() = 0;
virtual void methodEntry(MethodDesc* mDesc) = 0;
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Encoder.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Encoder.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Encoder.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Encoder.cpp Mon Jun 7 07:47:11 2010
@@ -171,7 +171,7 @@ bool Encoder::matches(const OpcodeGroup*
}
}
for (U_32 i = 0, n = fi.opndCount; i < n; i++) {
- U_32 idx = i;
+ U_32 idx = fi.isExtended ? og->extendedToNativeMap[i] : i;
Constraint co=fi.opndConstraints[idx];
if (any) {
co = Constraint(OpndKind_Any, co.getSize());
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32I8Lowerer.cpp Mon Jun 7 07:47:11 2010
@@ -603,72 +603,6 @@ void I8Lowerer::applyMnemonic(Inst* inst
lowerDiv64(inst);
}
break;
- case Mnemonic_MOVQ:
- {
- Opnd *cnt1 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), 1);
- irManager->newInstEx(Mnemonic_MOVD, 1, dst, src1_1)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_PINSRD, 1, dst, dst, src1_2, cnt1)->insertBefore(inst);
- break;
- }
- case Mnemonic_UNPCKLPD:
- {
- Opnd *cnt1 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), 1);
- Opnd *cnt2 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), 2);
- Opnd *cnt3 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), 3);
- irManager->newInstEx(Mnemonic_MOVD, 1, dst, src1_1)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_PINSRD, 1, dst, dst, src1_2, cnt1)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_PINSRD, 1, dst, dst, src2_1, cnt2)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_PINSRD, 1, dst, dst, src2_2, cnt3)->insertBefore(inst);
- break;
- }
- case Mnemonic_PEXTRQ:
- {
- int idx = src2->getImmValue () * 2;
-#ifdef _HAVE_SIMD_4_2_
- // Generates SSE4 instructions
- Opnd *cnt1 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), idx);
- Opnd *cnt2 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), idx + 1);
- irManager->newInstEx(Mnemonic_PEXTRD, 1, dst_1, src1, cnt1)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_PEXTRD, 1, dst_2, src1, cnt2)->insertBefore(inst);
-#else
- // For processors that don't support SSE4
- if (idx == 0)
- irManager->newInstEx(Mnemonic_MOVD, 1, dst_1, src1)->insertBefore(inst);
- else
- {
- Opnd *cnt1 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), idx * 4);
- Opnd *temp1 = irManager->newOpnd(src1->getType());
- irManager->newInstEx(Mnemonic_PSRLDQ, 1, temp1, src1, cnt1)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_MOVD, 1, dst_1, temp1)->insertBefore(inst);
- }
- Opnd *cnt2 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), (idx + 1) * 4);
- Opnd *temp2 = irManager->newOpnd(src1->getType());
- irManager->newInstEx(Mnemonic_PSRLDQ, 1, temp2, src1, cnt2)->insertBefore(inst);
- irManager->newInstEx(Mnemonic_MOVD, 1, dst_2, temp2)->insertBefore(inst);
-#endif
- break;
- }
- case Mnemonic_MOVDDUP:
- {
-#ifdef _HAVE_SIMD_4_2_
- // Generates SSE4 instructions
- Opnd *cnt1 = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), 1);
-#endif
- irManager->newInstEx(Mnemonic_MOVD, 1, dst, src1_1)->insertBefore(inst);
-#ifdef _HAVE_SIMD_4_2_
- // Generates SSE4 instructions
- irManager->newInstEx(Mnemonic_PINSRD, 1, dst, dst, src1_2, cnt1)->insertBefore(inst);
-#else
- // For processors that don't support SSE4
- Opnd *temp = irManager->newOpnd (dst->getType());
- Opnd *cnt = irManager->newImmOpnd (irManager->getTypeManager().getInt8Type(), 4);
- irManager->newInstEx (Mnemonic_MOVD, 1, temp, src1_2)->insertBefore(inst);
- irManager->newInstEx (Mnemonic_PSLLDQ, 1, temp, temp, cnt)->insertBefore(inst);
- irManager->newInstEx (Mnemonic_POR, 1, dst, dst, temp)->insertBefore(inst);
-#endif
- irManager->newInstEx(Mnemonic_MOVDDUP, 1, dst, dst)->insertBefore(inst);
- break;
- }
default :
assert(0);
}
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRConstants.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRConstants.h?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRConstants.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRConstants.h Mon Jun 7 07:47:11 2010
@@ -42,7 +42,7 @@ const U_32 EmptyUint32=((U_32)-1);
const U_32 UnknownId=EmptyUint32;
const U_32 IRMaxExtendedOpnds=8;
-const U_32 IRMaxNativeOpnds=6;
+const U_32 IRMaxNativeOpnds=4;
const U_32 IRMaxInstOpnds=512;
const U_32 IRMaxOperandByteSize = 16;
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.cpp Mon Jun 7 07:47:11 2010
@@ -297,7 +297,7 @@ void IRManager::initInitialConstraints()
Constraint IRManager::createInitialConstraint(Type::Tag t)const
{
OpndSize sz=getTypeSize(t);
- if (t==Type::Single||t==Type::Double||t==Type::Float||t==Type::Vector)
+ if (t==Type::Single||t==Type::Double||t==Type::Float)
return Constraint(OpndKind_XMMReg, sz)|Constraint(OpndKind_Mem, sz);
if (sz<=Constraint::getDefaultSize(OpndKind_GPReg))
return Constraint(OpndKind_GPReg, sz)|Constraint(OpndKind_Mem, sz)|Constraint(OpndKind_Imm, sz);
@@ -408,7 +408,7 @@ Inst * IRManager::newI8PseudoInst(Mnemon
inst->kind = Inst::Kind_I8PseudoInst;
U_32 i=0;
Opnd ** opnds = inst->getOpnds();
- assert(opnd0->getType()->isInteger() ||opnd0->getType()->isPtr() || opnd0->getType()->isVector());
+ assert(opnd0->getType()->isInteger() ||opnd0->getType()->isPtr());
if (opnd0!=NULL){ opnds[i] = opnd0; i++;
if (opnd1!=NULL){ opnds[i] = opnd1; i++;
if (opnd2!=NULL){ opnds[i] = opnd2; i++;
@@ -1053,8 +1053,8 @@ Inst * IRManager::newCopySequence(Opnd *
OpndKind targetKind=(OpndKind)targetConstraint.getKind();
OpndKind sourceKind=(OpndKind)sourceConstraint.getKind();
- OpndSize targetSize=targetConstraint.getSize();
#if defined(_DEBUG) || !defined(_EM64T_)
+ OpndSize targetSize=targetConstraint.getSize();
assert(targetSize<=sourceSize); // only same size or truncating conversions are allowed
#endif
@@ -1152,11 +1152,13 @@ Inst * IRManager::newCopySequence(Opnd *
if (sourceByteSize==4){
return newInst(Mnemonic_MOVSS,targetOpnd, sourceOpnd);
}else if (sourceByteSize==8){
- return newInst(Mnemonic_MOVSD, targetOpnd, sourceOpnd);
- }else if (sourceByteSize==16) {
- return newInst(Mnemonic_MOVAPD, targetOpnd, sourceOpnd);
+ bool regsOnly = targetKind==OpndKind_XMMReg && sourceKind==OpndKind_XMMReg;
+ if (regsOnly && CPUID::isSSE2Supported()) {
+ return newInst(Mnemonic_MOVAPD, targetOpnd, sourceOpnd);
+ } else {
+ return newInst(Mnemonic_MOVSD, targetOpnd, sourceOpnd);
+ }
}
- assert(0);
}else if (targetKind==OpndKind_FPReg && sourceKind==OpndKind_Mem){
sourceOpnd->setMemOpndAlignment(Opnd::MemOpndAlignment_16);
return newInst(Mnemonic_FLD, targetOpnd, sourceOpnd);
@@ -1182,14 +1184,6 @@ Inst * IRManager::newCopySequence(Opnd *
appendToInstList(instList, newCopySequence(targetOpnd, tmp, regUsageMask));
return instList;
}
-
- if (targetOpnd->isPlacedIn(OpndKind_XMMReg)
- && sourceOpnd->isPlacedIn(OpndKind_Mem)){
- if (targetSize == OpndSize_128 && sourceSize == OpndSize_64) {
- return newInst(Mnemonic_MOVLPD, targetOpnd, sourceOpnd);
- }
- }
-
assert(0);
return NULL;
}
@@ -1423,9 +1417,6 @@ OpndSize IRManager::getTypeSize(Type::Ta
case Type::Float:
size = OpndSize_80;
break;
- case Type::Vector:
- size = OpndSize_128;
- break;
default:
#ifdef _EM64T_
size = (tag>=Type::CompressedSystemObject && tag<=Type::CompressedVTablePtr)?OpndSize_32:OpndSize_64;
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h Mon Jun 7 07:47:11 2010
@@ -181,7 +181,7 @@ public:
Inst * newInstEx(Mnemonic mnemonic, U_32 defCount,
Opnd * opnd0, Opnd * opnd1, Opnd * opnd2, Opnd * opnd3,
- Opnd * opnd4=0, Opnd * opnd5=0, Opnd * opnd6=0, Opnd * opnd7=0
+ Opnd * opnd4, Opnd * opnd5=0, Opnd * opnd6=0, Opnd * opnd7=0
);
/** Creates a new branch instruction
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.cpp Mon Jun 7 07:47:11 2010
@@ -540,7 +540,7 @@ void Inst::makeNative(IRManager * irMana
U_32 * opndRoles = getOpndRoles();
Constraint * constraints = getConstraints();
- I_32 defs[IRMaxNativeOpnds]={ -1, -1, -1, -1, -1, -1 };
+ I_32 defs[IRMaxNativeOpnds]={ -1, -1, -1, -1 };
for (U_32 i=0; i<opndCount; i++){
U_32 r = opndRoles[i];
if ((r & OpndRole_Explicit) == 0) continue;
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.h?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32Inst.h Mon Jun 7 07:47:11 2010
@@ -750,7 +750,6 @@ public:
m==Mnemonic_MOVS16 ||
m==Mnemonic_MOVS32 ||
m==Mnemonic_MOVS64 ||
- m==Mnemonic_PINSRD ||
m==Mnemonic_STOS ||
m==Mnemonic_STD ||
m==Mnemonic_CLD ||
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.cpp Mon Jun 7 07:47:11 2010
@@ -77,8 +77,6 @@ CompareOp::Types getCompareOpTypesFromCo
case CompareZeroOp::I: return CompareOp::I;
case CompareZeroOp::Ref: return CompareOp::Ref;
case CompareZeroOp::CompRef: return CompareOp::CompRef;
- default:
- ;
}
assert(0);
return CompareOp::I4;
@@ -567,7 +565,6 @@ Opnd * InstCodeSelector::convert(CG_Opnd
dstOpnd=convertFpToFp(srcOpnd, dstType, dstOpnd);
converted=true;
}
- } else if (srcType->tag == Type::Vector) {
} else if (srcType->isUnmanagedPtr() && !dstType->isUnmanagedPtr()) {
dstOpnd = convertUnmanagedPtr(srcOpnd, dstType, dstOpnd);
converted = true;
@@ -636,162 +633,6 @@ CG_OpndHandle* InstCodeSelector::convTo
}
//_______________________________________________________________________________________________________________
-// Convert to vectors
-
-Opnd* InstCodeSelector::vectorExtension (VectorType* dst_type,
- CG_OpndHandle* src,
- Type::Tag src_elem_tag,
- bool is_zero_extend)
-{
- Opnd *dst = irManager.newOpnd (dst_type);
- Type *dst_elem_type = dst_type->getElemType ();
- Opnd *elem = (Opnd*)src;
- Mnemonic mn;
-
- switch (src_elem_tag)
- {
- case Type::Int8:
- case Type::UInt8:
- switch (dst_elem_type->tag)
- {
- case Type::Int16:
- case Type::UInt16:
- mn = Mnemonic_PMOVSXBW;
- break;
- case Type::Int32:
- case Type::UInt32:
- mn = Mnemonic_PMOVSXBD;
- break;
- case Type::Int64:
- case Type::UInt64:
- mn = Mnemonic_PMOVSXBQ;
- break;
- default:
- assert (0);
- }
- break;
- case Type::Int16:
- case Type::UInt16:
- switch (dst_elem_type->tag)
- {
- case Type::Int32:
- case Type::UInt32:
- mn = Mnemonic_PMOVSXWD;
- break;
- case Type::Int64:
- case Type::UInt64:
- mn = Mnemonic_PMOVSXWQ;
- break;
- default:
- assert (0);
- }
- break;
- case Type::Int32:
- case Type::UInt32:
- switch (dst_elem_type->tag)
- {
- case Type::Int64:
- case Type::UInt64:
- mn = Mnemonic_PMOVSXDQ;
- break;
- default:
- assert (0);
- }
- break;
-
- default:
- assert (0);
- }
-
- appendInsts (irManager.newInstEx ((Mnemonic)(mn + is_zero_extend),
- 1, dst, elem));
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::convToVector (VectorType* dst_type,
- CG_OpndHandle* src,
- bool is_zero_extend)
-{
- Opnd *elem = (Opnd*)src;
- Type *dst_elem_type = dst_type->getElemType ();
- Opnd *dst = irManager.newOpnd (dst_type);
- Opnd *all_zero;
-
- if (VectorType *vec_type = elem->getType()->asVectorType ())
- {
- Type *src_elem_type = vec_type->getElemType ();
- if (dst_elem_type->tag == Type::Int32
- && src_elem_type->tag == Type::Single)
- appendInsts (irManager.newInstEx (Mnemonic_CVTPS2DQ, 1, dst, elem));
- else if (dst_elem_type->tag == Type::Single
- && src_elem_type->tag == Type::Int32)
- appendInsts (irManager.newInstEx (Mnemonic_CVTDQ2PS, 1, dst, elem));
- else
- assert (0);
-
- // // Sign/zero extend an integer vector.
- // return vectorExtension (dst_type, src,
- // vec_type->getElemType()->tag,
- // is_zero_extend);
- }
-
- // Duplicate a scalar to a vector
- switch (dst_elem_type->tag)
- {
- case Type::Int8:
- case Type::UInt8:
- elem = (Opnd*)convert (src, typeManager.getInt32Type ());
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, dst, elem));
- all_zero = irManager.newOpnd (dst_type);
- appendInsts (irManager.newInstEx (Mnemonic_PCMPGTB, 1, all_zero,
- dst, dst));
- appendInsts (irManager.newInstEx (Mnemonic_PSHUFB, 1, dst, dst, all_zero));
- break;
-
- case Type::Int16:
- case Type::UInt16:
- elem = (Opnd*)convert (src, typeManager.getInt32Type ());
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, dst, elem));
- appendInsts (irManager.newInstEx (Mnemonic_PSHUFLW, 1, dst, dst,
- irManager.newImmOpnd (typeManager.getInt8Type (), 0)));
- appendInsts (irManager.newInstEx (Mnemonic_MOVDDUP, 1, dst, dst));
- break;
-
- case Type::Int32:
- case Type::UInt32:
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, dst, elem));
- appendInsts (irManager.newInstEx (Mnemonic_PSHUFD, 1, dst, dst,
- irManager.newImmOpnd (typeManager.getInt8Type (), 0)));
- break;
-
- case Type::Single:
- appendInsts (irManager.newInstEx (Mnemonic_PSHUFD, 1, dst, elem,
- irManager.newImmOpnd (typeManager.getInt8Type (), 0)));
- break;
-
- case Type::Int64:
- case Type::UInt64:
-#ifndef _EM64T_
- appendInsts (irManager.newI8PseudoInst (Mnemonic_MOVDDUP, 1, dst, elem));
-#else
- appendInsts (irManager.newInstEx (Mnemonic_MOVQ, 1, dst, elem));
- appendInsts (irManager.newInstEx (Mnemonic_MOVDDUP, 1, dst, dst));
-#endif
- break;
-
- case Type::Double:
- appendInsts (irManager.newInstEx (Mnemonic_MOVDDUP, 1, dst, elem));
- break;
-
- default:
- assert (0);
- }
-
- return dst;
-}
-
-//_______________________________________________________________________________________________________________
// Convert to objects to unmanaged pointers and via versa
/// convert unmanaged pointer to object. Boxing
@@ -865,19 +706,6 @@ Opnd * InstCodeSelector::simpleOp_I4(Mne
}
//_______________________________________________________________________________________________________________
-Opnd * InstCodeSelector::vecBinaryOp(Mnemonic mn, Opnd * src1, Opnd * src2)
-{
- Type *type = src1->getType ();
- Opnd *dst = irManager.newOpnd (type);
- Opnd *srcOpnd1 = (Opnd*)convert (src1, type);
- Opnd *srcOpnd2 = (Opnd*)convert (src2, type);
-
- appendInsts (irManager.newInstEx(mn, 1, dst, srcOpnd1, srcOpnd2));
-
- return dst;
-}
-
-//_______________________________________________________________________________________________________________
// Add numeric values
CG_OpndHandle* InstCodeSelector::add(ArithmeticOp::Types opType,
@@ -897,18 +725,6 @@ CG_OpndHandle* InstCodeSelector::add(Ari
return fpOp(Mnemonic_ADDSD, irManager.getTypeFromTag(Type::Double), (Opnd*)src1, (Opnd*)src2);
case ArithmeticOp::S:
return fpOp(Mnemonic_ADDSS, irManager.getTypeFromTag(Type::Single), (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI1_16:
- return vecBinaryOp (Mnemonic_PADDB, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI2_8:
- return vecBinaryOp (Mnemonic_PADDW, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI4_4:
- return vecBinaryOp (Mnemonic_PADDD, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI8_2:
- return vecBinaryOp (Mnemonic_PADDQ, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VS_4:
- return vecBinaryOp (Mnemonic_ADDPS, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VD_2:
- return vecBinaryOp (Mnemonic_ADDPD, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -935,18 +751,6 @@ CG_OpndHandle* InstCodeSelector::sub(Ari
return fpOp(Mnemonic_SUBSD, irManager.getTypeFromTag(Type::Double), (Opnd*)src1, (Opnd*)src2);
case ArithmeticOp::S:
return fpOp(Mnemonic_SUBSS, irManager.getTypeFromTag(Type::Single), (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI1_16:
- return vecBinaryOp (Mnemonic_PSUBB, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI2_8:
- return vecBinaryOp (Mnemonic_PSUBW, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI4_4:
- return vecBinaryOp (Mnemonic_PSUBD, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI8_2:
- return vecBinaryOp (Mnemonic_PSUBQ, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VS_4:
- return vecBinaryOp (Mnemonic_SUBPS, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VD_2:
- return vecBinaryOp (Mnemonic_SUBPD, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -1023,20 +827,6 @@ CG_OpndHandle* InstCodeSelector::mul(Ari
return fpOp(Mnemonic_MULSD, irManager.getTypeFromTag(Type::Double), (Opnd*)src1, (Opnd*)src2);
case ArithmeticOp::S:
return fpOp(Mnemonic_MULSS, irManager.getTypeFromTag(Type::Single), (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI2_8:
- return vecBinaryOp (Mnemonic_PMULLW, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VI4_4:
- return vecBinaryOp (Mnemonic_PMULLD, (Opnd*)src1, (Opnd*)src2);;
- case ArithmeticOp::VI8_2:
- // FIXME: SSE doesn't support 64-bit multiplication. The
- // PMULUDQ only multiplies the low 32-bit of each part, so
- // the middle end must ensure that the high 32-bits of
- // each part are all zero.
- return vecBinaryOp (Mnemonic_PMULUDQ, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VS_4:
- return vecBinaryOp (Mnemonic_MULPS, (Opnd*)src1, (Opnd*)src2);
- case ArithmeticOp::VD_2:
- return vecBinaryOp (Mnemonic_MULPD, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -1132,10 +922,6 @@ Opnd * InstCodeSelector::divOp(DivOp::Ty
return fpOp(Mnemonic_DIVSS, irManager.getTypeFromTag(Type::Single), src1, src2);
}
break;
- case DivOp::VS_4:
- return vecBinaryOp (Mnemonic_DIVPS, (Opnd*)src1, (Opnd*)src2);
- case DivOp::VD_2:
- return vecBinaryOp (Mnemonic_DIVPD, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -1236,41 +1022,6 @@ Opnd * InstCodeSelector::minMaxOp(NegOp:
case NegOp::F:
case NegOp::S:
ICS_ASSERT(0);
- case NegOp::VI1_16:
- {
- dst = irManager.newOpnd (src1->getType ());
- appendInsts (irManager.newInstEx (max ? Mnemonic_PMAXSB : Mnemonic_PMINSB,
- 1, dst, src1, src2));
- break;
- }
- case NegOp::VI2_8:
- {
- dst = irManager.newOpnd (src1->getType ());
- appendInsts (irManager.newInstEx (max ? Mnemonic_PMAXSW : Mnemonic_PMINSW,
- 1, dst, src1, src2));
- break;
- }
- case NegOp::VI4_4:
- {
- dst = irManager.newOpnd (src1->getType ());
- appendInsts (irManager.newInstEx (max ? Mnemonic_PMAXSD : Mnemonic_PMINSD,
- 1, dst, src1, src2));
- break;
- }
- case NegOp::VS_4:
- {
- dst = irManager.newOpnd (src1->getType ());
- appendInsts (irManager.newInstEx (max ? Mnemonic_MAXPS : Mnemonic_MINPS,
- 1, dst, src1, src2));
- break;
- }
- case NegOp::VD_2:
- {
- dst = irManager.newOpnd (src1->getType ());
- appendInsts (irManager.newInstEx (max ? Mnemonic_MAXPD : Mnemonic_MINPD,
- 1, dst, src1, src2));
- break;
- }
default:
ICS_ASSERT(0);
}
@@ -1321,24 +1072,6 @@ CG_OpndHandle* InstCodeSelector::abs_op(
case NegOp::F:
case NegOp::S:
ICS_ASSERT(0);
- case NegOp::VI1_16:
- {
- dst = irManager.newOpnd (((Opnd*)src)->getType ());
- appendInsts (irManager.newInstEx (Mnemonic_PABSB, 1, dst, (Opnd*)src));
- break;
- }
- case NegOp::VI2_8:
- {
- dst = irManager.newOpnd (((Opnd*)src)->getType ());
- appendInsts (irManager.newInstEx (Mnemonic_PABSW, 1, dst, (Opnd*)src));
- break;
- }
- case NegOp::VI4_4:
- {
- dst = irManager.newOpnd (((Opnd*)src)->getType ());
- appendInsts (irManager.newInstEx (Mnemonic_PABSD, 1, dst, (Opnd*)src));
- break;
- }
default:
ICS_ASSERT(0);
}
@@ -1369,11 +1102,6 @@ CG_OpndHandle* InstCodeSelector::and_(In
}
case IntegerOp::I8:
return simpleOp_I8(Mnemonic_AND, irManager.getTypeFromTag(Type::Int64), (Opnd*)src1, (Opnd*)src2);
- case IntegerOp::VI1_16:
- case IntegerOp::VI2_8:
- case IntegerOp::VI4_4:
- case IntegerOp::VI8_2:
- return vecBinaryOp (Mnemonic_PAND, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -1395,11 +1123,6 @@ CG_OpndHandle* InstCodeSelector::or_(Int
}
case IntegerOp::I8:
return simpleOp_I8(Mnemonic_OR, irManager.getTypeFromTag(Type::Int64), (Opnd*)src1, (Opnd*)src2);
- case IntegerOp::VI1_16:
- case IntegerOp::VI2_8:
- case IntegerOp::VI4_4:
- case IntegerOp::VI8_2:
- return vecBinaryOp (Mnemonic_POR, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -1421,30 +1144,6 @@ CG_OpndHandle* InstCodeSelector::xor_
}
case IntegerOp::I8:
return simpleOp_I8(Mnemonic_XOR, irManager.getTypeFromTag(Type::Int64), (Opnd*)src1, (Opnd*)src2);
- case IntegerOp::VI1_16:
- case IntegerOp::VI2_8:
- case IntegerOp::VI4_4:
- case IntegerOp::VI8_2:
- return vecBinaryOp (Mnemonic_PXOR, (Opnd*)src1, (Opnd*)src2);
- default:
- ICS_ASSERT(0);
- }
- return NULL;
-}
-
-//_______________________________________________________________________________________________________________
-// Logical andnot
-
-CG_OpndHandle* InstCodeSelector::andnot_(IntegerOp::Types opType,
- CG_OpndHandle* src1,
- CG_OpndHandle* src2)
-{
- switch(opType){
- case IntegerOp::VI1_16:
- case IntegerOp::VI2_8:
- case IntegerOp::VI4_4:
- case IntegerOp::VI8_2:
- return vecBinaryOp (Mnemonic_PANDN, (Opnd*)src1, (Opnd*)src2);
default:
ICS_ASSERT(0);
}
@@ -1494,26 +1193,6 @@ Opnd * InstCodeSelector::shiftOp(Integer
appendInsts(irManager.newInstEx(mn,1,dst,(Opnd*)convert(value, dstType),(Opnd*)convert(shiftAmount, typeManager.getInt32Type())));
#endif
return dst;
- case IntegerOp::VI2_8:
- case IntegerOp::VI4_4:
- case IntegerOp::VI8_2:
- {
- dst = irManager.newOpnd (value->getType ());
- Opnd *shift_num;
- if (shiftAmount->isPlacedIn (OpndKind_Imm))
- shift_num = irManager.newImmOpnd (typeManager.getInt8Type(),
- shiftAmount->getImmValue ());
- else if (shiftAmount->getType()->tag == Type::Vector)
- shift_num = shiftAmount;
- else
- {
- shift_num = irManager.newOpnd (value->getType ());
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, shift_num,
- (Opnd*)convert (shiftAmount, typeManager.getInt32Type())));
- }
- appendInsts (irManager.newInstEx (mn, 1, dst, value, shift_num));
- break;
- }
default:
ICS_ASSERT(0);
}
@@ -1566,24 +1245,7 @@ CG_OpndHandle* InstCodeSelector::shl(
CG_OpndHandle* value,
CG_OpndHandle* shiftAmount)
{
- Mnemonic mn;
-
- switch (opType)
- {
- case IntegerOp::VI2_8:
- mn = Mnemonic_PSLLW;
- break;
- case IntegerOp::VI4_4:
- mn = Mnemonic_PSLLD;
- break;
- case IntegerOp::VI8_2:
- mn = Mnemonic_PSLLQ;
- break;
- default:
- mn = Mnemonic_SHL;
- }
-
- return shiftOp (opType, mn, (Opnd*)value, (Opnd*)shiftAmount);
+ return shiftOp(opType, Mnemonic_SHL, (Opnd*)value, (Opnd*)shiftAmount);
}
//_______________________________________________________________________________________________________________
@@ -1593,24 +1255,7 @@ CG_OpndHandle* InstCodeSelector::shr(Int
CG_OpndHandle* value,
CG_OpndHandle* shiftAmount)
{
- Mnemonic mn;
-
- switch (opType)
- {
- case IntegerOp::VI2_8:
- mn = Mnemonic_PSRAW;
- break;
- case IntegerOp::VI4_4:
- mn = Mnemonic_PSRAD;
- break;
- case IntegerOp::VI8_2:
- assert (0);
- break;
- default:
- mn = Mnemonic_SAR;
- }
-
- return shiftOp (opType, mn, (Opnd*)value, (Opnd*)shiftAmount);
+ return shiftOp(opType, Mnemonic_SAR, (Opnd*)value, (Opnd*)shiftAmount);
}
//_______________________________________________________________________________________________________________
@@ -1620,24 +1265,7 @@ CG_OpndHandle* InstCodeSelector::shru
CG_OpndHandle* value,
CG_OpndHandle* shiftAmount)
{
- Mnemonic mn;
-
- switch (opType)
- {
- case IntegerOp::VI2_8:
- mn = Mnemonic_PSRLW;
- break;
- case IntegerOp::VI4_4:
- mn = Mnemonic_PSRLD;
- break;
- case IntegerOp::VI8_2:
- mn = Mnemonic_PSRLQ;
- break;
- default:
- mn = Mnemonic_SHR;
- }
-
- return shiftOp (opType, mn, (Opnd*)value, (Opnd*)shiftAmount);
+ return shiftOp(opType, Mnemonic_SHR, (Opnd*)value, (Opnd*)shiftAmount);
}
//_______________________________________________________________________________________________________________
@@ -1648,20 +1276,6 @@ CG_OpndHandle* InstCodeSelector::select
CG_OpndHandle* src2,
CG_OpndHandle* src3)
{
- Type *src_type = ((Opnd*)src1)->getType ();
-
- if (src_type->tag == Type::Vector)
- {
- Opnd *dst = irManager.newOpnd (src_type);
- Opnd *masked_src2 = irManager.newOpnd (src_type);
- Opnd *masked_src3 = irManager.newOpnd (src_type);
- appendInsts (irManager.newInstEx (Mnemonic_PAND, 1, masked_src2, (Opnd*)src1, (Opnd*)src2));
- appendInsts (irManager.newInstEx (Mnemonic_PANDN, 1, masked_src3, (Opnd*)src1, (Opnd*)src3));
- appendInsts (irManager.newInstEx (Mnemonic_POR, 1, dst, masked_src2, masked_src3));
-
- return dst;
- }
-
ICS_ASSERT(0);
return 0;
}
@@ -1674,93 +1288,6 @@ CG_OpndHandle* InstCodeSelector::cmp(Co
CG_OpndHandle* src1,
CG_OpndHandle* src2, int ifNaNResult)
{
- Type *src_type = ((Opnd*)src1)->getType ();
-
- if (src_type->tag == Type::Vector)
- {
- Opnd *dst = irManager.newOpnd (src_type);
- Mnemonic mn;
-
- switch (opType)
- {
- case CompareOp::VI1_16:
- case CompareOp::VI2_8:
- case CompareOp::VI4_4:
- case CompareOp::VI8_2:
- {
- int cmp_offset = opType - CompareOp::VI1_16;
- bool need_reverse = false;
-
- switch (cmpOp)
- {
- case CompareOp::Eq:
- mn = (Mnemonic)(Mnemonic_PCMPEQB + cmp_offset);
- break;
- case CompareOp::Ne:
- mn = (Mnemonic)(Mnemonic_PCMPEQB + cmp_offset);
- need_reverse = true;
- break;
- case CompareOp::Gt:
- mn = (Mnemonic)(Mnemonic_PCMPGTB + cmp_offset);
- break;
- case CompareOp::Ge:
- mn = (Mnemonic)(Mnemonic_PCMPGTB + cmp_offset);
- need_reverse = true;
- break;
- default:
- assert (0);
- }
-
- if (need_reverse)
- {
- Opnd *tmp = irManager.newOpnd (src_type);
- appendInsts (irManager.newInstEx (mn, 1, tmp, (Opnd*)src2, (Opnd*)src1));
- Opnd *all_one = irManager.newOpnd (src_type);
- appendInsts (irManager.newInstEx (Mnemonic_PCMPEQB, 1, all_one,
- (Opnd*)src1, (Opnd*)src1));
- appendInsts (irManager.newInstEx (Mnemonic_PANDN, 1, dst, tmp, all_one));
- }
- else
- appendInsts (irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2));
-
- return dst;
- }
-
- case CompareOp::VS_4:
- case CompareOp::VD_2:
- {
- int op_imm;
-
- switch (cmpOp)
- {
- case CompareOp::Eq:
- op_imm = 0;
- break;
- case CompareOp::Ne:
- op_imm = 4;
- break;
- case CompareOp::Gt:
- op_imm = 6;
- break;
- case CompareOp::Ge:
- op_imm = 5;
- break;
- default:
- assert (0);
- }
-
- mn = opType == CompareOp::VS_4 ? Mnemonic_CMPPS : Mnemonic_CMPPD;
- Opnd *imm = irManager.newImmOpnd (typeManager.getInt8Type (), op_imm);
- appendInsts (irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2, imm));
-
- return dst;
- }
-
- default:
- ;
- }
- }
-
Opnd * dst=irManager.newOpnd(typeManager.getInt32Type());
bool swapped=cmpToEflags(cmpOp, opType, (Opnd*)src1, (Opnd*)src2);
ConditionMnemonic cm=getConditionMnemonicFromCompareOperator(cmpOp, opType);
@@ -2628,7 +2155,7 @@ void InstCodeSelector::simpleStInd(Opnd
if(irManager.refsAreCompressed() && memType > Type::Float && !src->getType()->isUnmanagedPtr()) {
Type * unmanagedPtrType = typeManager.getUnmanagedPtrType(typeManager.getInt8Type());
Opnd * heap_base = heapBaseOpnd(unmanagedPtrType, (POINTER_SIZE_INT)VMInterface::getHeapBase());
- Opnd * compressed_src = irManager.newOpnd(src->getType());
+ Opnd * compressed_src = irManager.newOpnd(typeManager.compressType(src->getType()));
Opnd * opnd = irManager.newMemOpndAutoKind(typeManager.compressType(src->getType()), addr);
appendInsts(irManager.newInstEx(Mnemonic_SUB, 1, compressed_src, src, heap_base));
appendInsts(irManager.newCopyPseudoInst(Mnemonic_MOV, opnd, compressed_src));
@@ -2642,39 +2169,6 @@ void InstCodeSelector::simpleStInd(Opnd
}
//_______________________________________________________________________________________________________________
-// Vector load indirect -- load primitive value
-
-CG_OpndHandle* InstCodeSelector::vectorLdInd (Type *dstType, Opnd *addr)
-{
- PtrType *ptr_type = addr->getType()->asPtrType ();
- VectorType *dst_vec_type = dstType->asVectorType ();
- assert (ptr_type && dst_vec_type);
- Type *pointed_to_type = ptr_type->getPointedToType ();
- Opnd *opnd = irManager.newMemOpndAutoKind (dstType, addr);
- Opnd *dst;
-
- if (pointed_to_type->tag == dst_vec_type->getElemType()->tag)
- {
- dst = irManager.newOpnd (dstType);
- appendInsts (irManager.newInstEx (Mnemonic_MOVUPD, 1, dst, opnd));
- }
- else
- dst = vectorExtension (dst_vec_type, opnd, pointed_to_type->tag, false);
-
- return dst;
-}
-
-//_______________________________________________________________________________________________________________
-// Vector store indirect -- store primitive value
-
-void InstCodeSelector::vectorStInd (Opnd *addr, Opnd *src)
-{
- Opnd *dst = irManager.newMemOpndAutoKind (src->getType (), addr);
-
- appendInsts (irManager.newInstEx (Mnemonic_MOVUPD, 1, dst, src));
-}
-
-//_______________________________________________________________________________________________________________
// Load static field
CG_OpndHandle* InstCodeSelector::ldStatic(Type * dstType,
@@ -2767,10 +2261,7 @@ CG_OpndHandle* InstCodeSelector::tau_ldI
CG_OpndHandle* tauBaseNonNull,
CG_OpndHandle* tauAddressInRange)
{
- if (memType == Type::Vector)
- return vectorLdInd (dstType, (Opnd*)ptr);
- else
- return simpleLdInd (dstType, (Opnd*)ptr, memType, (Opnd*)tauBaseNonNull, (Opnd*)tauAddressInRange);
+ return simpleLdInd(dstType, (Opnd*)ptr, memType, (Opnd*)tauBaseNonNull, (Opnd*)tauAddressInRange);
}
//_______________________________________________________________________________________________________________
@@ -2784,10 +2275,7 @@ void InstCodeSelector::tau_stInd(CG_Opnd
CG_OpndHandle* tauAddressInRange,
CG_OpndHandle* tauElemTypeChecked)
{
- if (memType == Type::Vector)
- return vectorStInd ((Opnd*)ptr, (Opnd*)src);
- else
- return simpleStInd ((Opnd*)ptr, (Opnd*)src, memType, autoCompressRef, (Opnd*)tauBaseNonNull, (Opnd*)tauElemTypeChecked);
+ return simpleStInd((Opnd*)ptr, (Opnd*)src, memType, autoCompressRef, (Opnd*)tauBaseNonNull, (Opnd*)tauElemTypeChecked);
}
void InstCodeSelector::tau_stRef(CG_OpndHandle* src,
@@ -3792,298 +3280,6 @@ void InstCodeSelector::prefetch(CG_OpndH
}
//_______________________________________________________________________________________________________________
-// Special vector operations
-
-CG_OpndHandle* InstCodeSelector::vecAddSub(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2)
-{
- VectorType *vec_type = dst_type->asVectorType ();
- assert (vec_type);
-
- Type::Tag elem_tag = vec_type->getElemType()->tag;
- assert (elem_tag == Type::Double || elem_tag == Type::Single);
-
- Mnemonic mn = elem_tag == Type::Double ? Mnemonic_ADDSUBPD : Mnemonic_ADDSUBPS;
- Opnd *dst = irManager.newOpnd (dst_type);
- Inst *inst = irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2);
-
- appendInsts (inst);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecHadd(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2)
-{
- VectorType *vec_type = dst_type->asVectorType ();
- assert (vec_type);
-
- Type::Tag elem_tag = vec_type->getElemType()->tag;
- assert (elem_tag == Type::Double || elem_tag == Type::Single);
-
- Mnemonic mn = elem_tag == Type::Double ? Mnemonic_HADDPD : Mnemonic_HADDPS;
- Opnd *dst = irManager.newOpnd (dst_type);
- Inst *inst = irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2);
-
- appendInsts (inst);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecHsub(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2)
-{
- VectorType *vec_type = dst_type->asVectorType ();
- assert (vec_type);
-
- Type::Tag elem_tag = vec_type->getElemType()->tag;
- assert (elem_tag == Type::Double || elem_tag == Type::Single);
-
- Mnemonic mn = elem_tag == Type::Double ? Mnemonic_HSUBPD : Mnemonic_HSUBPS;
- Opnd *dst = irManager.newOpnd (dst_type);
- Inst *inst = irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2);
-
- appendInsts (inst);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecInterleave(bool high, Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2)
-{
- VectorType *vec_type = dst_type->asVectorType ();
- assert (vec_type);
-
- Mnemonic mn;
-
- switch (vec_type->getLength ())
- {
- case 2:
- mn = high ? Mnemonic_PUNPCKHQDQ : Mnemonic_PUNPCKLQDQ;
- break;
-
- case 4:
- mn = high ? Mnemonic_PUNPCKHDQ : Mnemonic_PUNPCKLDQ;
- break;
-
- case 8:
- mn = high ? Mnemonic_PUNPCKHWD : Mnemonic_PUNPCKLWD;
- break;
-
- case 16:
- mn = high ? Mnemonic_PUNPCKHBW : Mnemonic_PUNPCKLBW;
- break;
-
- default:
- assert (0);
- }
-
- Opnd *dst = irManager.newOpnd (dst_type);
- Inst *inst = irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2);
-
- appendInsts (inst);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecShuffle(Type *dst_type, CG_OpndHandle* src1,
- CG_OpndHandle* src2, CG_OpndHandle* pattern)
-{
- VectorType *vec_type = dst_type->asVectorType ();
- assert (vec_type);
-
- int elem_num = vec_type->getLength ();
- assert (elem_num == 2 || elem_num == 4);
-
- Mnemonic mn = elem_num == 2 ? Mnemonic_SHUFPD : Mnemonic_SHUFPS;
- Opnd *dst = irManager.newOpnd (dst_type);
- Inst *inst = irManager.newInstEx (mn, 1, dst, (Opnd*)src1, (Opnd*)src2,
- (Opnd*)pattern, NULL, NULL, NULL, NULL);
-
- appendInsts (inst);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecExtract(Type *dst_type, CG_OpndHandle* src, CG_OpndHandle* index)
-{
- // VectorType *src_type = ((Opnd*)src)->getType()->asVectorType ();
- Opnd *dst = irManager.newOpnd (dst_type);
- Inst *inst = NULL;
- int idx = ((Opnd*)index)->getImmValue ();
-
- switch (dst_type->tag)
- {
- case Type::Single:
- inst = irManager.newInstEx (Mnemonic_PSHUFD, 1, dst, (Opnd*)src,
- irManager.newImmOpnd (typeManager.getInt8Type (), idx));
- break;
-
- case Type::Double:
- {
-// if (idx == 0)
-// inst = irManager.newCopyPseudoInst (Mnemonic_MOV, dst, (Opnd*)src);
-// else
- {
- Mnemonic mn = idx == 0 ? Mnemonic_MOVAPD : Mnemonic_MOVHLPS;
- inst = irManager.newInstEx (mn, 1, dst, (Opnd*)src);
- }
- break;
- }
-
- case Type::UInt32:
- case Type::Int32:
- inst = irManager.newInstEx (Mnemonic_PEXTRD, 1, dst, (Opnd*)src, (Opnd*)index);
- break;
-
- case Type::UInt64:
- case Type::Int64:
-#ifndef _EM64T_
- inst = irManager.newI8PseudoInst (Mnemonic_PEXTRQ, 1, dst, (Opnd*)src, (Opnd*)index);
-#else
- inst = irManager.newInstEx (Mnemonic_PEXTRQ, 1, dst, (Opnd*)src, (Opnd*)index);
-#endif
- break;
-
- case Type::Vector:
- {
- VectorType *vec_type = dst_type->asVectorType ();
- Type::Tag elem_tag = vec_type->getElemType()->tag;
-
- if (elem_tag == Type::Int64 || elem_tag == Type::UInt64)
- // FIXME: The 64-bit values must be andded with 0xffffffff
- // before they are used.
- {
- assert (idx == 0 || idx == 2);
- Opnd *select = irManager.newImmOpnd (typeManager.getInt8Type(),
- idx | ((idx + 1) << 4));
- inst = irManager.newInstEx (Mnemonic_PSHUFD, 1, dst, (Opnd*)src, select);
- }
-
- break;
- }
-
- default:
- assert (0);
- }
-
- assert (inst);
- appendInsts (inst);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecPackScalars(Type *dst_type, U_32 numSrcs, CG_OpndHandle** srcs)
-{
- Opnd *dst = irManager.newOpnd (dst_type);
- Type *src_type = ((Opnd*)srcs[0])->getType ();
-
- if (src_type->isDouble ())
- {
- assert (numSrcs == 2);
- // TODO: it should be implemented by UNPCKLPD, but it seems
- // impossible in current backend design.
- appendInsts (irManager.newInstEx (Mnemonic_MOVAPD, 1, dst, (Opnd*)srcs[0]));
- appendInsts (irManager.newInstEx (Mnemonic_MOVLHPS, 1, dst, dst, (Opnd*)srcs[1]));
- }
- else if (src_type->isSingle ())
- {
- Opnd *tmp = irManager.newOpnd (dst_type);
- appendInsts (irManager.newInstEx (Mnemonic_MOVAPD, 1, tmp, (Opnd*)srcs[2]));
- appendInsts (irManager.newInstEx (Mnemonic_UNPCKLPS, 1, tmp, tmp, (Opnd*)srcs[3]));
- appendInsts (irManager.newInstEx (Mnemonic_MOVAPD, 1, dst, (Opnd*)srcs[0]));
- appendInsts (irManager.newInstEx (Mnemonic_UNPCKLPS, 1, dst, dst, (Opnd*)srcs[1]));
- appendInsts (irManager.newInstEx (Mnemonic_MOVLHPS, 1, dst, dst, tmp));
- }
-#ifndef _EM64T_
- else if (src_type->isInt8 () || src_type->isUInt8 ())
- {
- appendInsts (irManager.newI8PseudoInst (Mnemonic_UNPCKLPD, 1, dst, (Opnd*)srcs[0], (Opnd*)srcs[1]));
- }
-#endif
- else if (src_type->isInteger ())
- {
- if (src_type->isInt8 () || src_type->isUInt8 ())
- appendInsts (irManager.newInstEx (Mnemonic_MOVQ, 1, dst, (Opnd*)srcs[0]));
- else
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, dst, (Opnd*)srcs[0]));
-
- Mnemonic insr_mn;
-
- switch (numSrcs)
- {
- case 2:
- insr_mn = Mnemonic_PINSRQ;
- break;
- case 4:
- insr_mn = Mnemonic_PINSRD;
- break;
- case 8:
- insr_mn = Mnemonic_PINSRW;
- break;
- case 16:
- insr_mn = Mnemonic_PINSRB;
- break;
- default:
- assert (0);
- }
-
-#ifdef _HAVE_SIMD_4_2_
- // Generates SSE4 instructions
- for (unsigned i = 1; i < numSrcs; i++)
- {
- Opnd *cnt = irManager.newImmOpnd (irManager.getTypeManager().getInt8Type(), i);
- appendInsts (irManager.newInstEx (insr_mn, 1, dst, dst, (Opnd*)srcs[i], cnt));
- }
-#else
- // For processors that don't support SSE4
- Opnd *temp = irManager.newOpnd (dst_type);
- Opnd *cnt1 = irManager.newImmOpnd (irManager.getTypeManager().getInt8Type(), 4);
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, temp, (Opnd*)srcs[1]));
- appendInsts (irManager.newInstEx (Mnemonic_PSLLDQ, 1, temp, temp, cnt1));
- appendInsts (irManager.newInstEx (Mnemonic_POR, 1, dst, dst, temp));
- Opnd *cnt2 = irManager.newImmOpnd (irManager.getTypeManager().getInt8Type(), 8);
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, temp, (Opnd*)srcs[2]));
- appendInsts (irManager.newInstEx (Mnemonic_PSLLDQ, 1, temp, temp, cnt2));
- appendInsts (irManager.newInstEx (Mnemonic_POR, 1, dst, dst, temp));
- Opnd *cnt3 = irManager.newImmOpnd (irManager.getTypeManager().getInt8Type(), 12);
- appendInsts (irManager.newInstEx (Mnemonic_MOVD, 1, temp, (Opnd*)srcs[3]));
- appendInsts (irManager.newInstEx (Mnemonic_PSLLDQ, 1, temp, temp, cnt3));
- appendInsts (irManager.newInstEx (Mnemonic_POR, 1, dst, dst, temp));
-#endif
- }
- else
- assert (0);
-
- return dst;
-}
-
-CG_OpndHandle* InstCodeSelector::vecCmpStr(Type *dst_type, U_32 numSrcs, CG_OpndHandle** srcs)
-{
- Opnd *dst = irManager.newOpnd (dst_type);
-
- switch (numSrcs)
- {
- case 3:
- // Implicit string length
- appendInsts (irManager.newInstEx ((dst_type->tag == Type::Vector
- ? Mnemonic_PCMPISTRM : Mnemonic_PCMPISTRI),
- 1, dst, (Opnd*)srcs[0], (Opnd*)srcs[1],
- (Opnd*)srcs[2]));
- break;
-
- case 5:
- // Explicit string length
- appendInsts (irManager.newInstEx ((dst_type->tag == Type::Vector
- ? Mnemonic_PCMPESTRM : Mnemonic_PCMPESTRI),
- 1, dst, (Opnd*)srcs[1], (Opnd*)srcs[3],
- (Opnd*)srcs[0], (Opnd*)srcs[2], (Opnd*)srcs[4]));
- break;
-
- default:
- assert (0);
- }
-
- return dst;
-}
-
-//_______________________________________________________________________________________________________________
// Create a tau point definition indicating that control flow reached the current point
CG_OpndHandle* InstCodeSelector::tauPoint()
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.h?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32InstCodeSelector.h Mon Jun 7 07:47:11 2010
@@ -89,7 +89,6 @@ public:
CG_OpndHandle* and_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2);
CG_OpndHandle* or_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2);
CG_OpndHandle* xor_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2);
- CG_OpndHandle* andnot_(IntegerOp::Types,CG_OpndHandle* src1,CG_OpndHandle* src2);
CG_OpndHandle* not_(IntegerOp::Types,CG_OpndHandle* src);
CG_OpndHandle* shladd(IntegerOp::Types,CG_OpndHandle* value,
U_32 shiftAmount, CG_OpndHandle* addto);
@@ -112,9 +111,6 @@ public:
CG_OpndHandle* convToInt(ConvertToIntOp::Types,bool isSigned, bool isZeroExtend,
ConvertToIntOp::OverflowMod,Type* dstType, CG_OpndHandle* src);
CG_OpndHandle* convToFp(ConvertToFpOp::Types, Type* dstType, CG_OpndHandle* src);
- Opnd* vectorExtension (VectorType* dst_type, CG_OpndHandle* src,
- Type::Tag src_elem_tag, bool is_zero_extend);
- CG_OpndHandle* convToVector(VectorType* dstType, CG_OpndHandle* src, bool is_zero_extend);
/// convert unmanaged pointer to object. Boxing
CG_OpndHandle* convUPtrToObject(ObjectType * dstType, CG_OpndHandle* val);
@@ -261,16 +257,6 @@ public:
CG_OpndHandle* copy(CG_OpndHandle *src);
void prefetch(CG_OpndHandle *addr);
- CG_OpndHandle* vecAddSub(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2);
- CG_OpndHandle* vecHadd(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2);
- CG_OpndHandle* vecHsub(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2);
- CG_OpndHandle* vecShuffle(Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2,
- CG_OpndHandle* pattern);
- CG_OpndHandle* vecExtract(Type *dst_type, CG_OpndHandle* src, CG_OpndHandle* index);
- CG_OpndHandle* vecPackScalars(Type *dst_type, U_32 numSrcs, CG_OpndHandle** srcs);
- CG_OpndHandle* vecInterleave(bool high, Type *dst_type, CG_OpndHandle* src1, CG_OpndHandle* src2);
- CG_OpndHandle* vecCmpStr(Type *dst_type, U_32 numSrcs, CG_OpndHandle** srcs);
-
void pseudoInst();
void methodEntry(MethodDesc* mDesc);
@@ -341,8 +327,6 @@ private:
Opnd * fpOp(Mnemonic mn, Type * dstType, Opnd * src1, Opnd * src2);
- Opnd * vecBinaryOp(Mnemonic mn, Opnd * src1, Opnd * src2);
-
Opnd * createResultOpnd(Type * dstType);
Opnd * divOp(DivOp::Types op, bool rem, Opnd * src1, Opnd * src2);
@@ -399,8 +383,6 @@ private:
Opnd *baseTau, Opnd *offsetTau);
void simpleStInd(Opnd *addr, Opnd *src, Type::Tag memType,
bool autoCompressRef, Opnd *baseTau, Opnd *offsetAndTypeTau);
- CG_OpndHandle* vectorLdInd(Type *dstType, Opnd *addr);
- void vectorStInd(Opnd *addr, Opnd *src);
Type * getFieldRefType(Type *dstType, Type::Tag memType);
void simplifyTypeTag(Type::Tag& tag,Type *ptr);
Opnd ** createReturnArray(Type * retType, U_32& numRegRet);
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32StackLayout.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32StackLayout.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32StackLayout.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/codegenerator/ia32/Ia32StackLayout.cpp Mon Jun 7 07:47:11 2010
@@ -350,7 +350,7 @@ void StackLayouter::createProlog()
offset &= ~(stackSizeAlignment - 1);
if (cConvention->getStackAlignment() == STACK_ALIGN_HALF16 &&
- (offset & (STACK_ALIGN16 - 1)) == 0) {
+ (offset & ~(STACK_ALIGN16 - 1)) == 0) {
// Need to align size of callee save area on half of 16-bytes
// thus resulting stack pointer will be 16-bytes aligned.
offset -= STACK_ALIGN_HALF16;
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/jet/cg_fld_arr.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/jet/cg_fld_arr.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/jet/cg_fld_arr.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/jet/cg_fld_arr.cpp Mon Jun 7 07:47:11 2010
@@ -31,7 +31,6 @@
#include "trace.h"
#include "VMMagic.h"
-#include "SIMD.h"
namespace Jitrino {
namespace Jet {
@@ -271,8 +270,6 @@ void CodeGen::do_field_op(const FieldOpI
const char* fieldDescName = class_cp_get_entry_descriptor(fieldOp.enclClass, fieldOp.cpIndex);
bool fieldIsMagic = VMMagicUtils::isVMMagicClass(fieldDescName);
- fieldIsMagic = fieldIsMagic || SIMDUtils::isSIMDClass(fieldDescName);
-
if (fieldIsMagic) {
jt = iplatf;
}
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/CodeSelectors.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/CodeSelectors.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/CodeSelectors.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/CodeSelectors.cpp Mon Jun 7 07:47:11 2010
@@ -105,38 +105,6 @@ ArithmeticOp::Types _BlockCodeSelector::
return ArithmeticOp::S;
case Type::Double:
return ArithmeticOp::D;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return ArithmeticOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return ArithmeticOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return ArithmeticOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return ArithmeticOp::VI8_2;
- case Type::Single:
- if (dst_type->getLength () == 4)
- return ArithmeticOp::VS_4;
- case Type::Double:
- if (dst_type->getLength () == 2)
- return ArithmeticOp::VD_2;
- default:
- ;
- }
-
- assert (0);
- }
default: assert(0);
}
assert(0);
@@ -231,38 +199,6 @@ DivOp::Types _BlockCodeSelector::mapToDi
return DivOp::S;
case Type::Double:
return DivOp::D;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return DivOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return DivOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return DivOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return DivOp::VI8_2;
- case Type::Single:
- if (dst_type->getLength () == 4)
- return DivOp::VS_4;
- case Type::Double:
- if (dst_type->getLength () == 2)
- return DivOp::VD_2;
- default:
- ;
- }
-
- assert (0);
- }
default: assert(0);
}
assert(0);
@@ -302,38 +238,6 @@ NegOp::Types _BlockCodeSelector::mapToNe
return NegOp::S;
case Type::Double:
return NegOp::D;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return NegOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return NegOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return NegOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return NegOp::VI8_2;
- case Type::Single:
- if (dst_type->getLength () == 4)
- return NegOp::VS_4;
- case Type::Double:
- if (dst_type->getLength () == 2)
- return NegOp::VD_2;
- default:
- ;
- }
-
- assert (0);
- }
default: assert(0);
}
assert(0);
@@ -353,32 +257,6 @@ IntegerOp::Types _BlockCodeSelector::map
case Type::IntPtr:
case Type::UIntPtr:
return IntegerOp::I;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return IntegerOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return IntegerOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return IntegerOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return IntegerOp::VI8_2;
- default:
- ;
- }
-
- assert (0);
- }
default: assert(0);
}
assert(0);
@@ -404,38 +282,6 @@ CompareOp::Types _BlockCodeSelector::map
return CompareOp::S;
case Type::Double:
return CompareOp::D;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return CompareOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return CompareOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return CompareOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return CompareOp::VI8_2;
- case Type::Single:
- if (dst_type->getLength () == 4)
- return CompareOp::VS_4;
- case Type::Double:
- if (dst_type->getLength () == 2)
- return CompareOp::VD_2;
- default:
- ;
- }
-
- assert (0);
- }
default:
assert(Type::isReference(type));
@@ -455,38 +301,6 @@ CompareZeroOp::Types _BlockCodeSelector:
return CompareZeroOp::I8;
case Type::IntPtr:
return CompareZeroOp::I;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return CompareZeroOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return CompareZeroOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return CompareZeroOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return CompareZeroOp::VI8_2;
- case Type::Single:
- if (dst_type->getLength () == 4)
- return CompareZeroOp::VS_4;
- case Type::Double:
- if (dst_type->getLength () == 2)
- return CompareZeroOp::VD_2;
- default:
- ;
- }
-
- assert (0);
- }
default:
assert(Type::isReference(type));
return CompareZeroOp::Ref;
@@ -523,26 +337,6 @@ ConvertToFpOp::Types _BlockCodeSelector:
case Type::Single: return ConvertToFpOp::Single;
case Type::Double: return ConvertToFpOp::Double;
case Type::Float: return ConvertToFpOp::FloatFromUnsigned;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Single:
- if (dst_type->getLength () == 4)
- return ConvertToFpOp::VS_4;
- case Type::Double:
- if (dst_type->getLength () == 2)
- return ConvertToFpOp::VD_2;
- default:
- ;
- }
-
- assert (0);
- }
default: assert(0);
}
assert(0);
@@ -570,32 +364,6 @@ ConvertToIntOp::Types _BlockCodeSelector
case Type::IntPtr:
case Type::UIntPtr:
return ConvertToIntOp::I;
- case Type::Vector:
- {
- VectorType *dst_type = inst->getDst()->getType()->asVectorType ();
- assert (dst_type);
- NamedType *elem_type = dst_type->getElemType ();
-
- switch (elem_type->tag)
- {
- case Type::Int8:
- if (dst_type->getLength () == 16)
- return ConvertToIntOp::VI1_16;
- case Type::Int16:
- if (dst_type->getLength () == 8)
- return ConvertToIntOp::VI2_8;
- case Type::Int32:
- if (dst_type->getLength () == 4)
- return ConvertToIntOp::VI4_4;
- case Type::Int64:
- if (dst_type->getLength () == 2)
- return ConvertToIntOp::VI8_2;
- default:
- ;
- }
-
- assert (0);
- }
default: assert(0);
}
assert(0);
@@ -820,14 +588,6 @@ void _BlockCodeSelector::genInstCode(Ins
getCGInst(inst->getSrc(1)));
}
break;
- case Op_AndNot:
- {
- assert(inst->getNumSrcOperands() == 2);
- cgInst = instructionCallback.andnot_(mapToIntegerOpType(inst),
- getCGInst(inst->getSrc(0)),
- getCGInst(inst->getSrc(1)));
- }
- break;
case Op_Not:
{
assert(inst->getNumSrcOperands() == 1);
@@ -858,11 +618,6 @@ void _BlockCodeSelector::genInstCode(Ins
cgInst = instructionCallback.convUPtrToObject(dstType->asObjectType(), getCGInst(inst->getSrc(0)));
} else if (dstType->isUnmanagedPtr()) {
cgInst = instructionCallback.convToUPtr(dstType->asPtrType(), getCGInst(inst->getSrc(0)));
- } else if (dstType->isVector()) {
- cgInst = instructionCallback.convToVector
- (dstType->asVectorType (),
- getCGInst (inst->getSrc (0)),
- inst->getOpcode() == Op_ConvZE);
} else {
bool isSigned = Type::isSignedInteger(inst->getType());
bool isZeroExtend = inst->getOpcode() == Op_ConvZE;
@@ -2031,83 +1786,6 @@ void _BlockCodeSelector::genInstCode(Ins
instructionCallback.prefetch(getCGInst(addr));
}
break;
- case Op_VecAddSub:
- {
- assert(inst->getNumSrcOperands() == 2);
- cgInst = instructionCallback.vecAddSub (inst->getDst()->getType (),
- getCGInst (inst->getSrc (0)),
- getCGInst (inst->getSrc (1)));
- }
- break;
- case Op_VecHadd:
- {
- assert(inst->getNumSrcOperands() == 2);
- cgInst = instructionCallback.vecHadd (inst->getDst()->getType (),
- getCGInst (inst->getSrc (0)),
- getCGInst (inst->getSrc (1)));
- }
- break;
- case Op_VecHsub:
- {
- assert(inst->getNumSrcOperands() == 2);
- cgInst = instructionCallback.vecHsub (inst->getDst()->getType (),
- getCGInst (inst->getSrc (0)),
- getCGInst (inst->getSrc (1)));
- }
- break;
- case Op_VecShuffle:
- {
- assert(inst->getNumSrcOperands() == 3);
- cgInst = instructionCallback.vecShuffle (inst->getDst()->getType (),
- getCGInst (inst->getSrc (0)),
- getCGInst (inst->getSrc (1)),
- getCGInst (inst->getSrc (2)));
- }
- break;
- case Op_VecExtract:
- {
- assert(inst->getNumSrcOperands() == 2);
- Type *dst_type = inst->getDst()->getType ();
- Opnd *vector = inst->getSrc(0);
- Opnd *index = inst->getSrc(1);
- cgInst = instructionCallback.vecExtract(dst_type, getCGInst(vector),
- getCGInst (index));
- }
- break;
- case Op_VecPackScalars:
- {
- Type *dst_type = inst->getDst()->getType ();
- U_32 numSrcs = inst->getNumSrcOperands();
- CG_OpndHandle **srcs = genCallArgs(inst, 0);
- cgInst = instructionCallback.vecPackScalars(dst_type, numSrcs, srcs);
- }
- break;
- case Op_VecInterleaveHigh:
- {
- assert(inst->getNumSrcOperands() == 2);
- cgInst = instructionCallback.vecInterleave
- (true, inst->getDst()->getType (),
- getCGInst (inst->getSrc (0)),
- getCGInst (inst->getSrc (1)));
- }
- break;
- case Op_VecInterleaveLow:
- {
- assert(inst->getNumSrcOperands() == 2);
- cgInst = instructionCallback.vecInterleave
- (false, inst->getDst()->getType (),
- getCGInst (inst->getSrc (0)),
- getCGInst (inst->getSrc (1)));
- }
- break;
- case Op_VecCmpStr:
- {
- Type *dst_type = inst->getDst()->getType ();
- U_32 numSrcs = inst->getNumSrcOperands();
- CG_OpndHandle **srcs = genCallArgs(inst, 0);
- cgInst = instructionCallback.vecCmpStr(dst_type, numSrcs, srcs);
- }
- break;
case Op_TauPoint:
{
assert(inst->getNumSrcOperands() == 0);
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.cpp?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.cpp (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.cpp Mon Jun 7 07:47:11 2010
@@ -446,33 +446,6 @@ Node* FlowGraph::duplicateRegion(IRManag
return duplicateRegion(irm, entry, nodesInRegion, defUses, *nodeRenameTable, *opndRenameTable, newEntryFreq);
}
-
-Node* FlowGraph::duplicateSingleNode(IRManager& irm, Node* node,
- StlBitVector& nodesInRegion,
- DefUseBuilder& defUses,
- OpndRenameTable& opndRenameTable,
- double newNodeFreq) {
- NodeRenameTable* reverseNodeRenameTable = new (irm.getMemoryManager())
- NodeRenameTable(irm.getMemoryManager(), nodesInRegion.size());
- Node* newNode = duplicateNode(irm, node, &nodesInRegion, &defUses, &opndRenameTable, reverseNodeRenameTable);
- if(newNodeFreq == 0) {
- return newNode;
- }
- double scale = newNodeFreq / node->getExecCount();
- assert(scale >=0 && scale <= 1);
- newNode->setExecCount(node->getExecCount()*scale);
- node->setExecCount(node->getExecCount()*(1-scale));
- return newNode;
-}
-
-Node* FlowGraph::duplicateSingleNode(IRManager& irm, Node* node, StlBitVector& nodesInRegion, DefUseBuilder& defUses, double newNodeFreq) {
- MemoryManager dupMemManager("FlowGraph::duplicateRegion.dupMemManager");
- // prepare the hashtable for the operand rename translation
- OpndRenameTable *opndRenameTable = new (dupMemManager) OpndRenameTable(dupMemManager, nodesInRegion.size());
- return duplicateSingleNode(irm, node, nodesInRegion, defUses, *opndRenameTable, newNodeFreq);
-}
-
-
void FlowGraph::renameOperandsInNode(Node *node, OpndRenameTable *renameTable) {
Inst *first = (Inst*)node->getFirstInst();
for (Inst *inst = first->getNextInst(); inst != NULL; inst = inst->getNextInst()) {
Modified: harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.h?rev=952128&r1=952127&r2=952128&view=diff
==============================================================================
--- harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.h (original)
+++ harmony/enhanced/java/trunk/drlvm/vm/jitrino/src/optimizer/FlowGraph.h Mon Jun 7 07:47:11 2010
@@ -71,10 +71,6 @@ public:
static Node* duplicateRegion(IRManager& irm, Node* entry, StlBitVector& nodesInRegion, DefUseBuilder& defUses, NodeRenameTable& nodeRenameTable, OpndRenameTable& opndRenameTable, double newEntryFreq = 0.0);
- static Node* duplicateSingleNode(IRManager& irm, Node* node, StlBitVector& nodesInRegion, DefUseBuilder& defUses, OpndRenameTable& opndRenameTable, double newNodeFreq=0.0);
- static Node* duplicateSingleNode(IRManager& irm, Node* node, StlBitVector& nodesInRegion, DefUseBuilder& defUses, double newNodeFreq=0.0);
-
-
static void renameOperandsInNode(Node *node, OpndRenameTable *renameTable);
static void doTranslatorCleanupPhase(IRManager& irm);