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Posted to commits@nuttx.apache.org by ac...@apache.org on 2020/01/14 14:47:50 UTC
[incubator-nuttx] 07/07: Add SPWM example to test STM32L4 PWM
driver low level operations.
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch pr98
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 7b7d637f01204f5ea86d93c02edb7c5f6b63d4cc
Author: Daniel P. Carvalho <da...@gmail.com>
AuthorDate: Tue Jan 14 11:29:09 2020 -0300
Add SPWM example to test STM32L4 PWM driver low level operations.
---
boards/arm/stm32l4/nucleo-l432kc/Kconfig | 34 +
boards/arm/stm32l4/nucleo-l432kc/README.txt | 11 +
.../stm32l4/nucleo-l432kc/configs/spwm/defconfig | 1360 ++++++++++++++++++++
boards/arm/stm32l4/nucleo-l432kc/src/Makefile | 4 +
boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c | 664 ++++++++++
5 files changed, 2073 insertions(+)
diff --git a/boards/arm/stm32l4/nucleo-l432kc/Kconfig b/boards/arm/stm32l4/nucleo-l432kc/Kconfig
index f913f96..353f988 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/Kconfig
+++ b/boards/arm/stm32l4/nucleo-l432kc/Kconfig
@@ -107,4 +107,38 @@ endchoice
endmenu
+menuconfig NUCLEOL432KC_SPWM
+ bool "Sinusoidal PWM generator example"
+ default n
+
+if NUCLEOL432KC_SPWM
+
+choice
+ prompt "Sinusoidal PWM source"
+ default NUCLEOL432KC_SPWM_USE_TIM1
+
+config NUCLEOL432KC_SPWM_USE_TIM1
+ bool "Use TIM1 as PWM source"
+
+endchoice
+
+config NUCLEOL432KC_SPWM_PWM_FREQ
+ int "PWM frequency in Hz"
+ default 100000
+
+config NUCLEOL432KC_SPWM_SAMPLES
+ int "Sine samples"
+ default 100
+
+config NUCLEOL432KC_SPWM_FREQ
+ int "Waveform frequency in Hz"
+ default 60
+
+config NUCLEOL432KC_SPWM_PHASE_NUM
+ int "Number of phases"
+ default 1
+ range 1 4 if NUCLEOL432KC_SPWM_USE_TIM1
+
+endif
+
endif # ARCH_BOARD_NUCLEO_L432KC
diff --git a/boards/arm/stm32l4/nucleo-l432kc/README.txt b/boards/arm/stm32l4/nucleo-l432kc/README.txt
index 5f19b4e..aac5e14 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/README.txt
+++ b/boards/arm/stm32l4/nucleo-l432kc/README.txt
@@ -535,3 +535,14 @@ Configurations
Pin 33 PA10 USART1_TX some RS-232 converters
Pin 20 GND
Pin 8 U5V
+
+ spwm
+ ----
+
+ Configures the sinusoidal PWM (SPWM) example which presents a simple use case
+ of the STM32L4 PWM lower-half driver without generic upper-half PWM logic.
+
+ It uses TIM1 to generate PWM and TIM6 to change waveform samples
+
+ At the moment, the waveform parameters are hardcoded, but it should be easy to
+ modify this example and make it more functional.
\ No newline at end of file
diff --git a/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig b/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig
new file mode 100755
index 0000000..6c2ce2b
--- /dev/null
+++ b/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig
@@ -0,0 +1,1360 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_MACOS is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_CXD56_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+# CONFIG_DFU_BINARY is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_HAVE_STDINT_H is not set
+# CONFIG_ARCH_HAVE_STDBOOL_H is not set
+# CONFIG_ARCH_HAVE_MATH_H is not set
+CONFIG_ARCH_FLOAT_H=y
+CONFIG_ARCH_HAVE_STDARG_H=y
+# CONFIG_ARCH_STDARG_H is not set
+CONFIG_ARCH_HAVE_SETJMP=y
+# CONFIG_ARCH_SETJMP_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+# CONFIG_ARCH_OR1K is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_AM335X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_IMXRT is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LC823450 is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_LPC17XX_40XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_LPC54XX is not set
+# CONFIG_ARCH_CHIP_MAX326XX is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_CHIP_NRF52 is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_S32K1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD2X is not set
+# CONFIG_ARCH_CHIP_SAML2X is not set
+# CONFIG_ARCH_CHIP_SAMD5X is not set
+# CONFIG_ARCH_CHIP_SAME5X is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+# CONFIG_ARCH_CHIP_STM32F0 is not set
+# CONFIG_ARCH_CHIP_STM32L0 is not set
+# CONFIG_ARCH_CHIP_STM32G0 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32H7 is not set
+CONFIG_ARCH_CHIP_STM32L4=y
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_XMC4 is not set
+# CONFIG_ARCH_CHIP_CXD56XX is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM1136J is not set
+# CONFIG_ARCH_ARM1156T2 is not set
+# CONFIG_ARCH_ARM1176JZ is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+CONFIG_ARCH_ARMV7M=y
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_ARMV7A is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA7 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_ARMV7R is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32l4"
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y
+# CONFIG_DEBUG_HARDFAULT_ALERT is not set
+CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y
+# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARMV7M_USEBASEPRI=y
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
+# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_USART2_RS485 is not set
+# CONFIG_USART2_RXDMA is not set
+# CONFIG_USART2_TXDMA is not set
+
+#
+# STM32L4 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L412KB is not set
+# CONFIG_ARCH_CHIP_STM32L432KB is not set
+CONFIG_ARCH_CHIP_STM32L432KC=y
+# CONFIG_ARCH_CHIP_STM32L433CB is not set
+# CONFIG_ARCH_CHIP_STM32L433CC is not set
+# CONFIG_ARCH_CHIP_STM32L433RB is not set
+# CONFIG_ARCH_CHIP_STM32L433RC is not set
+# CONFIG_ARCH_CHIP_STM32L433VC is not set
+# CONFIG_ARCH_CHIP_STM32L442KC is not set
+# CONFIG_ARCH_CHIP_STM32L443CC is not set
+# CONFIG_ARCH_CHIP_STM32L443RC is not set
+# CONFIG_ARCH_CHIP_STM32L443VC is not set
+# CONFIG_ARCH_CHIP_STM32L451CC is not set
+# CONFIG_ARCH_CHIP_STM32L451CE is not set
+# CONFIG_ARCH_CHIP_STM32L451RC is not set
+# CONFIG_ARCH_CHIP_STM32L451RE is not set
+# CONFIG_ARCH_CHIP_STM32L451VC is not set
+# CONFIG_ARCH_CHIP_STM32L451VE is not set
+# CONFIG_ARCH_CHIP_STM32L452CC is not set
+# CONFIG_ARCH_CHIP_STM32L452CE is not set
+# CONFIG_ARCH_CHIP_STM32L452RC is not set
+# CONFIG_ARCH_CHIP_STM32L452RE is not set
+# CONFIG_ARCH_CHIP_STM32L452VC is not set
+# CONFIG_ARCH_CHIP_STM32L452VE is not set
+# CONFIG_ARCH_CHIP_STM32L462CE is not set
+# CONFIG_ARCH_CHIP_STM32L462RE is not set
+# CONFIG_ARCH_CHIP_STM32L462VE is not set
+# CONFIG_ARCH_CHIP_STM32L475RG is not set
+# CONFIG_ARCH_CHIP_STM32L475RE is not set
+# CONFIG_ARCH_CHIP_STM32L475RC is not set
+# CONFIG_ARCH_CHIP_STM32L475VG is not set
+# CONFIG_ARCH_CHIP_STM32L475VE is not set
+# CONFIG_ARCH_CHIP_STM32L475VC is not set
+# CONFIG_ARCH_CHIP_STM32L476RG is not set
+# CONFIG_ARCH_CHIP_STM32L476RE is not set
+# CONFIG_ARCH_CHIP_STM32L486RG is not set
+# CONFIG_ARCH_CHIP_STM32L486JG is not set
+# CONFIG_ARCH_CHIP_STM32L486VG is not set
+# CONFIG_ARCH_CHIP_STM32L486QG is not set
+# CONFIG_ARCH_CHIP_STM32L486ZG is not set
+# CONFIG_ARCH_CHIP_STM32L496RE is not set
+# CONFIG_ARCH_CHIP_STM32L496RG is not set
+# CONFIG_ARCH_CHIP_STM32L496VE is not set
+# CONFIG_ARCH_CHIP_STM32L496VG is not set
+# CONFIG_ARCH_CHIP_STM32L496ZE is not set
+# CONFIG_ARCH_CHIP_STM32L496ZG is not set
+# CONFIG_ARCH_CHIP_STM32L496AG is not set
+# CONFIG_ARCH_CHIP_STM32L4A6RG is not set
+# CONFIG_ARCH_CHIP_STM32L4A6VG is not set
+# CONFIG_ARCH_CHIP_STM32L4A6QG is not set
+# CONFIG_ARCH_CHIP_STM32L4A6ZG is not set
+# CONFIG_ARCH_CHIP_STM32L4A6AG is not set
+# CONFIG_ARCH_CHIP_STM32L4R5ZI is not set
+# CONFIG_ARCH_CHIP_STM32L4R9AI is not set
+# CONFIG_STM32L4_STM32L4X1 is not set
+CONFIG_STM32L4_STM32L4X2=y
+CONFIG_STM32L4_STM32L4X3=y
+# CONFIG_STM32L4_STM32L4X5 is not set
+# CONFIG_STM32L4_STM32L4X6 is not set
+# CONFIG_STM32L4_STM32L4XR is not set
+# CONFIG_STM32L4_STM32L412XX is not set
+# CONFIG_STM32L4_STM32L422XX is not set
+# CONFIG_STM32L4_STM32L431XX is not set
+CONFIG_STM32L4_STM32L432XX=y
+# CONFIG_STM32L4_STM32L433XX is not set
+# CONFIG_STM32L4_STM32L442XX is not set
+# CONFIG_STM32L4_STM32L443XX is not set
+# CONFIG_STM32L4_STM32L451XX is not set
+# CONFIG_STM32L4_STM32L452XX is not set
+# CONFIG_STM32L4_STM32L462XX is not set
+# CONFIG_STM32L4_STM32L471XX is not set
+# CONFIG_STM32L4_STM32L475XX is not set
+# CONFIG_STM32L4_STM32L476XX is not set
+# CONFIG_STM32L4_STM32L486XX is not set
+# CONFIG_STM32L4_STM32L496XX is not set
+# CONFIG_STM32L4_STM32L4A6XX is not set
+# CONFIG_STM32L4_STM32L4R5XX is not set
+# CONFIG_STM32L4_STM32L4S5XX is not set
+# CONFIG_STM32L4_STM32L4R7XX is not set
+# CONFIG_STM32L4_STM32L4S7XX is not set
+# CONFIG_STM32L4_STM32L4R9XX is not set
+# CONFIG_STM32L4_STM32L4S9XX is not set
+CONFIG_STM32L4_FLASH_OVERRIDE_DEFAULT=y
+# CONFIG_STM32L4_FLASH_OVERRIDE_8 is not set
+# CONFIG_STM32L4_FLASH_OVERRIDE_B is not set
+# CONFIG_STM32L4_FLASH_OVERRIDE_C is not set
+# CONFIG_STM32L4_FLASH_OVERRIDE_E is not set
+# CONFIG_STM32L4_FLASH_OVERRIDE_G is not set
+# CONFIG_STM32L4_FLASH_OVERRIDE_I is not set
+# CONFIG_STM32L4_FLASH_CONFIG_B is not set
+CONFIG_STM32L4_FLASH_CONFIG_C=y
+# CONFIG_STM32L4_FLASH_CONFIG_E is not set
+CONFIG_STM32L4_IO_CONFIG_K=y
+# CONFIG_STM32L4_IO_CONFIG_T is not set
+# CONFIG_STM32L4_IO_CONFIG_C is not set
+# CONFIG_STM32L4_IO_CONFIG_R is not set
+# CONFIG_STM32L4_IO_CONFIG_J is not set
+# CONFIG_STM32L4_IO_CONFIG_M is not set
+# CONFIG_STM32L4_IO_CONFIG_V is not set
+# CONFIG_STM32L4_IO_CONFIG_Q is not set
+# CONFIG_STM32L4_IO_CONFIG_Z is not set
+# CONFIG_STM32L4_IO_CONFIG_A is not set
+
+#
+# STM32L4 SRAM2 and SRAM3 Options
+#
+CONFIG_STM32L4_SRAM2_HEAP=y
+CONFIG_STM32L4_SRAM2_INIT=y
+
+#
+# STM32L4 Peripherals
+#
+
+#
+# STM32L4 Peripheral Support
+#
+# CONFIG_STM32L4_HAVE_ADC2 is not set
+# CONFIG_STM32L4_HAVE_ADC3 is not set
+# CONFIG_STM32L4_HAVE_AES is not set
+# CONFIG_STM32L4_HAVE_CAN2 is not set
+CONFIG_STM32L4_HAVE_COMP=y
+CONFIG_STM32L4_HAVE_DAC2=y
+# CONFIG_STM32L4_HAVE_DCMI is not set
+# CONFIG_STM32L4_HAVE_DFSDM1 is not set
+# CONFIG_STM32L4_HAVE_DMA2D is not set
+# CONFIG_STM32L4_HAVE_DMAMUX is not set
+# CONFIG_STM32L4_HAVE_FSMC is not set
+# CONFIG_STM32L4_HAVE_HASH is not set
+CONFIG_STM32L4_HAVE_HSI48=y
+# CONFIG_STM32L4_HAVE_I2C4 is not set
+# CONFIG_STM32L4_HAVE_LCD is not set
+# CONFIG_STM32L4_HAVE_LTDC is not set
+CONFIG_STM32L4_HAVE_LPTIM1=y
+CONFIG_STM32L4_HAVE_LPTIM2=y
+# CONFIG_STM32L4_HAVE_OTGFS is not set
+CONFIG_STM32L4_HAVE_USBFS=y
+CONFIG_STM32L4_HAVE_SAI1=y
+# CONFIG_STM32L4_HAVE_SAI2 is not set
+# CONFIG_STM32L4_RTC is not set
+# CONFIG_STM32L4_HAVE_SDMMC1 is not set
+# CONFIG_STM32L4_HAVE_TIM3 is not set
+# CONFIG_STM32L4_HAVE_TIM4 is not set
+# CONFIG_STM32L4_HAVE_TIM5 is not set
+CONFIG_STM32L4_HAVE_TIM7=y
+# CONFIG_STM32L4_HAVE_TIM8 is not set
+# CONFIG_STM32L4_HAVE_TIM17 is not set
+CONFIG_STM32L4_HAVE_USART1=y
+CONFIG_STM32L4_HAVE_USART2=y
+# CONFIG_STM32L4_HAVE_USART3 is not set
+# CONFIG_STM32L4_HAVE_UART4 is not set
+# CONFIG_STM32L4_HAVE_UART5 is not set
+# CONFIG_STM32L4_HAVE_QSPI is not set
+# CONFIG_STM32L4_ADC is not set
+# CONFIG_STM32L4_CAN is not set
+# CONFIG_STM32L4_DAC is not set
+# CONFIG_STM32L4_DFSDM is not set
+CONFIG_STM32L4_DMA=y
+# CONFIG_STM32L4_I2C is not set
+# CONFIG_STM32L4_SAI is not set
+# CONFIG_STM32L4_SPI is not set
+CONFIG_STM32L4_USART=y
+# CONFIG_STM32L4_LPTIM is not set
+# CONFIG_STM32L4_SDMMC is not set
+
+#
+# AHB1 Peripherals
+#
+CONFIG_STM32L4_DMA1=y
+CONFIG_STM32L4_DMA2=y
+# CONFIG_STM32L4_CRC is not set
+# CONFIG_STM32L4_TSC is not set
+
+#
+# AHB2 Peripherals
+#
+# CONFIG_STM32L4_ADC1 is not set
+# CONFIG_STM32L4_RNG is not set
+
+#
+# AHB3 Peripherals
+#
+
+#
+# APB1 Peripherals
+#
+# CONFIG_STM32L4_PWR is not set
+# CONFIG_STM32L4_TIM2 is not set
+CONFIG_STM32L4_TIM6=y
+# CONFIG_STM32L4_TIM7 is not set
+# CONFIG_STM32L4_SPI3 is not set
+CONFIG_STM32L4_USART2=y
+# CONFIG_STM32L4_I2C1 is not set
+# CONFIG_STM32L4_I2C3 is not set
+# CONFIG_STM32L4_CAN1 is not set
+# CONFIG_STM32L4_DAC1 is not set
+# CONFIG_STM32L4_DAC2 is not set
+# CONFIG_STM32L4_OPAMP is not set
+# CONFIG_STM32L4_LPTIM1 is not set
+# CONFIG_STM32L4_LPUART1 is not set
+# CONFIG_STM32L4_SWPMI is not set
+# CONFIG_STM32L4_LPTIM2 is not set
+# CONFIG_STM32L4_USBFS is not set
+
+#
+# APB2 Peripherals
+#
+# CONFIG_STM32L4_SYSCFG is not set
+CONFIG_STM32L4_TIM1=y
+# CONFIG_STM32L4_SPI1 is not set
+# CONFIG_STM32L4_USART1 is not set
+# CONFIG_STM32L4_TIM15 is not set
+# CONFIG_STM32L4_TIM16 is not set
+# CONFIG_STM32L4_COMP is not set
+# CONFIG_STM32L4_SAI1 is not set
+
+#
+# Other Peripherals
+#
+# CONFIG_STM32L4_BKPSRAM is not set
+# CONFIG_STM32L4_IWDG is not set
+# CONFIG_STM32L4_WWDG is not set
+# CONFIG_STM32L4_SAI1PLL is not set
+CONFIG_STM32L4_FLASH_PREFETCH=y
+CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32L4_HAVE_RTC_SUBSECONDS=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32L4_ONESHOT is not set
+# CONFIG_STM32L4_FREERUN is not set
+CONFIG_STM32L4_PWM_LL_OPS=y
+CONFIG_STM32L4_TIM1_PWM=y
+CONFIG_STM32L4_TIM1_MODE=0
+CONFIG_STM32L4_TIM1_LOCK=0
+CONFIG_STM32L4_TIM1_TDTS=0
+CONFIG_STM32L4_TIM1_DEADTIME=0
+CONFIG_STM32L4_TIM1_CH1OUT=y
+CONFIG_STM32L4_TIM1_CH1NOUT=y
+CONFIG_STM32L4_TIM1_CHANNEL=1
+CONFIG_STM32L4_TIM1_CHMODE=6
+# CONFIG_STM32L4_PWM_MULTICHAN is not set
+
+#
+# STM32L4 TIMx Outputs Configuration
+#
+CONFIG_STM32L4_TIM1_CH1POL=0
+CONFIG_STM32L4_TIM1_CH1IDLE=0
+CONFIG_STM32L4_TIM1_CH1NPOL=0
+CONFIG_STM32L4_TIM1_CH1NIDLE=0
+CONFIG_STM32L4_SERIALDRIVER=y
+
+#
+# U[S]ART Configuration
+#
+CONFIG_STM32L4_USART2_SERIALDRIVER=y
+# CONFIG_STM32L4_USART2_1WIREDRIVER is not set
+
+#
+# Serial Driver Configuration
+#
+# CONFIG_STM32L4_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set
+# CONFIG_STM32L4_USART_BREAKS is not set
+# CONFIG_STM32L4_USART_SINGLEWIRE is not set
+# CONFIG_STM32L4_USART_INVERT is not set
+# CONFIG_STM32L4_USART_SWAP is not set
+# CONFIG_ARCH_TOOLCHAIN_IAR is not set
+CONFIG_ARCH_TOOLCHAIN_GNU=y
+# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+CONFIG_ARCH_HAVE_IRQTRIGGER=y
+CONFIG_ARCH_DMA=y
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_ICACHE is not set
+# CONFIG_ARCH_DCACHE is not set
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_HAVE_LAZYFPU=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_PROGMEM=y
+CONFIG_ARCH_HAVE_RESET=y
+CONFIG_ARCH_HAVE_TESTSET=y
+CONFIG_ARCH_HAVE_FETCHADD=y
+CONFIG_ARCH_HAVE_RTC_SUBSECONDS=y
+# CONFIG_ARCH_HAVE_GARBAGE is not set
+# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_USE_MPU is not set
+CONFIG_ARCH_IRQPRIO=y
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+CONFIG_ARCH_RAMVECTORS=y
+# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=8499
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+CONFIG_ARCH_HIPRI_INTERRUPT=y
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=65536
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_NUCLEO_L432KC=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="nucleo-l432kc"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+# CONFIG_ARCH_BUTTONS is not set
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+
+#
+# U[S]ART Pin Layouts
+#
+
+#
+# USART1 is disabled. (Enable it under: System Type -> STM32L4 Peripheral Support)
+#
+# CONFIG_ARCH_BOARD_USART2_RX_PA3 is not set
+CONFIG_ARCH_BOARD_USART2_RX_PA15=y
+CONFIG_ARCH_BOARD_USART2_TX_PA2=y
+
+#
+# LPUART1 is disabled. (Enable it under: System Type -> STM32L4 Peripheral Support)
+#
+CONFIG_NUCLEOL432KC_SPWM=y
+CONFIG_NUCLEOL432KC_SPWM_USE_TIM1=y
+CONFIG_NUCLEOL432KC_SPWM_PWM_FREQ=200000
+CONFIG_NUCLEOL432KC_SPWM_SAMPLES=100
+CONFIG_NUCLEOL432KC_SPWM_FREQ=60
+CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM=1
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_FINALINIT is not set
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_MKRD=y
+# CONFIG_BOARDCTL_ROMDISK is not set
+# CONFIG_BOARDCTL_APP_SYMTAB is not set
+# CONFIG_BOARDCTL_TESTSET is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEMTICK_HOOK is not set
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_ARCH_HAVE_TIMEKEEPING is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2018
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_WDOG_INTRESERVE=1
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_IRQCHAIN is not set
+# CONFIG_IRQCOUNT is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="spwm_main"
+CONFIG_USERMAIN_PRIORITY=100
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+# CONFIG_SCHED_USER_IDENTITY is not set
+
+#
+# Pthread Options
+#
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_MUTEX_TYPES is not set
+CONFIG_PTHREAD_MUTEX_ROBUST=y
+# CONFIG_PTHREAD_MUTEX_UNSAFE is not set
+# CONFIG_PTHREAD_MUTEX_BOTH is not set
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_SUSPENDSCHEDULER is not set
+# CONFIG_SCHED_RESUMESCHEDULER is not set
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_EARLY_INITIALIZE is not set
+# CONFIG_BOARD_LATE_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Configuration
+#
+# CONFIG_SIG_DEFAULT is not set
+
+#
+# Signal Numbers
+#
+
+#
+# Standard Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALRM=3
+CONFIG_SIG_PIPE=11
+
+#
+# Non-standard Signal Numbers
+#
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DEV_SIMPLE_ADDRENV is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+CONFIG_DRVR_MKRD=y
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_TRIGGER is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+CONFIG_PWM=y
+# CONFIG_PWM_PULSECOUNT is not set
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_DRIVERS_AUDIO is not set
+# CONFIG_FB_CMAP is not set
+# CONFIG_FB_TRANSPARENCY is not set
+# CONFIG_DRIVERS_VIDEO is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+
+#
+# Character/Segment LCD Devices
+#
+# CONFIG_SLCD is not set
+
+#
+# Other LCD-related Devices
+#
+# CONFIG_LCD_OTHER is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_LEDS_APA102 is not set
+# CONFIG_LEDS_MAX7219 is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_ARCH_HAVE_SDIO is not set
+# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set
+# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set
+# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_DRIVERS_POWERLED is not set
+# CONFIG_DRIVERS_SMPS is not set
+# CONFIG_DRIVERS_MOTOR is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_SERIAL_REMOVABLE is not set
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_16550_UART is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_RS485CONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_TXDMA is not set
+# CONFIG_SERIAL_RXDMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+# CONFIG_SERIAL_TERMIOS is not set
+CONFIG_USART2_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_LPUART_SERIALDRIVER is not set
+# CONFIG_LPUART0_SERIALDRIVER is not set
+# CONFIG_LPUART1_SERIALDRIVER is not set
+# CONFIG_LPUART2_SERIALDRIVER is not set
+# CONFIG_LPUART3_SERIALDRIVER is not set
+# CONFIG_LPUART4_SERIALDRIVER is not set
+# CONFIG_LPUART5_SERIALDRIVER is not set
+# CONFIG_LPUART6_SERIALDRIVER is not set
+# CONFIG_LPUART7_SERIALDRIVER is not set
+# CONFIG_LPUART8_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+CONFIG_USART2_SERIALDRIVER=y
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_USART9_SERIALDRIVER is not set
+
+#
+# USART2 Configuration
+#
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART2_BAUD=115200
+CONFIG_USART2_BITS=8
+CONFIG_USART2_PARITY=0
+CONFIG_USART2_2STOP=0
+# CONFIG_USART2_IFLOWCONTROL is not set
+# CONFIG_USART2_OFLOWCONTROL is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_SCI2_SERIALDRIVER is not set
+# CONFIG_SCI3_SERIALDRIVER is not set
+# CONFIG_SCI4_SERIALDRIVER is not set
+# CONFIG_SCI5_SERIALDRIVER is not set
+# CONFIG_SCI6_SERIALDRIVER is not set
+# CONFIG_SCI7_SERIALDRIVER is not set
+# CONFIG_SCI8_SERIALDRIVER is not set
+# CONFIG_SCI9_SERIALDRIVER is not set
+# CONFIG_SCI10_SERIALDRIVER is not set
+# CONFIG_SCI11_SERIALDRIVER is not set
+# CONFIG_SCI12_SERIALDRIVER is not set
+# CONFIG_PSEUDOTERM is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_USBMISC is not set
+# CONFIG_HAVE_USBTRACE is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+# CONFIG_1WIRE is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+CONFIG_SYSLOG_WRITE=y
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_BUFFER is not set
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_PREFIX is not set
+CONFIG_SYSLOG_SERIAL_CONSOLE=y
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_SYSLOG_CONSOLE=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+# CONFIG_SPECIFIC_DRIVERS is not set
+# CONFIG_DRIVERS_RF is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET_WRITE_BUFFERS is not set
+# CONFIG_NET_READAHEAD is not set
+# CONFIG_NET_MCASTGROUP is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+
+#
+# Partition Table
+#
+# CONFIG_PTABLE_PARTITION is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_CROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_SPIFFS is not set
+# CONFIG_FS_LITTLEFS is not set
+# CONFIG_FS_UNIONFS is not set
+# CONFIG_FS_HOSTFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+# CONFIG_NXFONTS is not set
+
+#
+# Font Cache Pixel Depths
+#
+# CONFIG_NXFONTS_DISABLE_1BPP is not set
+# CONFIG_NXFONTS_DISABLE_2BPP is not set
+# CONFIG_NXFONTS_DISABLE_4BPP is not set
+# CONFIG_NXFONTS_DISABLE_8BPP is not set
+# CONFIG_NXFONTS_DISABLE_16BPP is not set
+# CONFIG_NXFONTS_DISABLE_24BPP is not set
+# CONFIG_NXFONTS_DISABLE_32BPP is not set
+CONFIG_NXFONTS_PACKEDMSFIRST=y
+# CONFIG_NXGLIB is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+# CONFIG_MM_FILL_ALLOCATIONS is not set
+
+#
+# Common I/O Buffer Support
+#
+# CONFIG_MM_IOB is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Video Support
+#
+
+#
+# Video subsystem
+#
+# CONFIG_VIDEO is not set
+
+#
+# Wireless Support
+#
+# CONFIG_WIRELESS is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_LOADABLE is not set
+# CONFIG_PIC is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_LIBC_PRINT_LEGACY is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_NUMBERED_ARGS is not set
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+CONFIG_LIBM=y
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+# CONFIG_ARMV7M_LIBM is not set
+# CONFIG_MACHINE_OPTS_ARMV7M is not set
+# CONFIG_LIBM_ARCH_FABSF is not set
+# CONFIG_LIBM_ARCH_SQRTF is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+CONFIG_LIB_HOSTNAME=""
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+
+#
+# pthread support
+#
+# CONFIG_LIBC_DLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_GROUP_FILE is not set
+# CONFIG_LIBC_PASSWD_FILE is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+# CONFIG_LIBC_LZF is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+# CONFIG_LIBC_IPv6_ADDRCONV is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# NETDB Support
+#
+# CONFIG_LIBC_GAISTRERROR is not set
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_ENVPATH is not set
+# CONFIG_LIB_HEX2BIN is not set
+CONFIG_BUILTIN=y
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# LLVM C++ Library (libcxx)
+#
+# CONFIG_LIBCXX is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+# CONFIG_LIBDSP is not set
+
+#
+# Open Asymmetric Multi Processing
+#
+# CONFIG_OPENAMP is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_ABNTCODI is not set
+# CONFIG_EXAMPLES_ADXL372_TEST is not set
+# CONFIG_EXAMPLES_APA102 is not set
+# CONFIG_EXAMPLES_AUDIO_SOUND is not set
+# CONFIG_EXAMPLES_BATTERY is not set
+# CONFIG_EXAMPLES_SIXAXIS is not set
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CALIB_UDELAY is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHARGER is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CHRONO is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DHTXX is not set
+# CONFIG_EXAMPLES_DSPTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_GPS is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_INA219 is not set
+# CONFIG_EXAMPLES_INA226 is not set
+# CONFIG_EXAMPLES_LSM330SPI_TEST is not set
+# CONFIG_EXAMPLES_LVGLDEMO is not set
+# CONFIG_EXAMPLES_MAX31855 is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MLX90614 is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MODBUSMASTER is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NXDEMO is not set
+# CONFIG_EXAMPLES_OBD2 is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PDCURSES is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_POWERLED is not set
+# CONFIG_EXAMPLES_POWERMONITOR is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_PWM is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMPS is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UID is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USERFS is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XBC_TEST is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_INIH is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_GRAPHICS_FT80X is not set
+# CONFIG_GRAPHICS_LVGL is not set
+
+#
+# NxWidgets
+#
+
+#
+# NxWM
+#
+# CONFIG_GRAPHICS_PDCURSES is not set
+# CONFIG_TIFF is not set
+
+#
+# Industrial Applications
+#
+# CONFIG_INDUSTRY_ABNT_CODI_LIB is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CJSON is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+# CONFIG_NSH_LIBRARY is not set
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+CONFIG_HAVE_CXXINITIALIZE=y
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_EMBEDLOG is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_NSH is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+# CONFIG_READLINE_HAVE_EXTMATCH is not set
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SETLOGMASK is not set
+# CONFIG_SYSTEM_SPITOOL is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_TERMCURSES is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
+
+#
+# Testing
+#
+# CONFIG_TESTING_CXXTEST is not set
+# CONFIG_TESTING_FSTEST is not set
+# CONFIG_TESTING_GETPRIME is not set
+# CONFIG_TESTING_NXFFS is not set
+# CONFIG_TESTING_OSTEST is not set
+# CONFIG_TESTING_SCANFTEST is not set
+# CONFIG_TESTING_SMART is not set
+# CONFIG_TESTING_SMART_TEST is not set
+# CONFIG_TESTING_UNITY is not set
+
+#
+# Wireless Libraries and NSH Add-Ons
+#
+
+#
+# Bluetooth applications
+#
+# CONFIG_BTSAK is not set
+
+#
+# IEEE 802.15.4 applications
+#
+# CONFIG_IEEE802154_I8SAK is not set
+# CONFIG_IEEE802154_LIBMAC is not set
+# CONFIG_IEEE802154_LIBUTILS is not set
diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/Makefile b/boards/arm/stm32l4/nucleo-l432kc/src/Makefile
index 9c0c71b..899191d 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/src/Makefile
+++ b/boards/arm/stm32l4/nucleo-l432kc/src/Makefile
@@ -92,4 +92,8 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
+ifeq ($(CONFIG_NUCLEOL432KC_SPWM),y)
+CSRCS += stm32_spwm.c
+endif
+
include $(TOPDIR)/boards/Board.mk
diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
new file mode 100644
index 0000000..132bca5
--- /dev/null
+++ b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_spwm.c
@@ -0,0 +1,664 @@
+/****************************************************************************
+ * boards/arm/stm32/nucleo-l432kc/src/stm32_spwm.c
+ *
+ * Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
+ * Author: Mateusz Szafoni <ra...@railab.me>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <strings.h>
+#include <unistd.h>
+#include <math.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/signal.h>
+
+#include <arch/irq.h>
+#include <arch/chip/chip.h>
+#include <arch/board/board.h>
+
+#include "up_internal.h"
+#include "ram_vectors.h"
+
+#include "stm32l4_pwm.h"
+#include "stm32l4_tim.h"
+
+#ifdef CONFIG_NUCLEOL432KC_SPWM
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Assertions ***************************************************************/
+
+#ifndef CONFIG_ARCH_CHIP_STM32L432KC
+# warning "This only have been verified with CONFIG_ARCH_CHIP_STM32L432KC"
+#endif
+
+#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
+# error "CONFIG_ARCH_HIPRI_INTERRUPT is required"
+#endif
+
+#ifndef CONFIG_ARCH_RAMVECTORS
+# error "CONFIG_ARCH_RAMVECTORS is required"
+#endif
+
+#ifndef CONFIG_ARCH_IRQPRIO
+# error "CONFIG_ARCH_IRQPRIO is required"
+#endif
+
+#ifndef CONFIG_ARCH_FPU
+# warning "Set CONFIG_ARCH_FPU for hardware FPU support"
+#endif
+
+/* Check the configuration for TIM1 */
+
+#ifdef CONFIG_NUCLEOL432KC_SPWM_USE_TIM1
+
+/* Phase 1 is TIM1 CH1 */
+
+# if CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM > 0
+# ifndef CONFIG_STM32L4_TIM1_CH1OUT
+# error
+# endif
+# ifndef CONFIG_STM32L4_TIM6
+# error
+# endif
+# endif
+
+/* Phase 2 is TIM1 CH2 */
+
+# if CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM > 1
+# ifndef CONFIG_STM32L4_TIM1_CH2OUT
+# error
+# endif
+# endif
+
+/* Phase 3 is TIM1 CH3 */
+
+# if CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM > 2
+# ifndef CONFIG_STM32L4_TIM1_CH3OUT
+# error
+# endif
+# endif
+
+/* Phase 4 is TIM1 CH4 */
+
+# if CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM > 3
+# ifndef CONFIG_STM32L4_TIM1_CH4OUT
+# error
+# endif
+# endif
+
+# if CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM != PWM_TIM1_NCHANNELS
+# error
+# endif
+
+#endif /* CONFIG_NUCLEOL432KC_SPWM_USE_TIM1 */
+
+/* Configuration ************************************************************/
+
+#ifdef CONFIG_NUCLEOL432KC_SPWM_USE_TIM1
+# define PWM_TIMERS_IN_USE 1
+#endif
+
+#define SPWM_PHASE_SHIFT ((360.0f/CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM))
+
+#define SAMPLES_NUM CONFIG_NUCLEOL432KC_SPWM_SAMPLES
+#define PHASES_NUM CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* SPWM private data */
+
+struct spwm_s
+{
+ FAR struct stm32l4_pwm_dev_s *pwm;
+#ifdef CONFIG_NUCLEOL432KC_SPWM_USE_TIM1
+ FAR struct stm32l4_tim_dev_s *tim;
+#endif
+ float waveform[SAMPLES_NUM]; /* Waveform samples */
+ float phase_step; /* Waveform phase step */
+ float waveform_freq; /* Waveform frequency */
+ uint16_t cmp[SAMPLES_NUM]; /* PWM TIM compare table */
+ uint16_t per; /* PWM TIM period */
+ uint16_t samples; /* Modulation waveform samples num */
+ uint16_t phase_shift[PHASES_NUM]; /* Phase offset */
+ volatile uint16_t sample_now[PHASES_NUM]; /* Current sample number for
+ * phase */
+ uint8_t phases; /* Number of PWM phases */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct spwm_s g_spwm =
+{
+ .waveform_freq = ((float)CONFIG_NUCLEOL432KC_SPWM_FREQ),
+ .phases = PHASES_NUM,
+ .samples = SAMPLES_NUM,
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static float waveform_func(float x);
+static int waveform_init(FAR struct spwm_s *spwm, float (*f)(float));
+static int spwm_start(FAR struct spwm_s *spwm);
+static int spwm_start(FAR struct spwm_s *spwm);
+static int spwm_stop(FAR struct spwm_s *spwm);
+#ifdef CONFIG_NUCLEOL432KC_SPWM_USE_TIM1
+static int spwm_tim1_setup(FAR struct spwm_s *spwm);
+static int spwm_tim6_setup(FAR struct spwm_s *spwm);
+static int spwm_tim1_start(FAR struct spwm_s *spwm);
+static int spwm_tim6_start(FAR struct spwm_s *spwm);
+static int spwm_tim1_stop(FAR struct spwm_s *spwm);
+static int spwm_tim6_stop(FAR struct spwm_s *spwm);
+#endif /* CONFIG_NUCLEOL432KC_SPWM_USE_TIM1 */
+static int spwm_setup(FAR struct spwm_s *spwm);
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: waveform_func
+ *
+ * Description:
+ * Modulation function. This function must return values from <0.0, 1.0>!
+ *
+ ****************************************************************************/
+
+static float waveform_func(float x)
+{
+ DEBUGASSERT(x >= 0 && x <= 2 * M_PI);
+
+ /* Sine modulation */
+
+ return (sinf(x) + 1.0f) / 2.0f;
+}
+
+/****************************************************************************
+ * Name: waveform_init
+ *
+ * Description:
+ * Initialize modulation waveform
+ *
+ ****************************************************************************/
+
+static int waveform_init(FAR struct spwm_s *spwm, float (*f)(float))
+{
+ uint16_t i = 0;
+ int ret = 0;
+
+ printf("Initialize waveform\n");
+
+ /* Get phase step to achieve one sine waveform period */
+
+ spwm->phase_step = (float)(2 * M_PI / spwm->samples);
+
+ /* Initialize sine and PWM compare tables */
+
+ for (i = 0; i < spwm->samples; i += 1)
+ {
+ /* We need sine in range from 0 to 1.0 */
+
+ spwm->waveform[i] = f(spwm->phase_step * i);
+
+ DEBUGASSERT(spwm->waveform[i] >= 0.0 && spwm->waveform[i] <= 2 * M_PI);
+
+ spwm->cmp[i] = (uint16_t)(spwm->waveform[i] * spwm->per);
+ }
+
+ /* Configure phase shift TODO: this should be configurable */
+
+ for (i = 0; i < spwm->phases; i += 1)
+ {
+ spwm->phase_shift[i] =
+ (spwm->samples / CONFIG_NUCLEOL432KC_SPWM_PHASE_NUM) * i;
+ }
+
+ /* Initialize offstes */
+
+ for (i = 0; i < spwm->phases; i += 1)
+ {
+ spwm->sample_now[i] = spwm->phase_shift[i];
+ }
+
+ printf("\tsamples = %d\n", spwm->samples);
+ printf("\tper = %d\n", spwm->per);
+ printf("\tphase = %d\n", spwm->phases);
+ for (i = 0; i < spwm->phases; i += 1)
+ {
+ printf("\tsnow%d = %d\n", i, spwm->sample_now[i]);
+ }
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: spwm_start
+ *
+ * Description:
+ * Start SPWM
+ *
+ ****************************************************************************/
+
+static int spwm_start(FAR struct spwm_s *spwm)
+{
+ /* Start TIM1 */
+
+ spwm_tim1_start(spwm);
+
+ /* Start TIM6 */
+
+ spwm_tim6_start(spwm);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: spwm_stop
+ *
+ * Description:
+ * Stop SPWM
+ *
+ ****************************************************************************/
+
+static int spwm_stop(FAR struct spwm_s *spwm)
+{
+ /* Stop TIM1 */
+
+ spwm_tim1_stop(spwm);
+
+ /* Stop TIM6 */
+
+ spwm_tim6_stop(spwm);
+
+ return OK;
+}
+
+#ifdef CONFIG_NUCLEOL432KC_SPWM_USE_TIM1
+
+/****************************************************************************
+ * Name: tim6_handler
+ ****************************************************************************/
+
+static void tim6_handler(void)
+{
+ FAR struct spwm_s *spwm = &g_spwm;
+ FAR struct stm32l4_pwm_dev_s *pwm = spwm->pwm;
+ FAR struct stm32l4_tim_dev_s *tim = spwm->tim;
+ uint8_t i = 0;
+
+ for (i = 0; i < spwm->phases; i += 1)
+ {
+ /* Set new CMP for timers */
+
+ PWM_CCR_UPDATE(pwm, i + 1, spwm->cmp[spwm->sample_now[i]]);
+
+ /* Increase sample pointer */
+
+ spwm->sample_now[i] += 1;
+
+ if (spwm->sample_now[i] > spwm->samples)
+ {
+ spwm->sample_now[i] = 0;
+ }
+ }
+
+ /* TODO: Software update */
+
+ STM32L4_TIM_ACKINT(tim, ATIM_SR_UIF);
+}
+
+/****************************************************************************
+ * Name: spwm_tim6_setup
+ ****************************************************************************/
+
+static int spwm_tim6_setup(FAR struct spwm_s *spwm)
+{
+ FAR struct stm32l4_tim_dev_s *tim = NULL;
+ uint64_t freq = 0;
+ uint32_t per = 0;
+ int ret = OK;
+
+ /* Get TIM6 interface */
+
+ tim = stm32l4_tim_init(6);
+ if (tim == NULL)
+ {
+ printf("ERROR: Failed to get TIM6 interface\n");
+ ret = -1;
+ goto errout;
+ }
+
+ spwm->tim = tim;
+
+ /* Frequency with which we will change samples.
+ *
+ * tim6_freq = samples_num * waveform_freq.
+ */
+
+ freq = spwm->samples * spwm->waveform_freq;
+ per = BOARD_TIM6_FREQUENCY / freq;
+ if (per > 0xFFFF)
+ {
+ printf("ERROR: can not achieve TIM6 frequency\n");
+ ret = -1;
+ goto errout;
+ }
+
+ /* TODO: TIM_SETFREQ */
+
+ STM32L4_TIM_SETCLOCK(tim, BOARD_TIM6_FREQUENCY);
+ STM32L4_TIM_SETPERIOD(tim, per);
+
+ /* Attach TIM6 ram vector */
+
+ ret = up_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
+ if (ret < 0)
+ {
+ printf("ERROR: up_ramvec_attach failed: %d\n", ret);
+ ret = -1;
+ goto errout;
+ }
+
+ /* Set the priority of the TIM6 interrupt vector */
+
+ ret = up_prioritize_irq(STM32L4_IRQ_TIM6, NVIC_SYSH_HIGH_PRIORITY);
+ if (ret < 0)
+ {
+ printf("ERROR: up_prioritize_irq failed: %d\n", ret);
+ ret = -1;
+ goto errout;
+ }
+
+ spwm_tim6_stop(spwm);
+
+errout:
+ return ret;
+}
+
+/****************************************************************************
+ * Name: spwm_tim6_start
+ ****************************************************************************/
+
+static int spwm_tim6_start(FAR struct spwm_s *spwm)
+{
+ FAR struct stm32l4_tim_dev_s *tim = spwm->tim;
+
+ /* Enable the timer interrupt at the NVIC and at TIM6 */
+
+ up_enable_irq(STM32L4_IRQ_TIM6);
+ STM32L4_TIM_ENABLEINT(tim, BTIM_DIER_UIE);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: spwm_tim6_stop
+ ****************************************************************************/
+
+static int spwm_tim6_stop(FAR struct spwm_s *spwm)
+{
+ FAR struct stm32l4_tim_dev_s *tim = spwm->tim;
+
+ /* Disable the timer interrupt at the NVIC and at TIM6 */
+
+ up_disable_irq(STM32L4_IRQ_TIM6);
+ STM32L4_TIM_DISABLEINT(tim, BTIM_DIER_UIE);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: spwm_tim1_setup
+ ****************************************************************************/
+
+static int spwm_tim1_setup(FAR struct spwm_s *spwm)
+{
+ FAR struct stm32l4_pwm_dev_s *pwm = NULL;
+ int ret = OK;
+
+ /* Get TIM1 PWM interface */
+
+ pwm = (FAR struct stm32l4_pwm_dev_s *)stm32l4_pwminitialize(1);
+ if (pwm == NULL)
+ {
+ printf("ERROR: Failed to get TIM1 PWM interface\n");
+ ret = -1;
+ goto errout;
+ }
+
+ spwm->pwm = pwm;
+
+ /* Initial PWM1 setup */
+
+ ret = PWM_SETUP(pwm);
+ if (ret < 0)
+ {
+ printf("ERROR: Failed to get setup TIM1 PWM\n");
+ ret = -1;
+ goto errout;
+ }
+
+ /* Configure TIM1 PWM frequency */
+
+ ret = PWM_FREQ_UPDATE(pwm, CONFIG_NUCLEOL432KC_SPWM_PWM_FREQ);
+ if (ret < 0)
+ {
+ printf("ERROR: Failed to set TIM1 PWM frequency\n");
+ ret = -1;
+ goto errout;
+ }
+
+ /* Get TIM1 period (ARR) */
+
+ spwm->per = PWM_ARR_GET(pwm);
+
+ spwm_tim1_stop(spwm);
+
+errout:
+ return ret;
+}
+
+/****************************************************************************
+ * Name: spwm_tim1_start
+ ****************************************************************************/
+
+static int spwm_tim1_start(FAR struct spwm_s *spwm)
+{
+ FAR struct stm32l4_pwm_dev_s *pwm = spwm->pwm;
+ uint16_t outputs = 0;
+ int i = 0;
+
+ /* Get outputs */
+
+ for (i = 0; i < spwm->phases; i += 1)
+ {
+ outputs |= (1 << (i * 2));
+ }
+
+ /* Enable PWM outputs */
+
+ PWM_OUTPUTS_ENABLE(pwm, outputs, true);
+
+ /* Enable TIM1 */
+
+ PWM_TIM_ENABLE(pwm, true);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: spwm_tim1_stop
+ ****************************************************************************/
+
+static int spwm_tim1_stop(FAR struct spwm_s *spwm)
+{
+ FAR struct stm32l4_pwm_dev_s *pwm = spwm->pwm;
+ uint16_t outputs = 0;
+ int i = 0;
+
+ /* Get outputs */
+
+ for (i = 0; i < spwm->phases; i += 1)
+ {
+ outputs |= (1 << (i * 2));
+ }
+
+ /* Disable PWM outputs */
+
+ PWM_OUTPUTS_ENABLE(pwm, outputs, false);
+
+ /* Disable TIM1 */
+
+ PWM_TIM_ENABLE(pwm, false);
+
+ return OK;
+}
+
+#endif /* CONFIG_NUCLEOL432KC_SPWM_USE_TIM1 */
+
+/****************************************************************************
+ * Name: spwm_setup
+ ****************************************************************************/
+
+static int spwm_setup(FAR struct spwm_s *spwm)
+{
+ int ret = OK;
+
+ /* TIM1 setup - PWM */
+
+ printf("Setup TIM1 and TIM6\n");
+ ret = spwm_tim1_setup(spwm);
+ if (ret < 0)
+ {
+ goto errout;
+ }
+
+ /* TIM6 setup - IRQ */
+
+ ret = spwm_tim6_setup(spwm);
+ if (ret < 0)
+ {
+ goto errout;
+ }
+
+errout:
+ return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: spwm_main
+ *
+ * Description:
+ * Entrypoint for SPWM example.
+ *
+ ****************************************************************************/
+
+int spwm_main(int argc, char *argv[])
+{
+ FAR struct spwm_s *spwm = NULL;
+ int ret = OK;
+ int i = 0;
+
+ spwm = &g_spwm;
+
+ printf("\nspwm_main: Started\n");
+
+ /* Setup SPWM example */
+
+ ret = spwm_setup(spwm);
+ if (ret < 0)
+ {
+ printf("ERROR: failed to setup SPWM %d!\n", ret);
+ goto errout;
+ }
+
+ /* Initialize modulation waveform */
+
+ ret = waveform_init(spwm, waveform_func);
+ if (ret < 0)
+ {
+ printf("ERROR: failed initialize modulation wavefrom %d!\n", ret);
+ goto errout;
+ }
+
+ /* Start SPWM */
+
+ ret = spwm_start(spwm);
+ if (ret < 0)
+ {
+ printf("ERROR: failed start SPWM %d!\n", ret);
+ goto errout;
+ }
+
+ /* Main loop */
+
+ while (1)
+ {
+ /* Print counter */
+
+ printf("%d\n", i);
+
+ /* Increase counter */
+
+ i += 1;
+
+ /* Sleep */
+
+ nxsig_sleep(1);
+ }
+
+errout:
+ spwm_stop(spwm);
+
+ return 0;
+}
+
+#endif /* CONFIG_NUCLEOL432KC_SPWM */