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Posted to commits@tvm.apache.org by GitBox <gi...@apache.org> on 2021/10/17 00:34:10 UTC

[GitHub] [tvm] tqchen commented on issue #9250: [Potential Bug] SSAVerifier needs some clarification and/or fix

tqchen commented on issue #9250:
URL: https://github.com/apache/tvm/issues/9250#issuecomment-944911597


   Thank you for bringing this up!  Indeed we will need to make the condition stronger here such that under a weak ssa form, we would require the related expressions to do not call into function that have side effect or write into a state.
   
   Note that by default store have to appear in a Stmt so the case of memory write won't interleave with the two lets
   
   You are right that it is also think about whether or not such form was indeed necessary. The let expr is useful when it comes to express values that are CSEed.
   
   In the case of TIR, we do want to restrict where can effectful operations appear(hopefully in let statement, or eval) so the impact is minimized and most Expr can remain pure.


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