You are viewing a plain text version of this content. The canonical link for it is here.

Posted to issues@systemml.apache.org by "Matthias Boehm (JIRA)" <ji...@apache.org> on 2017/06/03 22:08:04 UTC

[jira] [Created] (SYSTEMML-1662) Extended HOP DAG validator

Matthias Boehm created SYSTEMML-1662:
----------------------------------------

             Summary: Extended HOP DAG validator
                 Key: SYSTEMML-1662
                 URL: https://issues.apache.org/jira/browse/SYSTEMML-1662
             Project: SystemML
          Issue Type: Sub-task
            Reporter: Matthias Boehm


This task aims to extend the existing HOP DAG validator (see {{org.apache.sysml.hops.rewrite.HopDagValidator}}, which can be enabled via {{org.apache.sysml.hops.rewriteProgramRewriter.CHECK}}) in various ways in order to provide better developer tooling for checking the correctness of new and existing rewrites.

So far, this validator, checks only for 
* Correct parent node linking
* Correct child node linking
* Non-empty children (for all hops other than {{DataOp}} and {{LiteralOp}})






--
This message was sent by Atlassian JIRA
(v6.3.15#6346)