write-only interrupt registers

[TimH <ti...@jti.uk.com.INVALID>]

In the midst (still!) of sorting out the SAMA5D2 TSD and ADC support. It is
pretty much all working now, with quite a few errors addressed along the
way. Guess I'm the only one actually using this processor for real LOL.

The last thing I am addressing is a conflict between the interrupts used for
the TSD and ADC as it transpires that this processor family's interrupt
enable, disable and mask registers are write-only for some odd reason.

This means the drivers can't, for example, read the current interrupt enable
registers that have perhaps been set up for ADC operation and OR in those
needed for TSD operation. The TSD driver especially does some clever
"tricks" with changing the pen detect and X/Y/Pressure interrupts depending
on a state machine, and I don't want to unravel all of that for no good
reason.

Only thing I can think of is to add a new member to the relevant SAM_ADC_S
struct and have the ADC and TSD drivers save the current state.

Seems messy to me - so does anyone have any better ideas that have already
been used, in NuttX, in similar circumstances?

Re: write-only interrupt registers

[Tim Hardisty <ti...@jti.uk.com.INVALID>]

I had a brain-splat. This is a non-issue. 40 years doing software and I randomly still get the basics wrong!

On 03/11/2022, 18:19, "TimH" <ti...@jti.uk.com> wrote:

<snip drivel>