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Posted to commits@nuttx.apache.org by xi...@apache.org on 2020/12/06 03:44:57 UTC

[incubator-nuttx] branch master updated (1e7c13d -> ec83dc2)

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.


    from 1e7c13d  Documentation: merge quickstart with the rest of "getting started"
     new de9842a  LPC43 RIT: build fixes
     new ec83dc2  nxstyle fixes

The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "add" were already present in the repository and have only
been added to this reference.


Summary of changes:
 arch/arm/src/lpc43xx/hardware/lpc43_rit.h | 35 ++++++++++--------
 arch/arm/src/lpc43xx/lpc43_rit.c          | 61 ++++++++++++++++---------------
 2 files changed, 51 insertions(+), 45 deletions(-)


[incubator-nuttx] 01/02: LPC43 RIT: build fixes

Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit de9842ab60a39b1721d1ae80bf85e5600afc0df4
Author: Matias N <ma...@protobits.dev>
AuthorDate: Sat Dec 5 15:11:50 2020 -0300

    LPC43 RIT: build fixes
---
 arch/arm/src/lpc43xx/hardware/lpc43_rit.h |  1 +
 arch/arm/src/lpc43xx/lpc43_rit.c          | 28 ++++++++++++++--------------
 2 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/arch/arm/src/lpc43xx/hardware/lpc43_rit.h b/arch/arm/src/lpc43xx/hardware/lpc43_rit.h
index d7541f7..4b51470 100644
--- a/arch/arm/src/lpc43xx/hardware/lpc43_rit.h
+++ b/arch/arm/src/lpc43xx/hardware/lpc43_rit.h
@@ -42,6 +42,7 @@
  ************************************************************************************/
 
 #include <nuttx/config.h>
+#include "chip.h"
 
 /************************************************************************************
  * Pre-processor Definitions
diff --git a/arch/arm/src/lpc43xx/lpc43_rit.c b/arch/arm/src/lpc43xx/lpc43_rit.c
index 596a2b3..4364167 100644
--- a/arch/arm/src/lpc43xx/lpc43_rit.c
+++ b/arch/arm/src/lpc43xx/lpc43_rit.c
@@ -79,7 +79,7 @@
  ****************************************************************************/
 
 static double sec_per_tick;
-static uint64_t internal_timer, alarm;
+static uint64_t g_internal_timer, g_alarm;
 struct timespec g_ts;
 
 /****************************************************************************
@@ -94,13 +94,13 @@ static int lpc43_RIT_isr(int irq, FAR void *context, FAR void *arg)
 
   putreg32(RIT_CTRL_INT, LPC43_RIT_CTRL);
 
-  internal_timer += (uint64_t)RIT_TIMER_RESOLUTION;
-  if (alarm > 0 && internal_timer >= alarm)
+  g_internal_timer += (uint64_t)RIT_TIMER_RESOLUTION;
+  if (g_alarm > 0 && g_internal_timer >= g_alarm)
     {
       /* handle expired alarm */
 
-      g_ts.tv_sec = (uint32_t)(internal_timer / 1000000000);
-      g_ts.tv_nsec = (uint32_t)(internal_timer % 1000000000);
+      g_ts.tv_sec = (uint32_t)(g_internal_timer / 1000000000);
+      g_ts.tv_nsec = (uint32_t)(g_internal_timer % 1000000000);
       nxsched_alarm_expiration(&g_ts);
     }
 
@@ -162,7 +162,7 @@ void up_timer_initialize(void)
 
   lpc43_RIT_timer_stop();
   lpc43_load_RIT_timer(0);
-  internal_timer = 0;
+  g_internal_timer = 0;
 
   /* Set up the IRQ here */
 
@@ -222,17 +222,17 @@ void up_timer_initialize(void)
 
 int up_timer_gettime(FAR struct timespec *ts)
 {
-  ts->tv_sec = (uint32_t)(internal_timer / 1000000000);
-  ts->tv_nsec = (uint32_t)(internal_timer % 1000000000);
+  ts->tv_sec = (uint32_t)(g_internal_timer / 1000000000);
+  ts->tv_nsec = (uint32_t)(g_internal_timer % 1000000000);
 
   return OK;
 }
 
 int up_alarm_cancel(FAR struct timespec *ts)
 {
-  ts->tv_sec = (uint32_t)(internal_timer / 1000000000);
-  ts->tv_nsec = (uint32_t)(internal_timer % 1000000000);
-  alarm = 0;
+  ts->tv_sec = (uint32_t)(g_internal_timer / 1000000000);
+  ts->tv_nsec = (uint32_t)(g_internal_timer % 1000000000);
+  g_alarm = 0;
   return OK;
 }
 
@@ -243,7 +243,7 @@ int up_alarm_start(FAR const struct timespec *ts)
    * coded.
    */
 
-  alarm = (uint64_t)ts->tv_sec * (uint64_t)1000000000 + (uint64_t)ts->tv_nsec;
+  g_alarm = (uint64_t)ts->tv_sec * (uint64_t)1000000000 + (uint64_t)ts->tv_nsec;
   return OK;
 }
 
@@ -265,8 +265,8 @@ int up_timer_start(FAR const struct timespec *ts)
    * potentially be implemented, so that's the way I did it.
    */
 
-  alarm = internal_timer;
-  alarm += (uint64_t)ts->tv_sec * (uint64_t)1000000000 + (uint64_t)ts->tv_nsec;
+  g_alarm = g_internal_timer;
+  g_alarm += (uint64_t)ts->tv_sec * (uint64_t)1000000000 + (uint64_t)ts->tv_nsec;
   return OK;
 }
 


[incubator-nuttx] 02/02: nxstyle fixes

Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit ec83dc2ad36c278248b260bade84768352362a15
Author: Matias N <ma...@protobits.dev>
AuthorDate: Sat Dec 5 15:18:21 2020 -0300

    nxstyle fixes
---
 arch/arm/src/lpc43xx/hardware/lpc43_rit.h | 34 ++++++++++++++-------------
 arch/arm/src/lpc43xx/lpc43_rit.c          | 39 +++++++++++++++++--------------
 2 files changed, 39 insertions(+), 34 deletions(-)

diff --git a/arch/arm/src/lpc43xx/hardware/lpc43_rit.h b/arch/arm/src/lpc43xx/hardware/lpc43_rit.h
index 4b51470..3479e6d 100644
--- a/arch/arm/src/lpc43xx/hardware/lpc43_rit.h
+++ b/arch/arm/src/lpc43xx/hardware/lpc43_rit.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
  * arch/arm/src/lpc43xx/hardware/lpc43_rit.h
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
@@ -32,37 +32,38 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifndef __ARCH_ARM_SRC_LPC43XX_HARDWARE_LPC43_RIT_H
 #define __ARCH_ARM_SRC_LPC43XX_HARDWARE_LPC43_RIT_H
 
-/************************************************************************************
+/****************************************************************************
  * Included Files
- ************************************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
 #include "chip.h"
 
-/************************************************************************************
+/****************************************************************************
  * Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
 
-/* Register offsets *****************************************************************/
+/* Register offsets *********************************************************/
 
 #define LPC43_RIT_COMPVAL_OFFSET 0x0000  /* Compare register */
 #define LPC43_RIT_MASK_OFFSET    0x0004  /* Mask register */
 #define LPC43_RIT_CTRL_OFFSET    0x0008  /* Control register */
 #define LPC43_RIT_COUNTER_OFFSET 0x000c  /* 32-bit counter */
 
-/* Register addresses ***************************************************************/
+/* Register addresses *******************************************************/
 
 #define LPC43_RIT_COMPVAL        (LPC43_RIT_BASE+LPC43_RIT_COMPVAL_OFFSET)
 #define LPC43_RIT_MASK           (LPC43_RIT_BASE+LPC43_RIT_MASK_OFFSET)
 #define LPC43_RIT_CTRL           (LPC43_RIT_BASE+LPC43_RIT_CTRL_OFFSET)
 #define LPC43_RIT_COUNTER        (LPC43_RIT_BASE+LPC43_RIT_COUNTER_OFFSET)
 
-/* Register bit definitions *********************************************************/
+/* Register bit definitions *************************************************/
+
 /* Compare register (Bits 0-31: value compared to the counter) */
 
 /* Mask register (Bits 0-31: 32-bit mask value) */
@@ -74,18 +75,19 @@
 #define RIT_CTRL_ENBR            (1 << 2)  /* Bit 2: Timer enable for debug */
 #define RIT_CTRL_EN              (1 << 3)  /* Bit 3: Timer enable */
                                            /* Bits 4-31: Reserved */
+
 /* 32-bit counter (Bits 0-31: 32-bit up counter) */
 
-/************************************************************************************
+/****************************************************************************
  * Public Types
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Data
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
 
 #endif /* __ARCH_ARM_SRC_LPC43XX_HARDWARE_LPC43_RIT_H */
diff --git a/arch/arm/src/lpc43xx/lpc43_rit.c b/arch/arm/src/lpc43xx/lpc43_rit.c
index 4364167..a53bf84 100644
--- a/arch/arm/src/lpc43xx/lpc43_rit.c
+++ b/arch/arm/src/lpc43xx/lpc43_rit.c
@@ -79,14 +79,15 @@
  ****************************************************************************/
 
 static double sec_per_tick;
-static uint64_t g_internal_timer, g_alarm;
+static uint64_t g_internal_timer;
+static uint64_t g_alarm;
 struct timespec g_ts;
 
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
 
-static int lpc43_RIT_isr(int irq, FAR void *context, FAR void *arg)
+static int lpc43_rit_isr(int irq, FAR void *context, FAR void *arg)
 {
   irqstate_t flags;
 
@@ -108,27 +109,27 @@ static int lpc43_RIT_isr(int irq, FAR void *context, FAR void *arg)
   return OK;
 }
 
-static inline void lpc43_load_RIT_timer(uint32_t value)
+static inline void lpc43_load_rit_timer(uint32_t value)
 {
   putreg32(value, LPC43_RIT_COUNTER);
 }
 
-static inline void lpc43_load_RIT_compare(uint32_t value)
+static inline void lpc43_load_rit_compare(uint32_t value)
 {
   putreg32(value, LPC43_RIT_COMPVAL);
 }
 
-static inline void lpc43_set_RIT_timer_mask(uint32_t value)
+static inline void lpc43_set_rit_timer_mask(uint32_t value)
 {
   putreg32(value, LPC43_RIT_MASK);
 }
 
-static inline uint32_t lpc43_read_RIT_timer(void)
+static inline uint32_t lpc43_read_rit_timer(void)
 {
   return getreg32(LPC43_RIT_COUNTER);
 }
 
-static inline void lpc43_RIT_timer_start(void)
+static inline void lpc43_rit_timer_start(void)
 {
   uint32_t regval;
   regval = getreg32(LPC43_RIT_CTRL);
@@ -142,7 +143,7 @@ static inline void lpc43_RIT_timer_start(void)
   putreg32(regval, LPC43_RIT_CTRL);
 }
 
-static inline void lpc43_RIT_timer_stop(void)
+static inline void lpc43_rit_timer_stop(void)
 {
   uint32_t regval;
   regval = getreg32(LPC43_RIT_CTRL);
@@ -160,19 +161,19 @@ void up_timer_initialize(void)
   uint32_t mask_bits = 0;
   uint32_t mask_test = 0x80000000;
 
-  lpc43_RIT_timer_stop();
-  lpc43_load_RIT_timer(0);
+  lpc43_rit_timer_stop();
+  lpc43_load_rit_timer(0);
   g_internal_timer = 0;
 
   /* Set up the IRQ here */
 
-  irq_attach(LPC43M4_IRQ_RITIMER, lpc43_RIT_isr, NULL);
+  irq_attach(LPC43M4_IRQ_RITIMER, lpc43_rit_isr, NULL);
 
   /* Compute how many seconds per tick we have on the main clock.  If it is
    * 204MHz for example, then there should be about 4.90ns per tick
    */
 
-  sec_per_tick = (double)1.0/(double)LPC43_CCLK;
+  sec_per_tick = (double)1.0 / (double)LPC43_CCLK;
 
   /* Given an RIT_TIMER_RESOLUTION, compute how many ticks it will take to
    * reach that resolution.  For example, if we wanted a 1/4uS timer
@@ -182,7 +183,7 @@ void up_timer_initialize(void)
    * We round up by 1 tick.
    */
 
-  ticks_per_int = RIT_TIMER_RESOLUTION/(1000000000*sec_per_tick)+1;
+  ticks_per_int = RIT_TIMER_RESOLUTION / (1000000000 * sec_per_tick) + 1;
 
   /* Now we need to compute the mask that will let us set up to generate an
    * interrupt every 1/4uS.  This isn't "tickless" per-se, and probably
@@ -208,8 +209,8 @@ void up_timer_initialize(void)
    * RIT_TIMER_RESOLUTION cycles.
    */
 
-  lpc43_set_RIT_timer_mask((0xFFFFFFFF << (32 - mask_bits)));
-  lpc43_load_RIT_compare(ticks_per_int);
+  lpc43_set_rit_timer_mask((0xffffffff << (32 - mask_bits)));
+  lpc43_load_rit_compare(ticks_per_int);
 
   /* Turn on the IRQ */
 
@@ -217,7 +218,7 @@ void up_timer_initialize(void)
 
   /* Start the timer */
 
-  lpc43_RIT_timer_start();
+  lpc43_rit_timer_start();
 }
 
 int up_timer_gettime(FAR struct timespec *ts)
@@ -243,7 +244,8 @@ int up_alarm_start(FAR const struct timespec *ts)
    * coded.
    */
 
-  g_alarm = (uint64_t)ts->tv_sec * (uint64_t)1000000000 + (uint64_t)ts->tv_nsec;
+  g_alarm = (uint64_t)ts->tv_sec * (uint64_t)1000000000 +
+            (uint64_t)ts->tv_nsec;
   return OK;
 }
 
@@ -266,7 +268,8 @@ int up_timer_start(FAR const struct timespec *ts)
    */
 
   g_alarm = g_internal_timer;
-  g_alarm += (uint64_t)ts->tv_sec * (uint64_t)1000000000 + (uint64_t)ts->tv_nsec;
+  g_alarm += (uint64_t)ts->tv_sec * (uint64_t)1000000000 +
+             (uint64_t)ts->tv_nsec;
   return OK;
 }