svn commit: r588510 - in /harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32: Ia32CodeEmitter.cpp Ia32IRManager.h

[va...@apache.org]

Author: varlax
Date: Thu Oct 25 21:12:34 2007
New Revision: 588510

URL: http://svn.apache.org/viewvc?rev=588510&view=rev
Log:
Initial fix for HARMONY-5016 [drlvm][jit][opt] code patching may corrupt calls to helpers on x86-64 in OPT mode

Modified:
    harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp
    harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h

Modified: harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp?rev=588510&r1=588509&r2=588510&view=diff
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp (original)
+++ harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32CodeEmitter.cpp Thu Oct 25 21:12:34 2007
@@ -500,7 +500,8 @@
                 bool callIsNotForPatching = rt && (rt->getKind() == Opnd::RuntimeInfo::Kind_InternalHelperAddress ||
                                                    rt->getKind() == Opnd::RuntimeInfo::Kind_HelperAddress);
 
-                if (!callIsNotForPatching) { // the call may be patched at runtime
+                if (!callIsNotForPatching) 
+                { // the call may be patched at runtime
                     // nops for self-jump <opcode + 8 bit displacement(-3)> for atomic write at aligned ip
                     // there are 3 bytes reserved to allow self-jump to be aligned for sure
                     // the first (must be the real inst in CFG to cheat code compactor that removes these nops
@@ -511,12 +512,12 @@
                     ip = nopInst->emit(ip);
                     // the last two
                     ip = (uint8*)EncoderBase::nops((char*)ip,2);
+                }
 #ifdef _EM64T_
                     // these nops are required for call transformation from immediate into register form
                     // nops for MOV r11, callTarget (when !fit32(call_offset) ) <opcode + 8 byte address>
                     ip = (uint8*)EncoderBase::nops((char*)ip, 10);
 #endif
-                }
             }
             
             uint8 * instStartIp = ip;

Modified: harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h
URL: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h?rev=588510&r1=588509&r2=588510&view=diff
==============================================================================
--- harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h (original)
+++ harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32IRManager.h Thu Oct 25 21:12:34 2007
@@ -371,7 +371,7 @@
     bool isLaidOut() const {return laidOut;}
     void setLaidOut(bool v) {laidOut = true;}
 
-    /** returns the pointer to the native code for this basic block */
+    /** returns the pointer to the emitted native code for the method. */
     void * getCodeStartAddr() const {return codeStartAddr;}
     void   setCodeStartAddr(void* addr) {codeStartAddr = addr;}