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Posted to commits@nuttx.apache.org by "pussuw (via GitHub)" <gi...@apache.org> on 2023/02/24 07:57:58 UTC

[GitHub] [nuttx] pussuw commented on a diff in pull request #8643: risc-v: SV32 MMU support for qemu-rv (WIP)

pussuw commented on code in PR #8643:
URL: https://github.com/apache/nuttx/pull/8643#discussion_r1116626676


##########
arch/risc-v/src/common/riscv_mmu.h:
##########
@@ -112,9 +101,46 @@
 
 #define RV_MMU_SECTION_ALIGN        (RV_MMU_L2_PAGE_SIZE)
 #define RV_MMU_SECTION_ALIGN_MASK   (RV_MMU_SECTION_ALIGN - 1)
+
+/* Sv32 has:
+ * - 4K page size
+ * - 2 page table levels
+ * - 10-bit VPN width
+ */
+
+#elif CONFIG_ARCH_MMU_TYPE_SV32
+#define RV_MMU_PPN_WIDTH        22
+#define RV_MMU_ASID_WIDTH       9
+#define RV_MMU_MODE_WIDTH       1
+#define RV_MMU_PTE_PPN_MASK     (((1ul << RV_MMU_PPN_WIDTH) - 1) << RV_MMU_PTE_PADDR_SHIFT)
+#define RV_MMU_VPN_WIDTH        (10)
+#define RV_MMU_VPN_MASK         ((1ul << RV_MMU_VPN_WIDTH) - 1)
+#define RV_MMU_PT_LEVELS        (2)
+#define RV_MMU_SATP_MODE        (SATP_MODE_SV32)
+#define RV_MMU_L1_PAGE_SIZE     (0x400000)   /* 4M */
+#define RV_MMU_L2_PAGE_SIZE     (0x1000)     /* 4K */
+
+#define RV_MMU_SECTION_ALIGN        (RV_MMU_L2_PAGE_SIZE)

Review Comment:
   This should be L1 page size, the alignment requirement comes from the page table alignment requirement. If you want to describe a section of continuous memory, you need to start the physical memory described by the  page table at a certain alignment.
   
   In the case of Sv39 the requirement is either 1G or 2M, with Sv32 the requirement is 4M.



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