You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/03/08 22:31:03 UTC
[GitHub] [incubator-nuttx] pkarashchenko commented on a change in pull request #5699: ESP32-S3: Enable SMP support
pkarashchenko commented on a change in pull request #5699:
URL: https://github.com/apache/incubator-nuttx/pull/5699#discussion_r822126524
##########
File path: arch/xtensa/src/esp32s3/chip_macros.h
##########
@@ -41,28 +47,48 @@
* Public Data
****************************************************************************/
+#ifdef __ASSEMBLY__
+
+#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15
+ .global g_cpu_intstack_top
+#endif /* CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 15 */
+
+#endif /* __ASSEMBLY__ */
+
/****************************************************************************
* Assembly Language Macros
****************************************************************************/
#ifdef __ASSEMBLY__
/* Macro to get the current core ID. Only uses the reg given as an argument.
- * Reading PRID on the ESP108 architecture gives us 0xcdcd on the PRO
- * processor and 0xabab on the APP CPU. We distinguish between the two by
- * simply checking bit 1: it's 1 on the APP and 0 on the PRO processor.
+ * Reading PRID on the ESP32 gives us 0xCDCD on the PRO processor (0)
+ * and 0xABAB on the APP CPU (1). We can distinguish between the two by
+ * checking bit 13: it's 1 on the APP and 0 on the PRO processor.
*/
- .macro getcoreid reg
- rsr.prid \reg
- bbci \reg, 1, 1f
- movi \reg, 1
- j 2f
-1:
- movi \reg, 0
-2:
+ .macro getcoreid reg
+ rsr.prid \reg
+ extui \reg,\reg,13,1
.endm
+/****************************************************************************
+ * Name: setintstack
+ *
+ * Description:
+ * Set the current stack pointer to the "top" of the correct interrupt
+ * stack for the current CPU.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15
+ .macro setintstack tmp1 tmp2
+ getcoreid \tmp1 /* tmp1 = Core ID (0 or 1) */
+ movi \tmp2, g_cpu_intstack_top /* tmp2 = Array of stack pointers */
+ addx4 \tmp2, \tmp1, \tmp2 /* tmp2 = tmp2 + (tmp1 << 2) */
+ l32i a1, \tmp2, 0 /* a1 = *tmp2 */
+ .endm
+#endif
#endif /* __ASSEMBLY */
Review comment:
```suggestion
#endif /* __ASSEMBLY__ */
```
##########
File path: arch/xtensa/src/esp32s3/esp32s3_wdt_lowerhalf.c
##########
@@ -94,6 +94,7 @@ struct esp32s3_wdt_lowerhalf_s
bool started; /* True: Timer has been started */
xcpt_t handler; /* User Handler */
void *upper; /* Pointer to watchdog_upperhalf_s */
+ spinlock_t lock; /* Device-specific lock */
Review comment:
```suggestion
spinlock_t lock; /* Device-specific lock */
```
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscribe@nuttx.apache.org
For queries about this service, please contact Infrastructure at:
users@infra.apache.org