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Posted to commits@nuttx.apache.org by gu...@apache.org on 2021/11/26 17:55:40 UTC
[incubator-nuttx] 01/04: arch/arm/include/samv7: fix typo in samv7 irq header files
This is an automated email from the ASF dual-hosted git repository.
gustavonihei pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 134b2e6ec9bbfb6381b89c910312b28873960e75
Author: Petro Karashchenko <pe...@gmail.com>
AuthorDate: Wed Nov 24 14:25:30 2021 +0200
arch/arm/include/samv7: fix typo in samv7 irq header files
Signed-off-by: Petro Karashchenko <pe...@gmail.com>
---
arch/arm/include/samv7/same70_irq.h | 2 +-
arch/arm/include/samv7/samv71_irq.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/samv7/same70_irq.h b/arch/arm/include/samv7/same70_irq.h
index d740225..6f026fd 100644
--- a/arch/arm/include/samv7/same70_irq.h
+++ b/arch/arm/include/samv7/same70_irq.h
@@ -179,7 +179,7 @@
#define SAM_IRQ_CCF (SAM_IRQ_EXTINT+SAM_PID_CCF) /* ARM Cache ECC Fault */
#define SAM_IRQ_EMACQ1 (SAM_IRQ_EXTINT+SAM_PID_EMACQ1) /* EMAC Queue 1 Interrupt */
#define SAM_IRQ_EMACQ2 (SAM_IRQ_EXTINT+SAM_PID_EMACQ2) /* EMAC Queue 2 Interrupt */
-#define SAM_IRQ_FPIXC (SAM_IRQ_EXTINTSAM_PID_FPIXC+) /* ARM Cache ECC Warning */
+#define SAM_IRQ_FPIXC (SAM_IRQ_EXTINT+SAM_PID_FPIXC) /* ARM Cache ECC Warning */
#define SAM_IRQ_NEXTINT NR_PIDS /* Total number of external interrupt numbers */
#define SAM_IRQ_NIRQS (SAM_IRQ_EXTINT+NR_PIDS) /* The number of real IRQs */
diff --git a/arch/arm/include/samv7/samv71_irq.h b/arch/arm/include/samv7/samv71_irq.h
index 3ce9317..42946ec 100644
--- a/arch/arm/include/samv7/samv71_irq.h
+++ b/arch/arm/include/samv7/samv71_irq.h
@@ -179,7 +179,7 @@
#define SAM_IRQ_CCF (SAM_IRQ_EXTINT+SAM_PID_CCF) /* ARM Cache ECC Fault */
#define SAM_IRQ_EMACQ1 (SAM_IRQ_EXTINT+SAM_PID_EMACQ1) /* EMAC Queue 1 Interrupt */
#define SAM_IRQ_EMACQ2 (SAM_IRQ_EXTINT+SAM_PID_EMACQ2) /* EMAC Queue 2 Interrupt */
-#define SAM_IRQ_FPIXC (SAM_IRQ_EXTINTSAM_PID_FPIXC+) /* ARM Cache ECC Warning */
+#define SAM_IRQ_FPIXC (SAM_IRQ_EXTINT+SAM_PID_FPIXC) /* ARM Cache ECC Warning */
#define SAM_IRQ_NEXTINT NR_PIDS /* Total number of external interrupt numbers */
#define SAM_IRQ_NIRQS (SAM_IRQ_EXTINT+NR_PIDS) /* The number of real IRQs */