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Posted to commits@mynewt.apache.org by GitBox <gi...@apache.org> on 2018/12/07 13:06:19 UTC
[GitHub] mkiiskila closed pull request #1547: nrf52;
create a linker script for compiling apps which are loaded to RAM,
mkiiskila closed pull request #1547: nrf52; create a linker script for compiling apps which are loaded to RAM,
URL: https://github.com/apache/mynewt-core/pull/1547
This is a PR merged from a forked repository.
As GitHub hides the original diff on merge, it is displayed below for
the sake of provenance:
As this is a foreign pull request (from a fork), the diff is supplied
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diff --git a/.rat-excludes b/.rat-excludes
index af64beea57..4b15ac5d73 100644
--- a/.rat-excludes
+++ b/.rat-excludes
@@ -55,6 +55,7 @@ split-nrf52dk.ld
rb-nano2_no_boot.ld
split-rb-nano2.ld
nrf52.ld
+nrf52_ram_resident.ld
ada_feather_nrf52_no_boot.ld
split_ada_feather_nrf52.ld
split-microbit.ld
diff --git a/hw/bsp/nordic_pca10040/bsp.yml b/hw/bsp/nordic_pca10040/bsp.yml
index 7103e43947..dd2d330826 100644
--- a/hw/bsp/nordic_pca10040/bsp.yml
+++ b/hw/bsp/nordic_pca10040/bsp.yml
@@ -25,6 +25,9 @@ bsp.linkerscript:
bsp.linkerscript.BOOT_LOADER.OVERWRITE:
- "hw/bsp/nordic_pca10040/boot-nrf52xxaa.ld"
- "@apache-mynewt-core/hw/mcu/nordic/nrf52xxx/nrf52.ld"
+bsp.linkerscript.RAM_RESIDENT.OVERWRITE:
+ - "hw/bsp/nordic_pca10040/boot-nrf52xxaa.ld"
+ - "@apache-mynewt-core/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld"
bsp.part2linkerscript: "hw/bsp/nordic_pca10040/split-nordic_pca10040.ld"
bsp.downloadscript: "hw/bsp/nordic_pca10040/nordic_pca10040_download.sh"
bsp.debugscript: "hw/bsp/nordic_pca10040/nordic_pca10040_debug.sh"
diff --git a/hw/bsp/nordic_pca10040/syscfg.yml b/hw/bsp/nordic_pca10040/syscfg.yml
index 391dbc7f31..6d58519afa 100644
--- a/hw/bsp/nordic_pca10040/syscfg.yml
+++ b/hw/bsp/nordic_pca10040/syscfg.yml
@@ -36,6 +36,9 @@ syscfg.defs:
UARTBB_0_PIN_RX:
description: 'RX pin for UARTBB0'
value: -1
+ RAM_RESIDENT:
+ description: 'Compile app to be loaded to RAM'
+ value: 0
syscfg.vals:
# Enable nRF52832 MCU
diff --git a/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld b/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld
new file mode 100644
index 0000000000..d10ffa2d67
--- /dev/null
+++ b/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld
@@ -0,0 +1,195 @@
+/* Linker script for Nordic Semiconductor nRF5 devices
+ *
+ * Version: Sourcery G++ 4.5-1
+ * Support: https://support.codesourcery.com/GNUToolchain/
+ *
+ * Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __HeapBase
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ * __bssnz_start__
+ * __bssnz_end__
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ .text :
+ {
+ __text = .;
+
+ __isr_vector_start = .;
+ __vector_tbl_reloc__ = .;
+ KEEP(*(.isr_vector))
+ __isr_vector_end = .;
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ *(.eh_frame*)
+ . = ALIGN(4);
+ } > RAM
+
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } > RAM
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ . = ALIGN(4);
+ } > RAM
+ __exidx_end = .;
+
+ __etext = .;
+
+ /* This section will be zeroed by RTT package init */
+ .rtt (NOLOAD):
+ {
+ . = ALIGN(4);
+ *(.rtt)
+ . = ALIGN(4);
+ } > RAM
+
+ .data :
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ *(.preinit_array)
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ *(SORT(.init_array.*))
+ *(.init_array)
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ *(SORT(.fini_array.*))
+ *(.fini_array)
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ *(.jcr)
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+ } > RAM
+
+ /* Non-zeroed BSS. This section is similar to BSS, with the following two
+ * caveats:
+ * 1. It does not get zeroed at init-time.
+ * 2. You cannot use it as source memory for EasyDMA.
+ *
+ * This section exists because of a hardware defect; see errata 33 and 34
+ * in nrf52 errata sheet.
+ */
+ .bssnz :
+ {
+ . = ALIGN(4);
+ __bssnz_start__ = .;
+ *(.bss.core.nz*)
+ . = ALIGN(4);
+ __bssnz_end__ = .;
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ /* Heap starts after BSS */
+ . = ALIGN(8);
+ __HeapBase = .;
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ *(.stack*)
+ } > RAM
+
+ _ram_start = ORIGIN(RAM);
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Top of head is the bottom of the stack */
+ __HeapLimit = __StackLimit;
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack")
+}
+
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