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Posted to commits@nuttx.apache.org by gn...@apache.org on 2020/03/14 01:06:22 UTC

[incubator-nuttx] branch master updated: ESP32: Use __asm__ __volatile__ for inline assembly

This is an automated email from the ASF dual-hosted git repository.

gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 23db3b2  ESP32: Use __asm__ __volatile__ for inline assembly
23db3b2 is described below

commit 23db3b2a48ef3b283c80fded2129d2e2f4ff733f
Author: YAMAMOTO Takashi <ya...@midokura.com>
AuthorDate: Wed Mar 11 16:34:29 2020 +0900

    ESP32: Use __asm__ __volatile__ for inline assembly
---
 arch/xtensa/src/common/xtensa_idle.c   | 2 +-
 arch/xtensa/src/esp32/esp32_cpustart.c | 2 +-
 arch/xtensa/src/esp32/esp32_start.c    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/xtensa/src/common/xtensa_idle.c b/arch/xtensa/src/common/xtensa_idle.c
index 9c683e2..4997a8b 100644
--- a/arch/xtensa/src/common/xtensa_idle.c
+++ b/arch/xtensa/src/common/xtensa_idle.c
@@ -98,5 +98,5 @@ void up_idle(void)
    * sleep in a reduced power mode until an interrupt occurs to save power
    */
 
-  asm("waiti 0");
+  __asm__ __volatile__ ("waiti 0");
 }
diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c
index b57ad93..14e8de0 100644
--- a/arch/xtensa/src/esp32/esp32_cpustart.c
+++ b/arch/xtensa/src/esp32/esp32_cpustart.c
@@ -195,7 +195,7 @@ void xtensa_appcpu_start(void)
 
   /* Move CPU0 exception vectors to IRAM */
 
-  asm volatile ("wsr %0, vecbase\n"::"r" (&_init_start));
+  __asm__ __volatile__ ("wsr %0, vecbase\n"::"r" (&_init_start));
 
   /* Make page 0 access raise an exception */
 
diff --git a/arch/xtensa/src/esp32/esp32_start.c b/arch/xtensa/src/esp32/esp32_start.c
index f4cd1d8..df3f52e 100644
--- a/arch/xtensa/src/esp32/esp32_start.c
+++ b/arch/xtensa/src/esp32/esp32_start.c
@@ -124,7 +124,7 @@ void IRAM_ATTR __start(void)
 
   /* Move CPU0 exception vectors to IRAM */
 
-  asm volatile ("wsr %0, vecbase\n"::"r" (&_init_start));
+  __asm__ __volatile__ ("wsr %0, vecbase\n"::"r" (&_init_start));
 
   /* Set .bss to zero */