You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/02/21 17:28:02 UTC
[nuttx] 01/03: arch: imxrt: Fix CONFIG_IMXRT_ENET_ENHANCEDBD
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 3a4542f3c4aa471e7ea056a50da9601ecd35ebda
Author: Masayuki Ishikawa <ma...@gmail.com>
AuthorDate: Mon Feb 20 16:37:37 2023 +0900
arch: imxrt: Fix CONFIG_IMXRT_ENET_ENHANCEDBD
Summary:
- I noticed that CONFIG_IMXRT_ENET_ENHANCEDBD is not correctly
used though it is defined in Kconfig.
- This commit fixes this issue.
Impact:
- None
Testing:
- Tested with imxrt1060-evk:netnsh_dcache_wb (will be added later)
Signed-off-by: Masayuki Ishikawa <Ma...@jp.sony.com>
---
arch/arm/src/imxrt/hardware/imxrt_enet.h | 6 +++---
arch/arm/src/imxrt/imxrt_enet.c | 11 ++++++-----
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm/src/imxrt/hardware/imxrt_enet.h b/arch/arm/src/imxrt/hardware/imxrt_enet.h
index 7b879d6b3f..ca423ae1b6 100644
--- a/arch/arm/src/imxrt/hardware/imxrt_enet.h
+++ b/arch/arm/src/imxrt/hardware/imxrt_enet.h
@@ -640,7 +640,7 @@
/* Legacy Buffer Descriptor */
-#ifdef CONFIG_ENET_ENHANCEDBD
+#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
#ifdef IMXRT_USE_DBSWAP
/* When DBSWP is used to swap the bytes in hardware, it is done 32-bits
* at a time. Therefore, all 16 bit elements need to be swapped to
@@ -675,7 +675,7 @@ struct enet_desc_s
uint32_t reserved2; /* unused */
};
#endif /* IMXRT_USE_DBSWAP */
-#else /* CONFIG_ENET_ENHANCEDBD */
+#else /* CONFIG_IMXRT_ENET_ENHANCEDBD */
#ifdef IMXRT_USE_DBSWAP
struct enet_desc_s
{
@@ -691,7 +691,7 @@ struct enet_desc_s
uint8_t *data; /* Buffer address */
};
#endif /* IMXRT_USE_DBSWAP */
-#endif /* CONFIG_ENET_ENHANCEDBD */
+#endif /* CONFIG_IMXRT_ENET_ENHANCEDBD */
/****************************************************************************
* Public Data
diff --git a/arch/arm/src/imxrt/imxrt_enet.c b/arch/arm/src/imxrt/imxrt_enet.c
index 8fd20c69e4..e86960c8d8 100644
--- a/arch/arm/src/imxrt/imxrt_enet.c
+++ b/arch/arm/src/imxrt/imxrt_enet.c
@@ -159,7 +159,8 @@
* REVISIT: The size of descriptors and buffers must also be in even units
* of the cache line size That is because the operations to clean and
* invalidate the cache will operate on a full 32-byte cache line. If
- * CONFIG_ENET_ENHANCEDBD is selected, then the size of the descriptor is
+ * CONFIG_IMXRT_ENET_ENHANCEDBD is selected,
+ * then the size of the descriptor is
* 32-bytes (and probably already the correct size for the cache line);
* otherwise, the size of the descriptors much smaller, only 8 bytes.
*/
@@ -665,7 +666,7 @@ static int imxrt_transmit(struct imxrt_driver_s *priv)
*/
txdesc->length = imxrt_swap16(priv->dev.d_len);
-#ifdef CONFIG_IMXRT_ENETENHANCEDBD
+#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
txdesc->bdu = 0x00000000;
txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */
#endif
@@ -1343,7 +1344,7 @@ static int imxrt_ifup_action(struct net_driver_s *dev, bool resetphy)
/* Select legacy of enhanced buffer descriptor format */
-#ifdef CONFIG_IMXRT_ENETENHANCEDBD
+#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
imxrt_enet_putreg32(priv, ENET_ECR_EN1588, IMXRT_ENET_ECR_OFFSET);
#else
imxrt_enet_putreg32(priv, 0, IMXRT_ENET_ECR_OFFSET);
@@ -2608,7 +2609,7 @@ static void imxrt_initbuffers(struct imxrt_driver_s *priv)
priv->txdesc[i].status1 = 0;
priv->txdesc[i].length = 0;
priv->txdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr);
-#ifdef CONFIG_IMXRT_ENETENHANCEDBD
+#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS;
#endif
addr += ALIGNED_BUFSIZE;
@@ -2621,7 +2622,7 @@ static void imxrt_initbuffers(struct imxrt_driver_s *priv)
priv->rxdesc[i].status1 = RXDESC_E;
priv->rxdesc[i].length = 0;
priv->rxdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr);
-#ifdef CONFIG_IMXRT_ENETENHANCEDBD
+#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
priv->rxdesc[i].bdu = 0;
priv->rxdesc[i].status2 = RXDESC_INT;
#endif