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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/02/13 15:07:16 UTC

[GitHub] [incubator-nuttx] no1wudi opened a new pull request #5484: risc-v: Implement common up_cpu_idlestack

no1wudi opened a new pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484


   ## Summary
   * risc-v: Implement common up_cpu_idlestack
   * Add -mstrictalign to arch level flags since it don't support unaligned memory access
   * Use common cpu idle stack implementation for k210
   ## Impact
   k210 smp only.
   ## Testing
   K210
   


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[GitHub] [incubator-nuttx] masayuki2009 edited a comment on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
masayuki2009 edited a comment on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038754912


   > @masayuki2009 I notice that the avaliable memory is different on your qemu and my real board, could you have check for it ?
   
   @no1wudi 
   You can use qemu-5.2.
   
   ```
   $ qemu-system-riscv64 -nographic -machine sifive_u -bios nuttx
   
   Without this PR
   
   NuttShell (NSH) NuttX-10.2.0
   NuttX 10.2.0 cbbe1c661e Feb 14 2022 16:46:39 risc-v maix-bit
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 000048   2.4%  CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 001808  59.4%  nsh_main
   nsh> hello
   Hello, World!!
   nsh>
   
   With this PR
   
   NuttShell (NSH) NuttX-10.2.0
   nsh> uname -a
   NuttX 10.2.0 b8477f857b Feb 14 2022 16:48:13 risc-v maix-bit
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 002000 100.0%! CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 001824  60.0%  nsh_main
   nsh> hello
   Hello, World!!
   
   
   
   ```
   


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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a change in pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on a change in pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#discussion_r805683092



##########
File path: arch/risc-v/src/common/riscv_cpuidlestack.c
##########
@@ -28,24 +28,86 @@
 #include <assert.h>
 
 #include <nuttx/arch.h>
+#include <nuttx/compiler.h>
 #include <nuttx/sched.h>
 
 #include "riscv_internal.h"
-#include "k210_memorymap.h"
 
-#ifdef CONFIG_SMP
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
 
-#define SMP_STACK_MASK       7
-#define SMP_STACK_SIZE       ((CONFIG_IDLETHREAD_STACKSIZE + 7) & ~7)
+#define SMP_STACK_MASK       15
+#define SMP_STACK_SIZE       (CONFIG_IDLETHREAD_STACKSIZE & ~15)
 #define STACK_ISALIGNED(a)   ((uintptr_t)(a) & ~SMP_STACK_MASK)
 
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/**
+ * Note:
+ *   1. QEMU-RV supports up to 8 cores currently.
+ *   2. RISC-V requires a 16-byte stack alignment.
+ */
+
 #if CONFIG_SMP_NCPUS > 1
-static const uintptr_t g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
+static uint8_t aligned_data(16) cpu1_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 2
+static uint8_t aligned_data(16) cpu2_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 3
+static uint8_t aligned_data(16) cpu3_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 4
+static uint8_t aligned_data(16) cpu4_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 5
+static uint8_t aligned_data(16) cpu5_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 6
+static uint8_t aligned_data(16) cpu6_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 7
+static uint8_t aligned_data(16) cpu7_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+uint8_t *g_cpu_basestack[CONFIG_SMP_NCPUS] =

Review comment:
       the problem can be fixed it by add const instead.




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[GitHub] [incubator-nuttx] masayuki2009 edited a comment on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
masayuki2009 edited a comment on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038754912


   > @masayuki2009 I notice that the avaliable memory is different on your qemu and my real board, could you have check for it ?
   
   @no1wudi 
   You can use qemu-5.2 on Ubuntu x86_64
   
   ```
   $ qemu-system-riscv64 -nographic -machine sifive_u -bios nuttx
   
   Without this PR
   
   NuttShell (NSH) NuttX-10.2.0
   NuttX 10.2.0 cbbe1c661e Feb 14 2022 16:46:39 risc-v maix-bit
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 000048   2.4%  CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 001808  59.4%  nsh_main
   nsh> hello
   Hello, World!!
   nsh>
   
   With this PR
   
   NuttShell (NSH) NuttX-10.2.0
   nsh> uname -a
   NuttX 10.2.0 b8477f857b Feb 14 2022 16:48:13 risc-v maix-bit
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 002000 100.0%! CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 001824  60.0%  nsh_main
   nsh> hello
   Hello, World!!
   
   
   
   ```
   


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[GitHub] [incubator-nuttx] no1wudi commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
no1wudi commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038816442


   > @no1wudi As you can see, the stack for the CPU1 IDLE task is corrupted.
   
   The cpux's idle stack is loaded from `g_cpu_basestack` (data section) now, but on this time it maybe not ready since it is initialized by cpu0, I'll provide another PR to fix it.


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[GitHub] [incubator-nuttx] no1wudi commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
no1wudi commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038743216


   @masayuki2009 
   I've it tested on real device , tried your operation but it seems ok and `ostest` and `smp` test also works fine.
   ```
   NuttShell (NSH) NuttX-10.2.0
   nsh> uname  -a
   NuttX 10.2.0 b8477f857b Feb 14 2022 15:20:50 risc-v maix-bit
   nsh> mount
     /proc type procfs
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 000048   2.4%  CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 002008  66.0%  nsh_main
   nsh> free
                      total       used       free    largest  nused  nfree
           Umem:    2081632      12112    2069520    2069520     35      1
   nsh> hello
   Hello, World!!
   nsh>
   ```
   


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[GitHub] [incubator-nuttx] masayuki2009 commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
masayuki2009 commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038733905


   @no1wudi 
   My automatic test failed due to this PR.
   Could you please try maix-bit:smp with QEMU?
   
   ```
   NuttShell (NSH) NuttX-10.2.0
   nsh>  
   nsh> uname -a
   NuttX 10.2.0 b8477f857b Feb 14 2022 16:09:56 risc-v maix-bit
   nsh> mount
     /proc type procfs
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 002000 100.0%! CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 001824  60.0%  nsh_main
   nsh> free
                      total       used       free    largest  nused  nfree
           Umem:    2082112      12112    2070000    2070000     35      1
   nsh> hello
   Hello, World!!
   Traceback (most recent call last):
     File "/home/ishikawa/script/expect_nuttx_smp_test.py", line 38, in <module>
       child.expect('nsh> ')
     File "/home/ishikawa/.local/lib/python3.6/site-packages/pexpect/spawnbase.py", line 344, in expect
       timeout, searchwindowsize, async_)
     File "/home/ishikawa/.local/lib/python3.6/site-packages/pexpect/spawnbase.py", line 372, in expect_list
       return exp.expect_loop(timeout)
     File "/home/ishikawa/.local/lib/python3.6/site-packages/pexpect/expect.py", line 181, in expect_loop
       return self.timeout(e)
     File "/home/ishikawa/.local/lib/python3.6/site-packages/pexpect/expect.py", line 144, in timeout
       raise exc
   pexpect.exceptions.TIMEOUT: Timeout exceeded.
   ```


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[GitHub] [incubator-nuttx] no1wudi commented on a change in pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
no1wudi commented on a change in pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#discussion_r805688460



##########
File path: arch/risc-v/src/common/riscv_cpuidlestack.c
##########
@@ -28,24 +28,86 @@
 #include <assert.h>
 
 #include <nuttx/arch.h>
+#include <nuttx/compiler.h>
 #include <nuttx/sched.h>
 
 #include "riscv_internal.h"
-#include "k210_memorymap.h"
 
-#ifdef CONFIG_SMP
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
 
-#define SMP_STACK_MASK       7
-#define SMP_STACK_SIZE       ((CONFIG_IDLETHREAD_STACKSIZE + 7) & ~7)
+#define SMP_STACK_MASK       15
+#define SMP_STACK_SIZE       (CONFIG_IDLETHREAD_STACKSIZE & ~15)
 #define STACK_ISALIGNED(a)   ((uintptr_t)(a) & ~SMP_STACK_MASK)
 
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/**
+ * Note:
+ *   1. QEMU-RV supports up to 8 cores currently.
+ *   2. RISC-V requires a 16-byte stack alignment.
+ */
+
 #if CONFIG_SMP_NCPUS > 1
-static const uintptr_t g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
+static uint8_t aligned_data(16) cpu1_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 2
+static uint8_t aligned_data(16) cpu2_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 3
+static uint8_t aligned_data(16) cpu3_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 4
+static uint8_t aligned_data(16) cpu4_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 5
+static uint8_t aligned_data(16) cpu5_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 6
+static uint8_t aligned_data(16) cpu6_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 7
+static uint8_t aligned_data(16) cpu7_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+uint8_t *g_cpu_basestack[CONFIG_SMP_NCPUS] =

Review comment:
       Sureļ¼Œ good idea




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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a change in pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on a change in pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#discussion_r805349514



##########
File path: arch/risc-v/src/common/riscv_cpuidlestack.c
##########
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * arch/risc-v/src/common/riscv_cpuidlestack.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <assert.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/compiler.h>
+#include <nuttx/sched.h>
+
+#include "riscv_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SMP_STACK_MASK       7

Review comment:
       7->15




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[GitHub] [incubator-nuttx] masayuki2009 commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
masayuki2009 commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038754912


   > @masayuki2009 I notice that the avaliable memory is different on your qemu and my real board, could you have check for it ?
   
   @no1wudi 
   You can use qemu-5.2.
   
   ```
   $ qemu-system-riscv64 -nographic -machine sifive_u -bios nuttx
   
   Without this PR
   NuttShell (NSH) NuttX-10.2.0
   nsh> ps
     PID GROUP CPU PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK   STACK   USED  FILLED COMMAND
       0     0   0   0 FIFO     Kthread N-- Assigned           00000000 002000 000840  42.0%  CPU0 IDLE
       1     1   1   0 FIFO     Kthread N-- Running            00000000 002000 000048   2.4%  CPU1 IDLE
       2     2   0 100 RR       Task    --- Running            00000000 003040 001808  59.4%  nsh_main
   nsh> hello
   Hello, World!!
   nsh>
   ```
   


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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a change in pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on a change in pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#discussion_r805349514



##########
File path: arch/risc-v/src/common/riscv_cpuidlestack.c
##########
@@ -0,0 +1,177 @@
+/****************************************************************************
+ * arch/risc-v/src/common/riscv_cpuidlestack.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <assert.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/compiler.h>
+#include <nuttx/sched.h>
+
+#include "riscv_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define SMP_STACK_MASK       7

Review comment:
       7->15




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[GitHub] [incubator-nuttx] xiaoxiang781216 merged pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484


   


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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a change in pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on a change in pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#discussion_r805683092



##########
File path: arch/risc-v/src/common/riscv_cpuidlestack.c
##########
@@ -28,24 +28,86 @@
 #include <assert.h>
 
 #include <nuttx/arch.h>
+#include <nuttx/compiler.h>
 #include <nuttx/sched.h>
 
 #include "riscv_internal.h"
-#include "k210_memorymap.h"
 
-#ifdef CONFIG_SMP
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
 
-#define SMP_STACK_MASK       7
-#define SMP_STACK_SIZE       ((CONFIG_IDLETHREAD_STACKSIZE + 7) & ~7)
+#define SMP_STACK_MASK       15
+#define SMP_STACK_SIZE       (CONFIG_IDLETHREAD_STACKSIZE & ~15)
 #define STACK_ISALIGNED(a)   ((uintptr_t)(a) & ~SMP_STACK_MASK)
 
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/**
+ * Note:
+ *   1. QEMU-RV supports up to 8 cores currently.
+ *   2. RISC-V requires a 16-byte stack alignment.
+ */
+
 #if CONFIG_SMP_NCPUS > 1
-static const uintptr_t g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
+static uint8_t aligned_data(16) cpu1_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 2
+static uint8_t aligned_data(16) cpu2_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 3
+static uint8_t aligned_data(16) cpu3_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 4
+static uint8_t aligned_data(16) cpu4_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 5
+static uint8_t aligned_data(16) cpu5_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 6
+static uint8_t aligned_data(16) cpu6_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+#if CONFIG_SMP_NCPUS > 7
+static uint8_t aligned_data(16) cpu7_idlestack[CONFIG_IDLETHREAD_STACKSIZE];
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+uint8_t *g_cpu_basestack[CONFIG_SMP_NCPUS] =

Review comment:
       the problem can be fixed it by add const instead. @no1wudi 




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[GitHub] [incubator-nuttx] no1wudi commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
no1wudi commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038826434


   @masayuki2009 Please see #5490 


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[GitHub] [incubator-nuttx] no1wudi commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
no1wudi commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038749653


   @masayuki2009 
   I notice that the avaliable memory is different on your qemu and my real board, could you have check for it ?
   


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[GitHub] [incubator-nuttx] masayuki2009 commented on pull request #5484: risc-v: Implement common up_cpu_idlestack

Posted by GitBox <gi...@apache.org>.
masayuki2009 commented on pull request #5484:
URL: https://github.com/apache/incubator-nuttx/pull/5484#issuecomment-1038802121


   @no1wudi 
   As you can see, the stack for the CPU1 IDLE task is corrupted.
   


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