[drlvm] Optimizing cache-misses for linked data structures in DRLVM

[Yuri Kashnikoff <yu...@gmail.com>]

Hello

I'm working on "cache miss" optimization in Harmony. The goal of my
optimization is to reduce cache-misses during traversal of linked data
structures like linked lists or trees.

Here is an example:
class DLink {
   Dlink next;
}
while (o.next!=null) {
    o = o.next ;
}

 If this loop is hot my profile will show that the 'next' field is
likely to be accessed right after an access to its parent object.
 Another example can be a String class with 'char[] data' field.
Usually, for application with a lot of String manipulations this field
is hot.
 I call objects like String as 'parent' objects and objects like
'char[] data' as 'field' objects.
 After profile in JIT is collected, I need GC to use it and reorganize
objects in memory during the next enumeration. The logic of
enumeration is rather simple and natural so I hope it won't be a
problem: put the objects referenced by the "hot" field types right
after the 'parent' objects.
 My problem is that I do not familiar with GC code. Can I ask any of
GC gurus to help me with it?
 If anyone is ready to work on this task with me from GC-side, I can
provide an interface with profile information to start.