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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/04/09 16:52:10 UTC
[incubator-nuttx] 01/03: arch/risc-v: Align prototype of riscv_exception with xcpt_t
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 36bc8d21312edc722464c4f8bd006d4053875231
Author: Huang Qi <hu...@xiaomi.com>
AuthorDate: Fri Apr 8 15:00:21 2022 +0800
arch/risc-v: Align prototype of riscv_exception with xcpt_t
Thus we can attach it to irq handler without any cast.
Signed-off-by: Huang Qi <hu...@xiaomi.com>
---
arch/risc-v/src/c906/c906_irq_dispatch.c | 2 +-
arch/risc-v/src/common/riscv_exception.c | 5 +++--
arch/risc-v/src/common/riscv_internal.h | 2 +-
arch/risc-v/src/k210/k210_irq_dispatch.c | 3 ++-
arch/risc-v/src/mpfs/mpfs_irq_dispatch.c | 3 ++-
arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c | 3 ++-
6 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/risc-v/src/c906/c906_irq_dispatch.c b/arch/risc-v/src/c906/c906_irq_dispatch.c
index e559892d85..fc784d633c 100644
--- a/arch/risc-v/src/c906/c906_irq_dispatch.c
+++ b/arch/risc-v/src/c906/c906_irq_dispatch.c
@@ -58,7 +58,7 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (vector < RISCV_IRQ_ECALLU)
{
- riscv_exception(irq, regs);
+ riscv_exception(irq, regs, NULL);
}
/* Firstly, check if the irq is machine external interrupt */
diff --git a/arch/risc-v/src/common/riscv_exception.c b/arch/risc-v/src/common/riscv_exception.c
index 84162ed97d..931dd481c2 100644
--- a/arch/risc-v/src/common/riscv_exception.c
+++ b/arch/risc-v/src/common/riscv_exception.c
@@ -69,7 +69,7 @@ static const char *g_reasons_str[RISCV_MAX_EXCEPTION + 1] =
*
****************************************************************************/
-void riscv_exception(uintptr_t mcause, uintptr_t *regs)
+int riscv_exception(int mcause, void *regs, void *args)
{
uintptr_t cause = mcause & RISCV_IRQ_MASK;
@@ -87,5 +87,6 @@ void riscv_exception(uintptr_t mcause, uintptr_t *regs)
up_irq_save();
CURRENT_REGS = regs;
PANIC();
-}
+ return 0;
+}
diff --git a/arch/risc-v/src/common/riscv_internal.h b/arch/risc-v/src/common/riscv_internal.h
index 05bcadfa4b..9274db67fd 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -286,7 +286,7 @@ void riscv_netinitialize(void);
/* Exception Handler ********************************************************/
uintptr_t *riscv_doirq(int irq, uintptr_t *regs);
-void riscv_exception(uintptr_t mcause, uintptr_t *regs);
+int riscv_exception(int mcause, void *regs, void *args);
int riscv_misaligned(int irq, void *context, void *arg);
/* Debug ********************************************************************/
diff --git a/arch/risc-v/src/k210/k210_irq_dispatch.c b/arch/risc-v/src/k210/k210_irq_dispatch.c
index 79da3423e7..689f71ecdc 100644
--- a/arch/risc-v/src/k210/k210_irq_dispatch.c
+++ b/arch/risc-v/src/k210/k210_irq_dispatch.c
@@ -29,6 +29,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <sys/types.h>
#include "riscv_internal.h"
#include "group/group.h"
@@ -58,7 +59,7 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (vector < RISCV_IRQ_ECALLU)
{
- riscv_exception(irq, regs);
+ riscv_exception(irq, regs, NULL);
}
/* Firstly, check if the irq is machine external interrupt */
diff --git a/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c b/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
index 51e3537a9d..eb5e2799c0 100755
--- a/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
+++ b/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
@@ -29,6 +29,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <sys/types.h>
#include "riscv_internal.h"
@@ -59,7 +60,7 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
vector == RISCV_IRQ_STOREPF ||
vector == RISCV_IRQ_RESERVED)
{
- riscv_exception(irq, regs);
+ riscv_exception(irq, regs, NULL);
}
if ((vector & RISCV_IRQ_BIT) != 0)
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c b/arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c
index 68780f11bb..4678c9d5e9 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_irq_dispatch.c
@@ -29,6 +29,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <sys/types.h>
#include "riscv_internal.h"
#include "hardware/qemu_rv_memorymap.h"
@@ -59,7 +60,7 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (vector < RISCV_IRQ_ECALLM)
{
- riscv_exception(irq, regs);
+ riscv_exception(irq, regs, NULL);
}
/* Firstly, check if the irq is machine external interrupt */