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Posted to dev@nuttx.apache.org by Adam Feuer <ad...@starcat.io> on 2020/06/11 20:33:48 UTC
Re: SAMA5D27 SDMMC support branch
Takeyoshi,
Hey, in case you are interested, I got the SDMMC driver port working for
reading data today. It's quite a mess, and on a private branch. I will try
to get it working for writing, clean it up, and push it to this branch in a
few days.
Thanks so much for your help!!
cheers
adam
On Mon, May 4, 2020 at 3:29 PM Adam Feuer <ad...@starcat.io> wrote:
> Takeyoshi,
>
> Hi, I've been working on the SDMMC driver off and on. I still haven't got
> it working, but I am making some progress. Here's a log of register reads
> and writes captured from U-Boot on the SAMA5D27:
> index usecs op (bytes) register value value
> binary register long description
> 0 0 read (4): [0x0040: HTCAPBLT0] 0x27ec0c8c 0010 0111
> 1110 1100 0000 1100 1000 1100 Host Controller Capabilities 0 Register
> 1 4983 read (2): [0x00fe:HOST_VERSION] 0x00001502 0000 0000
> 0000 0000 0001 0101 0000 0010 Host Controller Version Register
> 2 10101 read (4): [0x0044: HTCAPBLT1] 0x00200f77 0000 0000
> 0010 0000 0000 1111 0111 0111 Host Controller Capabilities 1 Register
> 3 15225 write (1): [0x002f: SRR]w 0x00000001 0000 0000
> 0000 0000 0000 0000 0000 0001 Software Reset Register
> 4 20428 write (1): [0x0029: PCR]w 0x0000000f 0000 0000
> 0000 0000 0000 0000 0000 1111 Power Control Register
> 5 25629 write (4): [0x0034: IRQSTATEN]w 0x027f003b 0000 0010
> 0111 1111 0000 0000 0011 1011 Interrupt Status Enable Register
> 6 30833 write (4): [0x0038: IRQSIGEN]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Interrupt Signal Enable Register
> 7 44875 read (4): [0x0040: HTCAPBLT0] 0x27e80c8c 0010 0111
> 1110 1000 0000 1100 1000 1100 Host Controller Capabilities 0 Register
> 8 49848 read (2): [0x00fe:HOST_VERSION] 0x00001502 0000 0000
> 0000 0000 0001 0101 0000 0010 Host Controller Version Register
> 9 54966 read (4): [0x0044: HTCAPBLT1] 0x00200070 0000 0000
> 0010 0000 0000 0000 0111 0000 Host Controller Capabilities 1 Register
> 10 60088 write (1): [0x002f: SRR]w 0x00000001 0000 0000
> 0000 0000 0000 0000 0000 0001 Software Reset Register
> 11 66296 write (1): [0x0029: PCR]w 0x0000000f 0000 0000
> 0000 0000 0000 0000 0000 1111 Power Control Register
> 12 71353 write (4): [0x0034: IRQSTATEN]w 0x027f003b 0000 0010
> 0111 1111 0000 0000 0011 1011 Interrupt Status Enable Register
> 13 76557 write (4): [0x0038: IRQSIGEN]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Interrupt Signal Enable Register
> 14 88990 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
> 1111 1111 0000 0000 0000 0000 Present State Register
> 15 94080 write (2): [0x002c: SYSCTL]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
> Register/Timout Control Register
> 16 99285 read (1): [0x0028: PROCTL] 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> 17 106408 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
> 1111 1111 0000 0000 0000 0000 Present State Register
> 18 111377 write (2): [0x002c: SYSCTL]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
> Register/Timout Control Register
> 19 116582 read (1): [0x0028: PROCTL] 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> 20 121704 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
> 1111 1111 0000 0000 0000 0000 Present State Register
> 21 126818 write (2): [0x002c: SYSCTL]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
> Register/Timout Control Register
> 22 132150 write (2): [0x002c: SYSCTL]w 0x000057a1 0000 0000
> 0000 0000 0101 0111 1010 0001 System Control Register, or Clock Control
> Register/Timout Control Register
> 23 138235 write (2): [0x002c: SYSCTL]w 0x000057a7 0000 0000
> 0000 0000 0101 0111 1010 0111 System Control Register, or Clock Control
> Register/Timout Control Register
> 24 143292 read (1): [0x0028: PROCTL] 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> 25 148410 write (1): [0x0028: PROCTL]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> 26 154620 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
> 1111 1111 0000 0000 0000 0000 Present State Register
> 27 159583 write (4): [0x0030: IRQSTAT]w 0xffffffff 1111 1111
> 1111 1111 1111 1111 1111 1111 Interrupt Status Register
> 28 164789 write (4): [0x0008: CMDARG]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Command Argument Register
> 29 169993 write (2): [0x000e: CR]w 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Command Register
> 30 175199 read (4): [0x0030: IRQSTAT] 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Interrupt Status Register
> 31 180322 read (4): [0x0010: CMDRSP0] 0x00000000 0000 0000
> 0000 0000 0000 0000 0000 0000 Command Response 0
>
> I have a MMC sniffer and logic analyzer hooked up and can see traffic on
> the SD Card bus under U-Boot. Under NuttX, nothing. I am going to try to
> capture a register log like this one under NuttX, and compare; and maybe
> try to replay the U-Boot sequence under NuttX to see if I can get signals
> on the SDMMC bus. If you have more ideas, I would love to hear them.
>
> cheers
> adam
>
>
> On Mon, Apr 13, 2020 at 5:38 PM Adam Feuer <ad...@starcat.io> wrote:
>
>> Takeyoshi,
>>
>> I finally got the new sama5 sam_sdmmc.c driver to compile. I haven't
>> tested it yet, so I don't know if it actually works... I pushed the code to
>> the branch, I am attaching the config I used.
>>
>> -adam
>>
>> On Thu, Apr 2, 2020 at 3:23 PM Adam Feuer <ad...@starcat.io> wrote:
>>
>>> Takeyoshi,
>>>
>>> No worries– I had to work on other things too.
>>>
>>> -adam
>>>
>>> On Thu, Apr 2, 2020 at 3:22 PM Takeyoshi Kikuchi <
>>> kikuchi@centurysys.co.jp> wrote:
>>>
>>>> Adam,
>>>>
>>>> Sorry, I am currently busy working and have no progress.
>>>> I want to check tomorrow.
>>>>
>>>> Takeyoshi Kikuchi
>>>>
>>>> On 2020/04/02 9:48, Adam Feuer wrote:
>>>> > Takeyoshi,
>>>> >
>>>> > I did some work on the SDMCC driver today, it compiles now and I
>>>> pushed the
>>>> > code to the branch. I will try it and let you know how it goes. I am
>>>> still
>>>> > not sure everything is right, for instance why do I have to specify
>>>> > SDMMC0_SIZE? The sama5d2x_memorymap.c file seems to need it. But it
>>>> should
>>>> > not be operating in memory-mapped mode, so I'm confused.
>>>> >
>>>> > Here are the config settings I used:
>>>> >
>>>> > #
>>>> > # This file is autogenerated: PLEASE DO NOT EDIT IT.
>>>> > #
>>>> > # You can use "make menuconfig" to make any modifications to the
>>>> installed
>>>> > .config file.
>>>> > # You can then do "make savedefconfig" to generate a new defconfig
>>>> file
>>>> > that includes your
>>>> > # modifications.
>>>> > #
>>>> > # CONFIG_AUDIO_FORMAT_MP3 is not set
>>>> > # CONFIG_DISABLE_OS_API is not set
>>>> > # CONFIG_NSH_ARGCAT is not set
>>>> > # CONFIG_NSH_CMDOPT_HEXDUMP is not set
>>>> > # CONFIG_NSH_CMDPARMS is not set
>>>> > # CONFIG_SAMA5_UART0 is not set
>>>> > CONFIG_ARCH="arm"
>>>> > CONFIG_ARCH_BOARD="sama5d2-xult"
>>>> > CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
>>>> > CONFIG_ARCH_BUTTONS=y
>>>> > CONFIG_ARCH_CHIP="sama5"
>>>> > CONFIG_ARCH_CHIP_ATSAMA5D27=y
>>>> > CONFIG_ARCH_CHIP_SAMA5=y
>>>> > CONFIG_ARCH_CHIP_SAMA5D2=y
>>>> > CONFIG_ARCH_INTERRUPTSTACK=2048
>>>> > CONFIG_ARCH_IRQBUTTONS=y
>>>> > CONFIG_ARCH_LOWVECTORS=y
>>>> > CONFIG_ARCH_STACKDUMP=y
>>>> > CONFIG_AUDIO=y
>>>> > CONFIG_AUDIO_NUM_BUFFERS=8
>>>> > CONFIG_BOARD_LOOPSPERMSEC=65775
>>>> > CONFIG_BOOT_RUNFROMSDRAM=y
>>>> > CONFIG_BUILTIN=y
>>>> > CONFIG_DEBUG_FEATURES=y
>>>> > CONFIG_DEBUG_FULLOPT=y
>>>> > CONFIG_DEBUG_SYMBOLS=y
>>>> > CONFIG_DEV_LOOP=y
>>>> > CONFIG_DEV_ZERO=y
>>>> > CONFIG_EXAMPLES_HELLO=y
>>>> > CONFIG_EXAMPLES_PARTITION=y
>>>> > CONFIG_EXAMPLES_TCPBLASTER=y
>>>> > CONFIG_EXAMPLES_TCPECHO=y
>>>> > CONFIG_EXAMPLES_WGET=y
>>>> > CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
>>>> > CONFIG_FAT_LCNAMES=y
>>>> > CONFIG_FAT_LFN=y
>>>> > CONFIG_FS_FAT=y
>>>> > CONFIG_FS_PROCFS=y
>>>> > CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
>>>> > CONFIG_FS_ROMFS=y
>>>> > CONFIG_HAVE_CXX=y
>>>> > CONFIG_HAVE_CXXINITIALIZE=y
>>>> > CONFIG_HIDKBD_POLLUSEC=80000
>>>> > CONFIG_I2S=y
>>>> > CONFIG_INTELHEX_BINARY=y
>>>> > CONFIG_IOB_NBUFFERS=72
>>>> > CONFIG_IOB_THROTTLE=16
>>>> > CONFIG_MAX_TASKS=16
>>>> > CONFIG_MAX_WDOGPARMS=2
>>>> > CONFIG_NETINIT_NETLOCAL=y
>>>> > CONFIG_NETINIT_NOMAC=y
>>>> > CONFIG_NETUTILS_NETLIB_GENERICURLPARSER=y
>>>> > CONFIG_NETUTILS_TELNETC=y
>>>> > CONFIG_NETUTILS_WEBCLIENT=y
>>>> > CONFIG_NET_ARP_IPIN=y
>>>> > CONFIG_NET_ARP_SEND=y
>>>> > CONFIG_NET_BROADCAST=y
>>>> > CONFIG_NET_CDCECM=y
>>>> > CONFIG_NET_ETH_PKTSIZE=1514
>>>> > CONFIG_NET_ICMP=y
>>>> > CONFIG_NET_ICMP_SOCKET=y
>>>> > CONFIG_NET_ROUTE=y
>>>> > CONFIG_NET_STATISTICS=y
>>>> > CONFIG_NET_TCP=y
>>>> > CONFIG_NET_TCPBACKLOG=y
>>>> > CONFIG_NET_TCP_NOTIFIER=y
>>>> > CONFIG_NET_TCP_WRITE_BUFFERS=y
>>>> > CONFIG_NET_UDP=y
>>>> > CONFIG_NFILE_DESCRIPTORS=8
>>>> > CONFIG_NFILE_STREAMS=8
>>>> > CONFIG_NSH_ARCHINIT=y
>>>> > CONFIG_NSH_BUILTIN_APPS=y
>>>> > CONFIG_NSH_FILEIOSIZE=512
>>>> > CONFIG_NSH_PROMPT_STRING="nsh> "
>>>> > CONFIG_NSH_QUOTE=y
>>>> > CONFIG_NSH_READLINE=y
>>>> > CONFIG_NSH_ROMFSETC=y
>>>> > CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard"
>>>> > CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y
>>>> > CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y
>>>> > CONFIG_PREALLOC_MQ_MSGS=4
>>>> > CONFIG_PREALLOC_TIMERS=4
>>>> > CONFIG_PREALLOC_WDOGS=16
>>>> > CONFIG_RAMLOG=y
>>>> > CONFIG_RAMLOG_BUFSIZE=16384
>>>> > CONFIG_RAMLOG_SYSLOG=y
>>>> > CONFIG_RAM_SIZE=268435456
>>>> > CONFIG_RAM_START=0x20000000
>>>> > CONFIG_RAM_VSTART=0x20000000
>>>> > CONFIG_RAW_BINARY=y
>>>> > CONFIG_READLINE_CMD_HISTORY=y
>>>> > CONFIG_READLINE_CMD_HISTORY_LEN=100
>>>> > CONFIG_READLINE_CMD_HISTORY_LINELEN=120
>>>> > CONFIG_READLINE_TABCOMPLETION=y
>>>> > CONFIG_RR_INTERVAL=200
>>>> > CONFIG_SAMA5D2XULT_528MHZ=y
>>>> > CONFIG_SAMA5D2XULT_USBHOST_STACKSIZE=2048
>>>> > CONFIG_SAMA5_BOOT_SDRAM=y
>>>> > CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
>>>> > CONFIG_SAMA5_DDRCS_RESERVE=y
>>>> > CONFIG_SAMA5_EHCI=y
>>>> > CONFIG_SAMA5_HSMC=y
>>>> > CONFIG_SAMA5_OHCI=y
>>>> > CONFIG_SAMA5_PIOA_IRQ=y
>>>> > CONFIG_SAMA5_PIOB_IRQ=y
>>>> > CONFIG_SAMA5_PIOC_IRQ=y
>>>> > CONFIG_SAMA5_PIO_IRQ=y
>>>> > CONFIG_SAMA5_RTC=y
>>>> > CONFIG_SAMA5_SDMMC0=y
>>>> > CONFIG_SAMA5_TRNG=y
>>>> > CONFIG_SAMA5_UART1=y
>>>> > CONFIG_SAMA5_UDPHS=y
>>>> > CONFIG_SAMA5_UHPHS=y
>>>> > CONFIG_SCHED_HPWORKPRIORITY=192
>>>> > CONFIG_SCHED_LPNTHREADS=2
>>>> > CONFIG_SCHED_LPWORK=y
>>>> > CONFIG_SCHED_WAITPID=y
>>>> > CONFIG_SDCLONE_DISABLE=y
>>>> > CONFIG_SERIAL_TERMIOS=y
>>>> > CONFIG_SIG_DEFAULT=y
>>>> > CONFIG_SIG_EVTHREAD=y
>>>> > CONFIG_START_DAY=31
>>>> > CONFIG_START_MONTH=7
>>>> > CONFIG_START_YEAR=2014
>>>> > CONFIG_SYMTAB_ORDEREDBYNAME=y
>>>> > CONFIG_SYSLOG_TIMESTAMP=y
>>>> > CONFIG_SYSTEM_NSH=y
>>>> > CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
>>>> > CONFIG_SYSTEM_NXPLAYER=y
>>>> > CONFIG_SYSTEM_PING=y
>>>> > CONFIG_SYSTEM_VI=y
>>>> > CONFIG_TTY_SIGINT=y
>>>> > CONFIG_TTY_SIGSTP=y
>>>> > CONFIG_UART1_SERIAL_CONSOLE=y
>>>> > CONFIG_USBDEV=y
>>>> > CONFIG_USBDEV_DMA=y
>>>> > CONFIG_USBDEV_DUALSPEED=y
>>>> > CONFIG_USBDEV_TRACE=y
>>>> > CONFIG_USBDEV_TRACE_NRECORDS=512
>>>> > CONFIG_USBHOST_HIDKBD=y
>>>> > CONFIG_USBHOST_MSC=y
>>>> > CONFIG_USER_ENTRYPOINT="nsh_main"
>>>> > CONFIG_WDOG_INTRESERVE=2
>>>> >
>>>> > -adam
>>>>
>>>>
>>>> --
>>>> ---------------------------------
>>>> Takeyoshi Kikuchi
>>>> kikuchi@centurysys.co.jp
>>>>
>>>
>>>
>>> --
>>> Adam Feuer <ad...@starcat.io>
>>>
>>
>>
>> --
>> Adam Feuer <ad...@starcat.io>
>>
>
>
> --
> Adam Feuer <ad...@starcat.io>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Thanks, I see the SPDX code now. It's GPL. So I'm not psyched about using
that. :) I'd rather have something I can borrow from directly.
-adam
On Thu, Jun 11, 2020 at 3:18 PM Gregory Nutt <sp...@gmail.com> wrote:
>
> 54 Mbps would work for me. But I didn't see a LICENSE file or any text
> about it in the README file either in that repo. So I'm assuming this is
> not a driver that can be used. Or else it needs some work with Microchip to
> get them to clarify the license.
>
> Re: using a BSD driver, I didn't get what you mean about bringing in 3rd
> party code– it's BSD licensed, my understanding is that it can be brought
> in. Is that wrong?
>
> I see this in all of the files I looked at:
>
> // SPDX-License-Identifier: GPL-2.0
>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
> 54 Mbps would work for me. But I didn't see a LICENSE file or any text
> about it in the README file either in that repo. So I'm assuming this
> is not a driver that can be used. Or else it needs some work with
> Microchip to get them to clarify the license.
>
> Re: using a BSD driver, I didn't get what you mean about bringing in
> 3rd party code– it's BSD licensed, my understanding is that it can be
> brought in. Is that wrong?
I see this in all of the files I looked at:
// SPDX-License-Identifier: GPL-2.0
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
> The SocketCAN project on a branch is all BSD code and we have been given
> the verbal blessing to take the code into the repository. But not clear
> support or direction from anyone... only obstacles.
>
> If you can confirm that, then SocketCAN can come onto master immediately.
>
That would be awesome. I will get clarification on that if I get some
replies to my other email to the mentors about the BSD driver layer.
-adam
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
> I'm talking about using drivers from the OpenBSD or FreeBSD projects,
> not the driver on Github. :)
Okay
>
>
>>
>> This page on the Apache website
>> <https://www.apache.org/legal/resolved.html#category-a> is pretty
>> clear that BSD licensed code may be included in an Apache project.
>
The SocketCAN project on a branch is all BSD code and we have been given
the verbal blessing to take the code into the repository. But not clear
support or direction from anyone... only obstacles.
If you can confirm that, then SocketCAN can come onto master immediately.
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
I pushed a PR for the SAMA5D27 SDMMC support:
https://github.com/apache/incubator-nuttx/pull/1393
After this is done, I plan to work on NuttX support for ACME RoadRunner
<https://www.acmesystems.it/roadrunner> and Groboard's GiantBoard
<https://groboards.com/giant-board/>. Both are SAMA5D27 boards I would like
to use in some projects.
-adam
On Thu, Jul 2, 2020 at 10:17 PM Adam Feuer <ad...@starcat.io> wrote:
> Hi,
>
> I pushed a cleaned-up working SAMA5 SDMMC driver to this branch:
>
>
> https://github.com/starcat-io/incubator-nuttx/tree/feature/sama5d27-sdmmc-support
>
> It's ported from imxrt_usdhc.c, there were some differences but the
> structure is largely the same. This driver works with DMA, and can do
> widebus (4-bit) transfers in UHS_DDR50 mode (double data-rate 50MHz, so one
> transfer each on the rising and falling of the SD clock); up from the
> ixmrt's default of UHS_SDR25 (single data rate 25MHz).
>
> I haven't run nxstyle on it, I will try to do that this weekend, update
> the formatting, and get a PR submitted for review.
>
> cheers
> adam
>
>
>
> On Wed, Jun 17, 2020 at 9:19 PM Adam Feuer <ad...@starcat.io> wrote:
>
>> Thanks Nathan. It's been interesting learning how to port and debug NuttX
>> drivers. Hopefully I will be able to write something about it when I get
>> the code accepted.
>>
>> It was helpful that I could port a driver used by the same chip
>> peripheral IP block on other NuttX supported chips. I didn't have to write
>> it from scratch. Takeyoshi suggested doing the port and he was right about
>> it.
>>
>> -adam
>>
>>
>> On Wed, Jun 17, 2020 at 5:46 PM Nathan Hartman <ha...@gmail.com>
>> wrote:
>>
>>> On Wed, Jun 17, 2020 at 5:49 PM Adam Feuer <ad...@starcat.io> wrote:
>>>
>>> > SDMMC write is working now too. So the driver can do the following:
>>> >
>>> > - Non-DMA read and write
>>> > - DMA read and write in SDMA mode
>>> > - 1 bit bus
>>> > - 4 bit bus (widebus)
>>> > - up to 25Mhz
>>> >
>>> > I'm going to work on cleanup, documentation, and PR next. I'll post a
>>> > branch here when I get it somewhat cleaned up.
>>>
>>>
>>> That's exciting! Thanks for your hard work and for posting updates in the
>>> meantime.
>>>
>>> Cheers,
>>> Nathan
>>>
>>
>>
>> --
>> Adam Feuer <ad...@starcat.io>
>>
>
>
> --
> Adam Feuer <ad...@starcat.io>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Hi,
I pushed a cleaned-up working SAMA5 SDMMC driver to this branch:
https://github.com/starcat-io/incubator-nuttx/tree/feature/sama5d27-sdmmc-support
It's ported from imxrt_usdhc.c, there were some differences but the
structure is largely the same. This driver works with DMA, and can do
widebus (4-bit) transfers in UHS_DDR50 mode (double data-rate 50MHz, so one
transfer each on the rising and falling of the SD clock); up from the
ixmrt's default of UHS_SDR25 (single data rate 25MHz).
I haven't run nxstyle on it, I will try to do that this weekend, update the
formatting, and get a PR submitted for review.
cheers
adam
On Wed, Jun 17, 2020 at 9:19 PM Adam Feuer <ad...@starcat.io> wrote:
> Thanks Nathan. It's been interesting learning how to port and debug NuttX
> drivers. Hopefully I will be able to write something about it when I get
> the code accepted.
>
> It was helpful that I could port a driver used by the same chip peripheral
> IP block on other NuttX supported chips. I didn't have to write it from
> scratch. Takeyoshi suggested doing the port and he was right about it.
>
> -adam
>
>
> On Wed, Jun 17, 2020 at 5:46 PM Nathan Hartman <ha...@gmail.com>
> wrote:
>
>> On Wed, Jun 17, 2020 at 5:49 PM Adam Feuer <ad...@starcat.io> wrote:
>>
>> > SDMMC write is working now too. So the driver can do the following:
>> >
>> > - Non-DMA read and write
>> > - DMA read and write in SDMA mode
>> > - 1 bit bus
>> > - 4 bit bus (widebus)
>> > - up to 25Mhz
>> >
>> > I'm going to work on cleanup, documentation, and PR next. I'll post a
>> > branch here when I get it somewhat cleaned up.
>>
>>
>> That's exciting! Thanks for your hard work and for posting updates in the
>> meantime.
>>
>> Cheers,
>> Nathan
>>
>
>
> --
> Adam Feuer <ad...@starcat.io>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Thanks Nathan. It's been interesting learning how to port and debug NuttX
drivers. Hopefully I will be able to write something about it when I get
the code accepted.
It was helpful that I could port a driver used by the same chip peripheral
IP block on other NuttX supported chips. I didn't have to write it from
scratch. Takeyoshi suggested doing the port and he was right about it.
-adam
On Wed, Jun 17, 2020 at 5:46 PM Nathan Hartman <ha...@gmail.com>
wrote:
> On Wed, Jun 17, 2020 at 5:49 PM Adam Feuer <ad...@starcat.io> wrote:
>
> > SDMMC write is working now too. So the driver can do the following:
> >
> > - Non-DMA read and write
> > - DMA read and write in SDMA mode
> > - 1 bit bus
> > - 4 bit bus (widebus)
> > - up to 25Mhz
> >
> > I'm going to work on cleanup, documentation, and PR next. I'll post a
> > branch here when I get it somewhat cleaned up.
>
>
> That's exciting! Thanks for your hard work and for posting updates in the
> meantime.
>
> Cheers,
> Nathan
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Nathan Hartman <ha...@gmail.com>.
On Wed, Jun 17, 2020 at 5:49 PM Adam Feuer <ad...@starcat.io> wrote:
> SDMMC write is working now too. So the driver can do the following:
>
> - Non-DMA read and write
> - DMA read and write in SDMA mode
> - 1 bit bus
> - 4 bit bus (widebus)
> - up to 25Mhz
>
> I'm going to work on cleanup, documentation, and PR next. I'll post a
> branch here when I get it somewhat cleaned up.
That's exciting! Thanks for your hard work and for posting updates in the
meantime.
Cheers,
Nathan
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
SDMMC write is working now too. So the driver can do the following:
- Non-DMA read and write
- DMA read and write in SDMA mode
- 1 bit bus
- 4 bit bus (widebus)
- up to 25Mhz
I'm going to work on cleanup, documentation, and PR next. I'll post a
branch here when I get it somewhat cleaned up.
-adam
On Mon, Jun 15, 2020 at 9:14 PM Adam Feuer <ad...@starcat.io> wrote:
> SDMMC DMA read is working now too. I'll work on DMA write next.
>
> -adam
>
> On Fri, Jun 12, 2020 at 2:45 PM Adam Feuer <ad...@starcat.io> wrote:
>
>> I got the SDMMC write to work as well. This is in non-DMA mode. I'm going
>> to work on the DMA mode next.
>>
>> -adam
>> --
>> Adam Feuer <ad...@starcat.io>
>>
>
>
> --
> Adam Feuer <ad...@starcat.io>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
SDMMC DMA read is working now too. I'll work on DMA write next.
-adam
On Fri, Jun 12, 2020 at 2:45 PM Adam Feuer <ad...@starcat.io> wrote:
> I got the SDMMC write to work as well. This is in non-DMA mode. I'm going
> to work on the DMA mode next.
>
> -adam
> --
> Adam Feuer <ad...@starcat.io>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
I got the SDMMC write to work as well. This is in non-DMA mode. I'm going
to work on the DMA mode next.
-adam
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Thanks, I'll check it out!
-adam
On Thu, Jun 11, 2020 at 3:40 PM Gregory Nutt <sp...@gmail.com> wrote:
>
> > I'm talking about using drivers from the OpenBSD or FreeBSD projects,
> > not the driver on Github. :)
>
> There is a partial port of the OpenBSD IEEE802.11 SoftMAC stack that I
> did a long time ago here too:
> https://github.com/gregory-nutt/nuttx_ieee80211
>
>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
> I'm talking about using drivers from the OpenBSD or FreeBSD projects,
> not the driver on Github. :)
There is a partial port of the OpenBSD IEEE802.11 SoftMAC stack that I
did a long time ago here too:
https://github.com/gregory-nutt/nuttx_ieee80211
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
I'm talking about using drivers from the OpenBSD or FreeBSD projects, not
the driver on Github. :)
-adam
On Thu, Jun 11, 2020 at 3:19 PM Gregory Nutt <sp...@gmail.com> wrote:
>
>
> This page on the Apache website
> <https://www.apache.org/legal/resolved.html#category-a> is pretty clear
> that BSD licensed code may be included in an Apache project.
>
> But, unfortunately, that driver on github is GPL.
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
>
> This page on the Apache website
> <https://www.apache.org/legal/resolved.html#category-a> is pretty
> clear that BSD licensed code may be included in an Apache project.
>
But, unfortunately, that driver on github is GPL.
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Cool, I'll take it up the Apache folks before I start that project.
This page on the Apache website
<https://www.apache.org/legal/resolved.html#category-a> is pretty clear
that BSD licensed code may be included in an Apache project.
-adam
On Thu, Jun 11, 2020 at 3:13 PM Gregory Nutt <sp...@gmail.com> wrote:
>
> > Re: using a BSD driver, I didn't get what you mean about bringing in
> > 3rd party code– it's BSD licensed, my understanding is that it can be
> > brought in. Is that wrong?
>
> You will need to discuss with Justin. We have talked about this
> numerous times and still don't have any idea what is required. You will
> never get an ICLA or an SGA from business that have now no financial
> reason to do such a legal thing. No good attorney would every recommend
> that. There is no defined criterion for documenting what "getting
> permission from the copyright holder means."
>
> So as far as I know projects like SocketCAN which a good contributor has
> worked so hard on is stuck in limbo. And other people are circumventing
> the requirements by downloading code at build time.
>
> You guess is as good as mine how and open source project is supposed to
> use fully compatible code. I wish I knew and I wish I could help people
> who want to make contributions. But I don't.
>
>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
> Re: using a BSD driver, I didn't get what you mean about bringing in
> 3rd party code– it's BSD licensed, my understanding is that it can be
> brought in. Is that wrong?
You will need to discuss with Justin. We have talked about this
numerous times and still don't have any idea what is required. You will
never get an ICLA or an SGA from business that have now no financial
reason to do such a legal thing. No good attorney would every recommend
that. There is no defined criterion for documenting what "getting
permission from the copyright holder means."
So as far as I know projects like SocketCAN which a good contributor has
worked so hard on is stuck in limbo. And other people are circumventing
the requirements by downloading code at build time.
You guess is as good as mine how and open source project is supposed to
use fully compatible code. I wish I knew and I wish I could help people
who want to make contributions. But I don't.
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Greg,
54 Mbps would work for me. But I didn't see a LICENSE file or any text
about it in the README file either in that repo. So I'm assuming this is
not a driver that can be used. Or else it needs some work with Microchip to
get them to clarify the license.
Re: using a BSD driver, I didn't get what you mean about bringing in 3rd
party code– it's BSD licensed, my understanding is that it can be brought
in. Is that wrong?
I'll check out the driver you're enclosing... yes, I would need some other
stuff besides the driver, but if I can get the userland stuff from BSD
also... maybe that would work...
-adam
On Thu, Jun 11, 2020 at 2:54 PM Gregory Nutt <sp...@gmail.com> wrote:
>
> That looks like a cool module. The issue for me is that I need high speed
> Wifi connectivity (20 Mbps+, ideally 50Mbps+) for my upcoming projects.
> SPI/UART modules like this one usually have much lower throughput.
>
> The WiFi interface is SDIO. So we would need your SD/MMC driver (plus a
> couple of SDIO extensions).
>
> SPI and I2C are not used on the WiFi chip. The WiFi component is SDIO and
> Bluetooth component is UART So I don't see any Wifi performance limitation
> do to interface constraints.
>
> Radio performance is addressed in Table 4.4 here for various conditions
> http://ww1.microchip.com/downloads/en/DeviceDoc/70005327A.pdf Under
> certain conditions it can do 54Mbps
>
> This module does have a 50Mhz SDIO interface, so if it can use 4 bit mode,
> it could work. However, the ATWIL3000 Linux driver on Github
> <https://github.com/linux4wilc/driver> does not appear to have an open
> license– all the code is marked "All rights reserved". Is this the driver
> you were referring to?
>
> All of the NuttX files with BSD headers say "All rights reserved" too.
> That is usually part of all copyright statements. You should look at the
> LICENSE file if there is one. Bringing 3rd party code into NuttX is
> basically impossible with the current state of things unless you can NXP to
> provide you some written confirmation that they approve of you taking a
> snapshot of the code. They will not sign an SGA or ICLA but if they are
> like NXP, they will freely give consent otherwise
>
> And we can always download it on the fly at build time as we have done for
> other 3rd party code.
>
> I am looking at porting a USB Wifi driver from FreeBSD... The thing about
> porting a USB driver from FreeBSD that attracts me is that I could at least
> have access to a whole family of fast Wifi hardware that way. And in the
> best case scenario, if I can create a compatibility layer, then we could
> use a variety of FreeBSD wifi drivers.
>
> There is a RTL8187 Wifi USB driver for NuttX that you can look at here
> attached. This was ported from Linux years ago and is GPL so you can't
> bring it into NuttX, but you can look at it. It is kind of useless with no
> ieee802.11 SoftMAC stack anyway.
>
>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
> That looks like a cool module. The issue for me is that I need high
> speed Wifi connectivity (20 Mbps+, ideally 50Mbps+) for my upcoming
> projects. SPI/UART modules like this one usually have much lower
> throughput.
The WiFi interface is SDIO. So we would need your SD/MMC driver (plus a
couple of SDIO extensions).
SPI and I2C are not used on the WiFi chip. The WiFi component is SDIO
and Bluetooth component is UART So I don't see any Wifi performance
limitation do to interface constraints.
Radio performance is addressed in Table 4.4 here for various conditions
http://ww1.microchip.com/downloads/en/DeviceDoc/70005327A.pdf Under
certain conditions it can do 54Mbps
> This module does have a 50Mhz SDIO interface, so if it can use 4 bit
> mode, it could work. However, the ATWIL3000 Linux driver on Github
> <https://github.com/linux4wilc/driver> does not appear to have an open
> license– all the code is marked "All rights reserved". Is this the
> driver you were referring to?
All of the NuttX files with BSD headers say "All rights reserved" too.
That is usually part of all copyright statements. You should look at
the LICENSE file if there is one. Bringing 3rd party code into NuttX is
basically impossible with the current state of things unless you can NXP
to provide you some written confirmation that they approve of you taking
a snapshot of the code. They will not sign an SGA or ICLA but if they
are like NXP, they will freely give consent otherwise
And we can always download it on the fly at build time as we have done
for other 3rd party code.
> I am looking at porting a USB Wifi driver from FreeBSD... The thing
> about porting a USB driver from FreeBSD that attracts me is that I
> could at least have access to a whole family of fast Wifi hardware
> that way. And in the best case scenario, if I can create a
> compatibility layer, then we could use a variety of FreeBSD wifi drivers.
There is a RTL8187 Wifi USB driver for NuttX that you can look at here
attached. This was ported from Linux years ago and is GPL so you can't
bring it into NuttX, but you can look at it. It is kind of useless with
no ieee802.11 SoftMAC stack anyway.
Re: SAMA5D27 SDMMC support branch
Posted by Nathan Hartman <ha...@gmail.com>.
On Thu, Jun 11, 2020 at 5:26 PM Adam Feuer <ad...@starcat.io> wrote:
> This module does have a 50Mhz SDIO interface, so if it can use 4 bit mode,
> it could work. However, the ATWIL3000 Linux driver on Github
> <https://github.com/linux4wilc/driver> does not appear to have an open
> license– all the code is marked "All rights reserved". Is this the driver
> you were referring to?
>
> I am looking at porting a USB Wifi driver from FreeBSD... The thing about
> porting a USB driver from FreeBSD that attracts me is that I could at
least
> have access to a whole family of fast Wifi hardware that way. And in the
> best case scenario, if I can create a compatibility layer, then we could
> use a variety of FreeBSD wifi drivers.
FYI the Haiku-OS project did something like that [1]. They use FreeBSD
network drivers, both wired and wireless.
[1] "Haiku uses a FreeBSD network compatibility layer..."
https://www.haiku-os.org/community/getting-involved/developing/system/
Nathan
Re: SAMA5D27 SDMMC support branch
Posted by Adam Feuer <ad...@starcat.io>.
Hey Greg,
That looks like a cool module. The issue for me is that I need high speed
Wifi connectivity (20 Mbps+, ideally 50Mbps+) for my upcoming projects.
SPI/UART modules like this one usually have much lower throughput.
This module does have a 50Mhz SDIO interface, so if it can use 4 bit mode,
it could work. However, the ATWIL3000 Linux driver on Github
<https://github.com/linux4wilc/driver> does not appear to have an open
license– all the code is marked "All rights reserved". Is this the driver
you were referring to?
I am looking at porting a USB Wifi driver from FreeBSD... The thing about
porting a USB driver from FreeBSD that attracts me is that I could at least
have access to a whole family of fast Wifi hardware that way. And in the
best case scenario, if I can create a compatibility layer, then we could
use a variety of FreeBSD wifi drivers.
cheers
adam
On Thu, Jun 11, 2020 at 1:43 PM Gregory Nutt <sp...@gmail.com> wrote:
> Hey, SAMA5D2 guys,
>
> I have been looking at the ATSAMA5D27-WLSOM1 Evaluation Kit. I am
> impressed. It is based on the SAMAD27C and the ATWIL3000 wireless
> module. I am tempted to buy one.
>
> The ATWIL3000 has an SDIO interface to the Wifi (like the Broadcom
> chips) and UART interface to the Bluetooth. It runs $150 USD at
> Mouser. An open Microchip driver is for the ATWIL3000 is available in
> github. Anyone interesting in a fun Wifi project?
>
> Greg
>
> Refs:
> https://www.microchip.com/DevelopmentTools/ProductDetails/PartNO/DM320117
> https://www.microchip.com/wwwproducts/en/ATWILC3000
>
> https://www.mouser.com/development-tools-center/embedded-processor-development-kits/development-boards-kits-arm/microchip-atsama5d27wlsom1-eval-kit/n-cxd2tZ34u2t9
>
> On 6/11/2020 2:33 PM, Adam Feuer wrote:
> > Takeyoshi,
> >
> > Hey, in case you are interested, I got the SDMMC driver port working for
> > reading data today. It's quite a mess, and on a private branch. I will
> try
> > to get it working for writing, clean it up, and push it to this branch
> in a
> > few days.
> >
> > Thanks so much for your help!!
> >
> > cheers
> > adam
> >
> > On Mon, May 4, 2020 at 3:29 PM Adam Feuer <ad...@starcat.io> wrote:
> >
> >> Takeyoshi,
> >>
> >> Hi, I've been working on the SDMMC driver off and on. I still haven't
> got
> >> it working, but I am making some progress. Here's a log of register
> reads
> >> and writes captured from U-Boot on the SAMA5D27:
> >> index usecs op (bytes) register value value
> >> binary register long description
> >> 0 0 read (4): [0x0040: HTCAPBLT0] 0x27ec0c8c 0010
> 0111
> >> 1110 1100 0000 1100 1000 1100 Host Controller Capabilities 0 Register
> >> 1 4983 read (2): [0x00fe:HOST_VERSION] 0x00001502 0000
> 0000
> >> 0000 0000 0001 0101 0000 0010 Host Controller Version Register
> >> 2 10101 read (4): [0x0044: HTCAPBLT1] 0x00200f77 0000
> 0000
> >> 0010 0000 0000 1111 0111 0111 Host Controller Capabilities 1 Register
> >> 3 15225 write (1): [0x002f: SRR]w 0x00000001 0000
> 0000
> >> 0000 0000 0000 0000 0000 0001 Software Reset Register
> >> 4 20428 write (1): [0x0029: PCR]w 0x0000000f 0000
> 0000
> >> 0000 0000 0000 0000 0000 1111 Power Control Register
> >> 5 25629 write (4): [0x0034: IRQSTATEN]w 0x027f003b 0000
> 0010
> >> 0111 1111 0000 0000 0011 1011 Interrupt Status Enable Register
> >> 6 30833 write (4): [0x0038: IRQSIGEN]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Interrupt Signal Enable Register
> >> 7 44875 read (4): [0x0040: HTCAPBLT0] 0x27e80c8c 0010
> 0111
> >> 1110 1000 0000 1100 1000 1100 Host Controller Capabilities 0 Register
> >> 8 49848 read (2): [0x00fe:HOST_VERSION] 0x00001502 0000
> 0000
> >> 0000 0000 0001 0101 0000 0010 Host Controller Version Register
> >> 9 54966 read (4): [0x0044: HTCAPBLT1] 0x00200070 0000
> 0000
> >> 0010 0000 0000 0000 0111 0000 Host Controller Capabilities 1 Register
> >> 10 60088 write (1): [0x002f: SRR]w 0x00000001 0000
> 0000
> >> 0000 0000 0000 0000 0000 0001 Software Reset Register
> >> 11 66296 write (1): [0x0029: PCR]w 0x0000000f 0000
> 0000
> >> 0000 0000 0000 0000 0000 1111 Power Control Register
> >> 12 71353 write (4): [0x0034: IRQSTATEN]w 0x027f003b 0000
> 0010
> >> 0111 1111 0000 0000 0011 1011 Interrupt Status Enable Register
> >> 13 76557 write (4): [0x0038: IRQSIGEN]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Interrupt Signal Enable Register
> >> 14 88990 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000
> 0001
> >> 1111 1111 0000 0000 0000 0000 Present State Register
> >> 15 94080 write (2): [0x002c: SYSCTL]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
> >> Register/Timout Control Register
> >> 16 99285 read (1): [0x0028: PROCTL] 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> >> 17 106408 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000
> 0001
> >> 1111 1111 0000 0000 0000 0000 Present State Register
> >> 18 111377 write (2): [0x002c: SYSCTL]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
> >> Register/Timout Control Register
> >> 19 116582 read (1): [0x0028: PROCTL] 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> >> 20 121704 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000
> 0001
> >> 1111 1111 0000 0000 0000 0000 Present State Register
> >> 21 126818 write (2): [0x002c: SYSCTL]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
> >> Register/Timout Control Register
> >> 22 132150 write (2): [0x002c: SYSCTL]w 0x000057a1 0000
> 0000
> >> 0000 0000 0101 0111 1010 0001 System Control Register, or Clock Control
> >> Register/Timout Control Register
> >> 23 138235 write (2): [0x002c: SYSCTL]w 0x000057a7 0000
> 0000
> >> 0000 0000 0101 0111 1010 0111 System Control Register, or Clock Control
> >> Register/Timout Control Register
> >> 24 143292 read (1): [0x0028: PROCTL] 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> >> 25 148410 write (1): [0x0028: PROCTL]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Protocol Control Register
> >> 26 154620 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000
> 0001
> >> 1111 1111 0000 0000 0000 0000 Present State Register
> >> 27 159583 write (4): [0x0030: IRQSTAT]w 0xffffffff 1111
> 1111
> >> 1111 1111 1111 1111 1111 1111 Interrupt Status Register
> >> 28 164789 write (4): [0x0008: CMDARG]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Command Argument Register
> >> 29 169993 write (2): [0x000e: CR]w 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Command Register
> >> 30 175199 read (4): [0x0030: IRQSTAT] 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Interrupt Status Register
> >> 31 180322 read (4): [0x0010: CMDRSP0] 0x00000000 0000
> 0000
> >> 0000 0000 0000 0000 0000 0000 Command Response 0
> >>
> >> I have a MMC sniffer and logic analyzer hooked up and can see traffic on
> >> the SD Card bus under U-Boot. Under NuttX, nothing. I am going to try to
> >> capture a register log like this one under NuttX, and compare; and maybe
> >> try to replay the U-Boot sequence under NuttX to see if I can get
> signals
> >> on the SDMMC bus. If you have more ideas, I would love to hear them.
> >>
> >> cheers
> >> adam
> >>
> >>
> >> On Mon, Apr 13, 2020 at 5:38 PM Adam Feuer <ad...@starcat.io> wrote:
> >>
> >>> Takeyoshi,
> >>>
> >>> I finally got the new sama5 sam_sdmmc.c driver to compile. I haven't
> >>> tested it yet, so I don't know if it actually works... I pushed the
> code to
> >>> the branch, I am attaching the config I used.
> >>>
> >>> -adam
> >>>
> >>> On Thu, Apr 2, 2020 at 3:23 PM Adam Feuer <ad...@starcat.io> wrote:
> >>>
> >>>> Takeyoshi,
> >>>>
> >>>> No worries– I had to work on other things too.
> >>>>
> >>>> -adam
> >>>>
> >>>> On Thu, Apr 2, 2020 at 3:22 PM Takeyoshi Kikuchi <
> >>>> kikuchi@centurysys.co.jp> wrote:
> >>>>
> >>>>> Adam,
> >>>>>
> >>>>> Sorry, I am currently busy working and have no progress.
> >>>>> I want to check tomorrow.
> >>>>>
> >>>>> Takeyoshi Kikuchi
> >>>>>
> >>>>> On 2020/04/02 9:48, Adam Feuer wrote:
> >>>>>> Takeyoshi,
> >>>>>>
> >>>>>> I did some work on the SDMCC driver today, it compiles now and I
> >>>>> pushed the
> >>>>>> code to the branch. I will try it and let you know how it goes. I am
> >>>>> still
> >>>>>> not sure everything is right, for instance why do I have to specify
> >>>>>> SDMMC0_SIZE? The sama5d2x_memorymap.c file seems to need it. But it
> >>>>> should
> >>>>>> not be operating in memory-mapped mode, so I'm confused.
> >>>>>>
> >>>>>> Here are the config settings I used:
> >>>>>>
> >>>>>> #
> >>>>>> # This file is autogenerated: PLEASE DO NOT EDIT IT.
> >>>>>> #
> >>>>>> # You can use "make menuconfig" to make any modifications to the
> >>>>> installed
> >>>>>> .config file.
> >>>>>> # You can then do "make savedefconfig" to generate a new defconfig
> >>>>> file
> >>>>>> that includes your
> >>>>>> # modifications.
> >>>>>> #
> >>>>>> # CONFIG_AUDIO_FORMAT_MP3 is not set
> >>>>>> # CONFIG_DISABLE_OS_API is not set
> >>>>>> # CONFIG_NSH_ARGCAT is not set
> >>>>>> # CONFIG_NSH_CMDOPT_HEXDUMP is not set
> >>>>>> # CONFIG_NSH_CMDPARMS is not set
> >>>>>> # CONFIG_SAMA5_UART0 is not set
> >>>>>> CONFIG_ARCH="arm"
> >>>>>> CONFIG_ARCH_BOARD="sama5d2-xult"
> >>>>>> CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
> >>>>>> CONFIG_ARCH_BUTTONS=y
> >>>>>> CONFIG_ARCH_CHIP="sama5"
> >>>>>> CONFIG_ARCH_CHIP_ATSAMA5D27=y
> >>>>>> CONFIG_ARCH_CHIP_SAMA5=y
> >>>>>> CONFIG_ARCH_CHIP_SAMA5D2=y
> >>>>>> CONFIG_ARCH_INTERRUPTSTACK=2048
> >>>>>> CONFIG_ARCH_IRQBUTTONS=y
> >>>>>> CONFIG_ARCH_LOWVECTORS=y
> >>>>>> CONFIG_ARCH_STACKDUMP=y
> >>>>>> CONFIG_AUDIO=y
> >>>>>> CONFIG_AUDIO_NUM_BUFFERS=8
> >>>>>> CONFIG_BOARD_LOOPSPERMSEC=65775
> >>>>>> CONFIG_BOOT_RUNFROMSDRAM=y
> >>>>>> CONFIG_BUILTIN=y
> >>>>>> CONFIG_DEBUG_FEATURES=y
> >>>>>> CONFIG_DEBUG_FULLOPT=y
> >>>>>> CONFIG_DEBUG_SYMBOLS=y
> >>>>>> CONFIG_DEV_LOOP=y
> >>>>>> CONFIG_DEV_ZERO=y
> >>>>>> CONFIG_EXAMPLES_HELLO=y
> >>>>>> CONFIG_EXAMPLES_PARTITION=y
> >>>>>> CONFIG_EXAMPLES_TCPBLASTER=y
> >>>>>> CONFIG_EXAMPLES_TCPECHO=y
> >>>>>> CONFIG_EXAMPLES_WGET=y
> >>>>>> CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
> >>>>>> CONFIG_FAT_LCNAMES=y
> >>>>>> CONFIG_FAT_LFN=y
> >>>>>> CONFIG_FS_FAT=y
> >>>>>> CONFIG_FS_PROCFS=y
> >>>>>> CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
> >>>>>> CONFIG_FS_ROMFS=y
> >>>>>> CONFIG_HAVE_CXX=y
> >>>>>> CONFIG_HAVE_CXXINITIALIZE=y
> >>>>>> CONFIG_HIDKBD_POLLUSEC=80000
> >>>>>> CONFIG_I2S=y
> >>>>>> CONFIG_INTELHEX_BINARY=y
> >>>>>> CONFIG_IOB_NBUFFERS=72
> >>>>>> CONFIG_IOB_THROTTLE=16
> >>>>>> CONFIG_MAX_TASKS=16
> >>>>>> CONFIG_MAX_WDOGPARMS=2
> >>>>>> CONFIG_NETINIT_NETLOCAL=y
> >>>>>> CONFIG_NETINIT_NOMAC=y
> >>>>>> CONFIG_NETUTILS_NETLIB_GENERICURLPARSER=y
> >>>>>> CONFIG_NETUTILS_TELNETC=y
> >>>>>> CONFIG_NETUTILS_WEBCLIENT=y
> >>>>>> CONFIG_NET_ARP_IPIN=y
> >>>>>> CONFIG_NET_ARP_SEND=y
> >>>>>> CONFIG_NET_BROADCAST=y
> >>>>>> CONFIG_NET_CDCECM=y
> >>>>>> CONFIG_NET_ETH_PKTSIZE=1514
> >>>>>> CONFIG_NET_ICMP=y
> >>>>>> CONFIG_NET_ICMP_SOCKET=y
> >>>>>> CONFIG_NET_ROUTE=y
> >>>>>> CONFIG_NET_STATISTICS=y
> >>>>>> CONFIG_NET_TCP=y
> >>>>>> CONFIG_NET_TCPBACKLOG=y
> >>>>>> CONFIG_NET_TCP_NOTIFIER=y
> >>>>>> CONFIG_NET_TCP_WRITE_BUFFERS=y
> >>>>>> CONFIG_NET_UDP=y
> >>>>>> CONFIG_NFILE_DESCRIPTORS=8
> >>>>>> CONFIG_NFILE_STREAMS=8
> >>>>>> CONFIG_NSH_ARCHINIT=y
> >>>>>> CONFIG_NSH_BUILTIN_APPS=y
> >>>>>> CONFIG_NSH_FILEIOSIZE=512
> >>>>>> CONFIG_NSH_PROMPT_STRING="nsh> "
> >>>>>> CONFIG_NSH_QUOTE=y
> >>>>>> CONFIG_NSH_READLINE=y
> >>>>>> CONFIG_NSH_ROMFSETC=y
> >>>>>> CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard"
> >>>>>> CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y
> >>>>>> CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y
> >>>>>> CONFIG_PREALLOC_MQ_MSGS=4
> >>>>>> CONFIG_PREALLOC_TIMERS=4
> >>>>>> CONFIG_PREALLOC_WDOGS=16
> >>>>>> CONFIG_RAMLOG=y
> >>>>>> CONFIG_RAMLOG_BUFSIZE=16384
> >>>>>> CONFIG_RAMLOG_SYSLOG=y
> >>>>>> CONFIG_RAM_SIZE=268435456
> >>>>>> CONFIG_RAM_START=0x20000000
> >>>>>> CONFIG_RAM_VSTART=0x20000000
> >>>>>> CONFIG_RAW_BINARY=y
> >>>>>> CONFIG_READLINE_CMD_HISTORY=y
> >>>>>> CONFIG_READLINE_CMD_HISTORY_LEN=100
> >>>>>> CONFIG_READLINE_CMD_HISTORY_LINELEN=120
> >>>>>> CONFIG_READLINE_TABCOMPLETION=y
> >>>>>> CONFIG_RR_INTERVAL=200
> >>>>>> CONFIG_SAMA5D2XULT_528MHZ=y
> >>>>>> CONFIG_SAMA5D2XULT_USBHOST_STACKSIZE=2048
> >>>>>> CONFIG_SAMA5_BOOT_SDRAM=y
> >>>>>> CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
> >>>>>> CONFIG_SAMA5_DDRCS_RESERVE=y
> >>>>>> CONFIG_SAMA5_EHCI=y
> >>>>>> CONFIG_SAMA5_HSMC=y
> >>>>>> CONFIG_SAMA5_OHCI=y
> >>>>>> CONFIG_SAMA5_PIOA_IRQ=y
> >>>>>> CONFIG_SAMA5_PIOB_IRQ=y
> >>>>>> CONFIG_SAMA5_PIOC_IRQ=y
> >>>>>> CONFIG_SAMA5_PIO_IRQ=y
> >>>>>> CONFIG_SAMA5_RTC=y
> >>>>>> CONFIG_SAMA5_SDMMC0=y
> >>>>>> CONFIG_SAMA5_TRNG=y
> >>>>>> CONFIG_SAMA5_UART1=y
> >>>>>> CONFIG_SAMA5_UDPHS=y
> >>>>>> CONFIG_SAMA5_UHPHS=y
> >>>>>> CONFIG_SCHED_HPWORKPRIORITY=192
> >>>>>> CONFIG_SCHED_LPNTHREADS=2
> >>>>>> CONFIG_SCHED_LPWORK=y
> >>>>>> CONFIG_SCHED_WAITPID=y
> >>>>>> CONFIG_SDCLONE_DISABLE=y
> >>>>>> CONFIG_SERIAL_TERMIOS=y
> >>>>>> CONFIG_SIG_DEFAULT=y
> >>>>>> CONFIG_SIG_EVTHREAD=y
> >>>>>> CONFIG_START_DAY=31
> >>>>>> CONFIG_START_MONTH=7
> >>>>>> CONFIG_START_YEAR=2014
> >>>>>> CONFIG_SYMTAB_ORDEREDBYNAME=y
> >>>>>> CONFIG_SYSLOG_TIMESTAMP=y
> >>>>>> CONFIG_SYSTEM_NSH=y
> >>>>>> CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
> >>>>>> CONFIG_SYSTEM_NXPLAYER=y
> >>>>>> CONFIG_SYSTEM_PING=y
> >>>>>> CONFIG_SYSTEM_VI=y
> >>>>>> CONFIG_TTY_SIGINT=y
> >>>>>> CONFIG_TTY_SIGSTP=y
> >>>>>> CONFIG_UART1_SERIAL_CONSOLE=y
> >>>>>> CONFIG_USBDEV=y
> >>>>>> CONFIG_USBDEV_DMA=y
> >>>>>> CONFIG_USBDEV_DUALSPEED=y
> >>>>>> CONFIG_USBDEV_TRACE=y
> >>>>>> CONFIG_USBDEV_TRACE_NRECORDS=512
> >>>>>> CONFIG_USBHOST_HIDKBD=y
> >>>>>> CONFIG_USBHOST_MSC=y
> >>>>>> CONFIG_USER_ENTRYPOINT="nsh_main"
> >>>>>> CONFIG_WDOG_INTRESERVE=2
> >>>>>>
> >>>>>> -adam
> >>>>>
> >>>>> --
> >>>>> ---------------------------------
> >>>>> Takeyoshi Kikuchi
> >>>>> kikuchi@centurysys.co.jp
> >>>>>
> >>>>
> >>>> --
> >>>> Adam Feuer <ad...@starcat.io>
> >>>>
> >>>
> >>> --
> >>> Adam Feuer <ad...@starcat.io>
> >>>
> >>
> >> --
> >> Adam Feuer <ad...@starcat.io>
> >>
> >
>
>
--
Adam Feuer <ad...@starcat.io>
Re: SAMA5D27 SDMMC support branch
Posted by Gregory Nutt <sp...@gmail.com>.
Hey, SAMA5D2 guys,
I have been looking at the ATSAMA5D27-WLSOM1 Evaluation Kit. I am
impressed. It is based on the SAMAD27C and the ATWIL3000 wireless
module. I am tempted to buy one.
The ATWIL3000 has an SDIO interface to the Wifi (like the Broadcom
chips) and UART interface to the Bluetooth. It runs $150 USD at
Mouser. An open Microchip driver is for the ATWIL3000 is available in
github. Anyone interesting in a fun Wifi project?
Greg
Refs:
https://www.microchip.com/DevelopmentTools/ProductDetails/PartNO/DM320117
https://www.microchip.com/wwwproducts/en/ATWILC3000
https://www.mouser.com/development-tools-center/embedded-processor-development-kits/development-boards-kits-arm/microchip-atsama5d27wlsom1-eval-kit/n-cxd2tZ34u2t9
On 6/11/2020 2:33 PM, Adam Feuer wrote:
> Takeyoshi,
>
> Hey, in case you are interested, I got the SDMMC driver port working for
> reading data today. It's quite a mess, and on a private branch. I will try
> to get it working for writing, clean it up, and push it to this branch in a
> few days.
>
> Thanks so much for your help!!
>
> cheers
> adam
>
> On Mon, May 4, 2020 at 3:29 PM Adam Feuer <ad...@starcat.io> wrote:
>
>> Takeyoshi,
>>
>> Hi, I've been working on the SDMMC driver off and on. I still haven't got
>> it working, but I am making some progress. Here's a log of register reads
>> and writes captured from U-Boot on the SAMA5D27:
>> index usecs op (bytes) register value value
>> binary register long description
>> 0 0 read (4): [0x0040: HTCAPBLT0] 0x27ec0c8c 0010 0111
>> 1110 1100 0000 1100 1000 1100 Host Controller Capabilities 0 Register
>> 1 4983 read (2): [0x00fe:HOST_VERSION] 0x00001502 0000 0000
>> 0000 0000 0001 0101 0000 0010 Host Controller Version Register
>> 2 10101 read (4): [0x0044: HTCAPBLT1] 0x00200f77 0000 0000
>> 0010 0000 0000 1111 0111 0111 Host Controller Capabilities 1 Register
>> 3 15225 write (1): [0x002f: SRR]w 0x00000001 0000 0000
>> 0000 0000 0000 0000 0000 0001 Software Reset Register
>> 4 20428 write (1): [0x0029: PCR]w 0x0000000f 0000 0000
>> 0000 0000 0000 0000 0000 1111 Power Control Register
>> 5 25629 write (4): [0x0034: IRQSTATEN]w 0x027f003b 0000 0010
>> 0111 1111 0000 0000 0011 1011 Interrupt Status Enable Register
>> 6 30833 write (4): [0x0038: IRQSIGEN]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Interrupt Signal Enable Register
>> 7 44875 read (4): [0x0040: HTCAPBLT0] 0x27e80c8c 0010 0111
>> 1110 1000 0000 1100 1000 1100 Host Controller Capabilities 0 Register
>> 8 49848 read (2): [0x00fe:HOST_VERSION] 0x00001502 0000 0000
>> 0000 0000 0001 0101 0000 0010 Host Controller Version Register
>> 9 54966 read (4): [0x0044: HTCAPBLT1] 0x00200070 0000 0000
>> 0010 0000 0000 0000 0111 0000 Host Controller Capabilities 1 Register
>> 10 60088 write (1): [0x002f: SRR]w 0x00000001 0000 0000
>> 0000 0000 0000 0000 0000 0001 Software Reset Register
>> 11 66296 write (1): [0x0029: PCR]w 0x0000000f 0000 0000
>> 0000 0000 0000 0000 0000 1111 Power Control Register
>> 12 71353 write (4): [0x0034: IRQSTATEN]w 0x027f003b 0000 0010
>> 0111 1111 0000 0000 0011 1011 Interrupt Status Enable Register
>> 13 76557 write (4): [0x0038: IRQSIGEN]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Interrupt Signal Enable Register
>> 14 88990 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
>> 1111 1111 0000 0000 0000 0000 Present State Register
>> 15 94080 write (2): [0x002c: SYSCTL]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
>> Register/Timout Control Register
>> 16 99285 read (1): [0x0028: PROCTL] 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Protocol Control Register
>> 17 106408 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
>> 1111 1111 0000 0000 0000 0000 Present State Register
>> 18 111377 write (2): [0x002c: SYSCTL]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
>> Register/Timout Control Register
>> 19 116582 read (1): [0x0028: PROCTL] 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Protocol Control Register
>> 20 121704 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
>> 1111 1111 0000 0000 0000 0000 Present State Register
>> 21 126818 write (2): [0x002c: SYSCTL]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 System Control Register, or Clock Control
>> Register/Timout Control Register
>> 22 132150 write (2): [0x002c: SYSCTL]w 0x000057a1 0000 0000
>> 0000 0000 0101 0111 1010 0001 System Control Register, or Clock Control
>> Register/Timout Control Register
>> 23 138235 write (2): [0x002c: SYSCTL]w 0x000057a7 0000 0000
>> 0000 0000 0101 0111 1010 0111 System Control Register, or Clock Control
>> Register/Timout Control Register
>> 24 143292 read (1): [0x0028: PROCTL] 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Protocol Control Register
>> 25 148410 write (1): [0x0028: PROCTL]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Protocol Control Register
>> 26 154620 read (4): [0x0024: PRSSTAT] 0x01ff0000 0000 0001
>> 1111 1111 0000 0000 0000 0000 Present State Register
>> 27 159583 write (4): [0x0030: IRQSTAT]w 0xffffffff 1111 1111
>> 1111 1111 1111 1111 1111 1111 Interrupt Status Register
>> 28 164789 write (4): [0x0008: CMDARG]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Command Argument Register
>> 29 169993 write (2): [0x000e: CR]w 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Command Register
>> 30 175199 read (4): [0x0030: IRQSTAT] 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Interrupt Status Register
>> 31 180322 read (4): [0x0010: CMDRSP0] 0x00000000 0000 0000
>> 0000 0000 0000 0000 0000 0000 Command Response 0
>>
>> I have a MMC sniffer and logic analyzer hooked up and can see traffic on
>> the SD Card bus under U-Boot. Under NuttX, nothing. I am going to try to
>> capture a register log like this one under NuttX, and compare; and maybe
>> try to replay the U-Boot sequence under NuttX to see if I can get signals
>> on the SDMMC bus. If you have more ideas, I would love to hear them.
>>
>> cheers
>> adam
>>
>>
>> On Mon, Apr 13, 2020 at 5:38 PM Adam Feuer <ad...@starcat.io> wrote:
>>
>>> Takeyoshi,
>>>
>>> I finally got the new sama5 sam_sdmmc.c driver to compile. I haven't
>>> tested it yet, so I don't know if it actually works... I pushed the code to
>>> the branch, I am attaching the config I used.
>>>
>>> -adam
>>>
>>> On Thu, Apr 2, 2020 at 3:23 PM Adam Feuer <ad...@starcat.io> wrote:
>>>
>>>> Takeyoshi,
>>>>
>>>> No worries– I had to work on other things too.
>>>>
>>>> -adam
>>>>
>>>> On Thu, Apr 2, 2020 at 3:22 PM Takeyoshi Kikuchi <
>>>> kikuchi@centurysys.co.jp> wrote:
>>>>
>>>>> Adam,
>>>>>
>>>>> Sorry, I am currently busy working and have no progress.
>>>>> I want to check tomorrow.
>>>>>
>>>>> Takeyoshi Kikuchi
>>>>>
>>>>> On 2020/04/02 9:48, Adam Feuer wrote:
>>>>>> Takeyoshi,
>>>>>>
>>>>>> I did some work on the SDMCC driver today, it compiles now and I
>>>>> pushed the
>>>>>> code to the branch. I will try it and let you know how it goes. I am
>>>>> still
>>>>>> not sure everything is right, for instance why do I have to specify
>>>>>> SDMMC0_SIZE? The sama5d2x_memorymap.c file seems to need it. But it
>>>>> should
>>>>>> not be operating in memory-mapped mode, so I'm confused.
>>>>>>
>>>>>> Here are the config settings I used:
>>>>>>
>>>>>> #
>>>>>> # This file is autogenerated: PLEASE DO NOT EDIT IT.
>>>>>> #
>>>>>> # You can use "make menuconfig" to make any modifications to the
>>>>> installed
>>>>>> .config file.
>>>>>> # You can then do "make savedefconfig" to generate a new defconfig
>>>>> file
>>>>>> that includes your
>>>>>> # modifications.
>>>>>> #
>>>>>> # CONFIG_AUDIO_FORMAT_MP3 is not set
>>>>>> # CONFIG_DISABLE_OS_API is not set
>>>>>> # CONFIG_NSH_ARGCAT is not set
>>>>>> # CONFIG_NSH_CMDOPT_HEXDUMP is not set
>>>>>> # CONFIG_NSH_CMDPARMS is not set
>>>>>> # CONFIG_SAMA5_UART0 is not set
>>>>>> CONFIG_ARCH="arm"
>>>>>> CONFIG_ARCH_BOARD="sama5d2-xult"
>>>>>> CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
>>>>>> CONFIG_ARCH_BUTTONS=y
>>>>>> CONFIG_ARCH_CHIP="sama5"
>>>>>> CONFIG_ARCH_CHIP_ATSAMA5D27=y
>>>>>> CONFIG_ARCH_CHIP_SAMA5=y
>>>>>> CONFIG_ARCH_CHIP_SAMA5D2=y
>>>>>> CONFIG_ARCH_INTERRUPTSTACK=2048
>>>>>> CONFIG_ARCH_IRQBUTTONS=y
>>>>>> CONFIG_ARCH_LOWVECTORS=y
>>>>>> CONFIG_ARCH_STACKDUMP=y
>>>>>> CONFIG_AUDIO=y
>>>>>> CONFIG_AUDIO_NUM_BUFFERS=8
>>>>>> CONFIG_BOARD_LOOPSPERMSEC=65775
>>>>>> CONFIG_BOOT_RUNFROMSDRAM=y
>>>>>> CONFIG_BUILTIN=y
>>>>>> CONFIG_DEBUG_FEATURES=y
>>>>>> CONFIG_DEBUG_FULLOPT=y
>>>>>> CONFIG_DEBUG_SYMBOLS=y
>>>>>> CONFIG_DEV_LOOP=y
>>>>>> CONFIG_DEV_ZERO=y
>>>>>> CONFIG_EXAMPLES_HELLO=y
>>>>>> CONFIG_EXAMPLES_PARTITION=y
>>>>>> CONFIG_EXAMPLES_TCPBLASTER=y
>>>>>> CONFIG_EXAMPLES_TCPECHO=y
>>>>>> CONFIG_EXAMPLES_WGET=y
>>>>>> CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
>>>>>> CONFIG_FAT_LCNAMES=y
>>>>>> CONFIG_FAT_LFN=y
>>>>>> CONFIG_FS_FAT=y
>>>>>> CONFIG_FS_PROCFS=y
>>>>>> CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
>>>>>> CONFIG_FS_ROMFS=y
>>>>>> CONFIG_HAVE_CXX=y
>>>>>> CONFIG_HAVE_CXXINITIALIZE=y
>>>>>> CONFIG_HIDKBD_POLLUSEC=80000
>>>>>> CONFIG_I2S=y
>>>>>> CONFIG_INTELHEX_BINARY=y
>>>>>> CONFIG_IOB_NBUFFERS=72
>>>>>> CONFIG_IOB_THROTTLE=16
>>>>>> CONFIG_MAX_TASKS=16
>>>>>> CONFIG_MAX_WDOGPARMS=2
>>>>>> CONFIG_NETINIT_NETLOCAL=y
>>>>>> CONFIG_NETINIT_NOMAC=y
>>>>>> CONFIG_NETUTILS_NETLIB_GENERICURLPARSER=y
>>>>>> CONFIG_NETUTILS_TELNETC=y
>>>>>> CONFIG_NETUTILS_WEBCLIENT=y
>>>>>> CONFIG_NET_ARP_IPIN=y
>>>>>> CONFIG_NET_ARP_SEND=y
>>>>>> CONFIG_NET_BROADCAST=y
>>>>>> CONFIG_NET_CDCECM=y
>>>>>> CONFIG_NET_ETH_PKTSIZE=1514
>>>>>> CONFIG_NET_ICMP=y
>>>>>> CONFIG_NET_ICMP_SOCKET=y
>>>>>> CONFIG_NET_ROUTE=y
>>>>>> CONFIG_NET_STATISTICS=y
>>>>>> CONFIG_NET_TCP=y
>>>>>> CONFIG_NET_TCPBACKLOG=y
>>>>>> CONFIG_NET_TCP_NOTIFIER=y
>>>>>> CONFIG_NET_TCP_WRITE_BUFFERS=y
>>>>>> CONFIG_NET_UDP=y
>>>>>> CONFIG_NFILE_DESCRIPTORS=8
>>>>>> CONFIG_NFILE_STREAMS=8
>>>>>> CONFIG_NSH_ARCHINIT=y
>>>>>> CONFIG_NSH_BUILTIN_APPS=y
>>>>>> CONFIG_NSH_FILEIOSIZE=512
>>>>>> CONFIG_NSH_PROMPT_STRING="nsh> "
>>>>>> CONFIG_NSH_QUOTE=y
>>>>>> CONFIG_NSH_READLINE=y
>>>>>> CONFIG_NSH_ROMFSETC=y
>>>>>> CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard"
>>>>>> CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y
>>>>>> CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y
>>>>>> CONFIG_PREALLOC_MQ_MSGS=4
>>>>>> CONFIG_PREALLOC_TIMERS=4
>>>>>> CONFIG_PREALLOC_WDOGS=16
>>>>>> CONFIG_RAMLOG=y
>>>>>> CONFIG_RAMLOG_BUFSIZE=16384
>>>>>> CONFIG_RAMLOG_SYSLOG=y
>>>>>> CONFIG_RAM_SIZE=268435456
>>>>>> CONFIG_RAM_START=0x20000000
>>>>>> CONFIG_RAM_VSTART=0x20000000
>>>>>> CONFIG_RAW_BINARY=y
>>>>>> CONFIG_READLINE_CMD_HISTORY=y
>>>>>> CONFIG_READLINE_CMD_HISTORY_LEN=100
>>>>>> CONFIG_READLINE_CMD_HISTORY_LINELEN=120
>>>>>> CONFIG_READLINE_TABCOMPLETION=y
>>>>>> CONFIG_RR_INTERVAL=200
>>>>>> CONFIG_SAMA5D2XULT_528MHZ=y
>>>>>> CONFIG_SAMA5D2XULT_USBHOST_STACKSIZE=2048
>>>>>> CONFIG_SAMA5_BOOT_SDRAM=y
>>>>>> CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
>>>>>> CONFIG_SAMA5_DDRCS_RESERVE=y
>>>>>> CONFIG_SAMA5_EHCI=y
>>>>>> CONFIG_SAMA5_HSMC=y
>>>>>> CONFIG_SAMA5_OHCI=y
>>>>>> CONFIG_SAMA5_PIOA_IRQ=y
>>>>>> CONFIG_SAMA5_PIOB_IRQ=y
>>>>>> CONFIG_SAMA5_PIOC_IRQ=y
>>>>>> CONFIG_SAMA5_PIO_IRQ=y
>>>>>> CONFIG_SAMA5_RTC=y
>>>>>> CONFIG_SAMA5_SDMMC0=y
>>>>>> CONFIG_SAMA5_TRNG=y
>>>>>> CONFIG_SAMA5_UART1=y
>>>>>> CONFIG_SAMA5_UDPHS=y
>>>>>> CONFIG_SAMA5_UHPHS=y
>>>>>> CONFIG_SCHED_HPWORKPRIORITY=192
>>>>>> CONFIG_SCHED_LPNTHREADS=2
>>>>>> CONFIG_SCHED_LPWORK=y
>>>>>> CONFIG_SCHED_WAITPID=y
>>>>>> CONFIG_SDCLONE_DISABLE=y
>>>>>> CONFIG_SERIAL_TERMIOS=y
>>>>>> CONFIG_SIG_DEFAULT=y
>>>>>> CONFIG_SIG_EVTHREAD=y
>>>>>> CONFIG_START_DAY=31
>>>>>> CONFIG_START_MONTH=7
>>>>>> CONFIG_START_YEAR=2014
>>>>>> CONFIG_SYMTAB_ORDEREDBYNAME=y
>>>>>> CONFIG_SYSLOG_TIMESTAMP=y
>>>>>> CONFIG_SYSTEM_NSH=y
>>>>>> CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
>>>>>> CONFIG_SYSTEM_NXPLAYER=y
>>>>>> CONFIG_SYSTEM_PING=y
>>>>>> CONFIG_SYSTEM_VI=y
>>>>>> CONFIG_TTY_SIGINT=y
>>>>>> CONFIG_TTY_SIGSTP=y
>>>>>> CONFIG_UART1_SERIAL_CONSOLE=y
>>>>>> CONFIG_USBDEV=y
>>>>>> CONFIG_USBDEV_DMA=y
>>>>>> CONFIG_USBDEV_DUALSPEED=y
>>>>>> CONFIG_USBDEV_TRACE=y
>>>>>> CONFIG_USBDEV_TRACE_NRECORDS=512
>>>>>> CONFIG_USBHOST_HIDKBD=y
>>>>>> CONFIG_USBHOST_MSC=y
>>>>>> CONFIG_USER_ENTRYPOINT="nsh_main"
>>>>>> CONFIG_WDOG_INTRESERVE=2
>>>>>>
>>>>>> -adam
>>>>>
>>>>> --
>>>>> ---------------------------------
>>>>> Takeyoshi Kikuchi
>>>>> kikuchi@centurysys.co.jp
>>>>>
>>>>
>>>> --
>>>> Adam Feuer <ad...@starcat.io>
>>>>
>>>
>>> --
>>> Adam Feuer <ad...@starcat.io>
>>>
>>
>> --
>> Adam Feuer <ad...@starcat.io>
>>
>