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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/11/17 10:25:34 UTC
[GitHub] [incubator-nuttx] raiden00pl opened a new pull request, #7611: arch/stm32: fix ADC clock after ef517ed
raiden00pl opened a new pull request, #7611:
URL: https://github.com/apache/incubator-nuttx/pull/7611
## Summary
After ef517ed ADCv2 due to wrong ADC clock configuration hangs on:
```
0x0800c850 in adc_enable (priv=priv@entry=0x20000428 <g_adcpriv1>, enable=enable@entry=true) at chip/stm32_adc.c:2151
2151 while ((adc_getreg(priv, STM32_ADC_ISR_OFFSET) & ADC_INT_ARDY) == 0);
```
Previous code unintentionally set STM32_ADC_CCR register to 0xffffff00 which configure `Bits 17:16 CKMODE[1:0]: ADC clock mode` to 0b11 (which is `11: adc_hclk/4 (Synchronous clock mode)`):
```
Breakpoint 1, adc_common_cfg (priv=0x20000428 <g_adcpriv1>) at chip/stm32_adc.c:2535
2535 adccmn_modifyreg(priv, STM32_ADC_CCR_OFFSET, clrbits, setbits);
(cortex-gdb)p/x setbits
$2 = 0xffffff00
```
HCLK is always enabled so before ef517ed clock to ADC was provided and ADC seemed to work well but in a different mode than expected (`adc_hclk/4` instead of `Asynchronous clock mode`).
This PR configure the missing ADC asynchronous clock sources for STM32F3 and STM32G4
## Testing
b-g431b-esc1 and nucleo-f302r8
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[GitHub] [incubator-nuttx] xiaoxiang781216 merged pull request #7611: arch/stm32: fix ADC clock after ef517ed
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged PR #7611:
URL: https://github.com/apache/incubator-nuttx/pull/7611
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