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Posted to commits@mynewt.apache.org by an...@apache.org on 2022/02/25 14:51:59 UTC
[mynewt-core] branch master updated (7bc4894 -> 30670ac)
This is an automated email from the ASF dual-hosted git repository.
andk pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git.
from 7bc4894 hw/drivers/rtt: Update to rev 24346
new 290193a hw/mcu/nrf51: Add common startup code
new 9d7256d hw/mcu/nrf52: Add common startup code
new 30670ac hw/mcu/nrf91: Add common startup code
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/ada_feather_nrf52/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/arduino_primo_nrf52/syscfg.yml | 4 +-
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 ------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 ------------
hw/bsp/bbc_microbit/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 ------------
hw/bsp/ble400/syscfg.yml | 4 +
.../bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s | 283 ------------------
hw/bsp/bmd200/syscfg.yml | 4 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/bmd300eval/syscfg.yml | 4 +-
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 280 ------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 182 ------------
hw/bsp/calliope_mini/syscfg.yml | 4 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/dwm1001-dev/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 324 --------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/fanstel-ev-bt840/syscfg.yml | 3 +
.../nina-b1/src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/nina-b1/syscfg.yml | 4 +-
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 ------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 184 ------------
hw/bsp/nordic_pca10028-16k/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 ------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 ------------
hw/bsp/nordic_pca10028/syscfg.yml | 4 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/nordic_pca10040/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 326 ---------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/nordic_pca10056/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 326 ---------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/nordic_pca10059/syscfg.yml | 4 +-
hw/bsp/nordic_pca10090/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/nordic_pca20020/syscfg.yml | 4 +-
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 284 ------------------
hw/bsp/nrf51-arduino_101/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 ------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 ------------
hw/bsp/nrf51-blenano/syscfg.yml | 4 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
hw/bsp/pinetime/syscfg.yml | 3 +-
.../puckjs/src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/puckjs/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/rb-blend2/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/rb-nano2/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 324 --------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/reel_board/syscfg.yml | 3 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/ruuvitag_rev_b/syscfg.yml | 4 +-
.../telee02/src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/telee02/syscfg.yml | 4 +-
hw/bsp/ublox_bmd_345/syscfg.yml | 4 +-
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 ------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 182 ------------
hw/bsp/vbluno51/syscfg.yml | 4 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/vbluno52/syscfg.yml | 4 +-
hw/mcu/nordic/nrf51xxx/pkg.yml | 5 +
.../nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s} | 6 +
.../src/arch/cortex_m0/gcc_startup_cm0_split.s} | 6 +
hw/mcu/nordic/nrf51xxx/syscfg.yml | 38 ++-
hw/mcu/nordic/nrf52xxx/pkg.yml | 5 +
.../nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4.s} | 0
.../src/arch/cortex_m4/gcc_startup_cm4_split.s} | 0
hw/mcu/nordic/nrf52xxx/syscfg.yml | 6 +
.../src/arch/cortex_m33/gcc_startup_cm33.s} | 0
.../src/arch/cortex_m33/gcc_startup_cm33_split.s} | 0
hw/mcu/nordic/nrf91xx/syscfg.yml | 6 +
90 files changed, 155 insertions(+), 11922 deletions(-)
delete mode 100644 hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52840.s
delete mode 100644 hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52840.s
delete mode 100644 hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52840.s
delete mode 100644 hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/pinetime/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52840.s
delete mode 100644 hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52_split.s
delete mode 100644 hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s
delete mode 100644 hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s
delete mode 100644 hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52.s
delete mode 100644 hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
rename hw/{bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s => mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s} (98%)
rename hw/{bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s => mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s} (97%)
rename hw/{bsp/ublox_bmd_345/src/arch/cortex_m4/gcc_startup_nrf52840.s => mcu/nordic/nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4.s} (100%)
rename hw/{bsp/ublox_bmd_345/src/arch/cortex_m4/gcc_startup_nrf52_split.s => mcu/nordic/nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4_split.s} (100%)
rename hw/{bsp/nordic_pca10090/src/arch/cortex_m33/gcc_startup_nrf9160.s => mcu/nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33.s} (100%)
rename hw/{bsp/nordic_pca10090/src/arch/cortex_m33/gcc_startup_nrf9160_split.s => mcu/nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33_split.s} (100%)
[mynewt-core] 03/03: hw/mcu/nrf91: Add common startup code
Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 30670ac51690d9027017d046e568ad99eadf11ca
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Thu Feb 24 21:57:07 2022 +0100
hw/mcu/nrf91: Add common startup code
This adds common startup code to nRF91 package so it can be reused by
BSP. This avoids multiple duplicates of the same file in all BSPs.
Also proper configuration is added so standard and split startup code
is not included in build at the same time. This fixes issue when link
option -whole-archive is used.
---
hw/bsp/nordic_pca10090/syscfg.yml | 4 +++-
.../nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33.s} | 0
.../nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33_split.s} | 0
hw/mcu/nordic/nrf91xx/syscfg.yml | 6 ++++++
4 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/bsp/nordic_pca10090/syscfg.yml b/hw/bsp/nordic_pca10090/syscfg.yml
index 0fd2cd5..cea2c68 100644
--- a/hw/bsp/nordic_pca10090/syscfg.yml
+++ b/hw/bsp/nordic_pca10090/syscfg.yml
@@ -28,8 +28,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF9160 MCU
+ # Enable nRF9160 MCU and common startup code
MCU_TARGET: nRF9160
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
# UART_0_PIN_TX: 5
# UART_0_PIN_RX: 3
diff --git a/hw/bsp/nordic_pca10090/src/arch/cortex_m33/gcc_startup_nrf9160.s b/hw/mcu/nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33.s
similarity index 100%
rename from hw/bsp/nordic_pca10090/src/arch/cortex_m33/gcc_startup_nrf9160.s
rename to hw/mcu/nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33.s
diff --git a/hw/bsp/nordic_pca10090/src/arch/cortex_m33/gcc_startup_nrf9160_split.s b/hw/mcu/nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33_split.s
similarity index 100%
rename from hw/bsp/nordic_pca10090/src/arch/cortex_m33/gcc_startup_nrf9160_split.s
rename to hw/mcu/nordic/nrf91xx/src/arch/cortex_m33/gcc_startup_cm33_split.s
diff --git a/hw/mcu/nordic/nrf91xx/syscfg.yml b/hw/mcu/nordic/nrf91xx/syscfg.yml
index e910202..be85881 100644
--- a/hw/mcu/nordic/nrf91xx/syscfg.yml
+++ b/hw/mcu/nordic/nrf91xx/syscfg.yml
@@ -63,6 +63,12 @@ syscfg.defs:
the breakpoint wherever it gets called, For example, reset and crash
value: 0
+ MCU_COMMON_STARTUP:
+ description: >
+ Enables generic startup code. This allows BSP to not include own
+ startup code.
+ value: 0
+
# MCU peripherals definitions
I2C_0:
description: 'Enable nRF91xx I2C 0'
[mynewt-core] 01/03: hw/mcu/nrf51: Add common startup code
Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 290193add8faa17b7717c7840e203071b7804595
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Thu Feb 24 21:57:07 2022 +0100
hw/mcu/nrf51: Add common startup code
This adds common startup code to nRF51 package so it can be reused by
BSP. This avoids multiple duplicates of the same file in all BSPs.
Also proper configuration is added so standard and split startup code
is not included in build at the same time. This fixes issue when link
option -whole-archive is used.
---
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/bbc_microbit/syscfg.yml | 4 +
.../ble400/src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/ble400/syscfg.yml | 4 +
hw/bsp/bmd200/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 280 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 182 -------------
hw/bsp/calliope_mini/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 184 -------------
hw/bsp/nordic_pca10028-16k/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/nordic_pca10028/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 284 ---------------------
hw/bsp/nrf51-arduino_101/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 185 --------------
hw/bsp/nrf51-blenano/syscfg.yml | 4 +
.../src/arch/cortex_m0/gcc_startup_nrf51.s | 283 --------------------
.../src/arch/cortex_m0/gcc_startup_nrf51_split.s | 182 -------------
hw/bsp/vbluno51/syscfg.yml | 4 +
hw/mcu/nordic/nrf51xxx/pkg.yml | 5 +
.../nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s} | 6 +
.../src/arch/cortex_m0/gcc_startup_cm0_split.s} | 6 +
hw/mcu/nordic/nrf51xxx/syscfg.yml | 38 ++-
28 files changed, 79 insertions(+), 3562 deletions(-)
diff --git a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 7b53105..0000000
--- a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index 171f66f..0000000
--- a/hw/bsp/bbc_microbit/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/bbc_microbit/syscfg.yml b/hw/bsp/bbc_microbit/syscfg.yml
index c753515..d5f242a 100644
--- a/hw/bsp/bbc_microbit/syscfg.yml
+++ b/hw/bsp/bbc_microbit/syscfg.yml
@@ -105,6 +105,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 33463cd..0000000
--- a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index ddcf4a4..0000000
--- a/hw/bsp/ble400/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/ble400/syscfg.yml b/hw/bsp/ble400/syscfg.yml
index a398a86..30af892 100644
--- a/hw/bsp/ble400/syscfg.yml
+++ b/hw/bsp/ble400/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/bmd200/syscfg.yml b/hw/bsp/bmd200/syscfg.yml
index e331b8c..9b57361 100644
--- a/hw/bsp/bmd200/syscfg.yml
+++ b/hw/bsp/bmd200/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index e58e8bc..0000000
--- a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index c347187..0000000
--- a/hw/bsp/calliope_mini/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/calliope_mini/syscfg.yml b/hw/bsp/calliope_mini/syscfg.yml
index 00e6d8a..0dcdb68 100644
--- a/hw/bsp/calliope_mini/syscfg.yml
+++ b/hw/bsp/calliope_mini/syscfg.yml
@@ -93,6 +93,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_FCB_CONF
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_FCB_LOG
diff --git a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index a6c2611..0000000
--- a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 384
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index e7cebd0..0000000
--- a/hw/bsp/nordic_pca10028-16k/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 384
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/nordic_pca10028-16k/syscfg.yml b/hw/bsp/nordic_pca10028-16k/syscfg.yml
index 1da2668..cc00ded 100644
--- a/hw/bsp/nordic_pca10028-16k/syscfg.yml
+++ b/hw/bsp/nordic_pca10028-16k/syscfg.yml
@@ -113,6 +113,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822-16K MCU and common startup code
+ MCU_TARGET: nRF51822_16K
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 42dbc9c..0000000
--- a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index f9a6fd0..0000000
--- a/hw/bsp/nordic_pca10028/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/nordic_pca10028/syscfg.yml b/hw/bsp/nordic_pca10028/syscfg.yml
index 1da2668..d8f49d4 100644
--- a/hw/bsp/nordic_pca10028/syscfg.yml
+++ b/hw/bsp/nordic_pca10028/syscfg.yml
@@ -113,6 +113,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 1bcd1bc..0000000
--- a/hw/bsp/nrf51-arduino_101/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 384
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nrf51-arduino_101/syscfg.yml b/hw/bsp/nrf51-arduino_101/syscfg.yml
index f4ddda3..2c18a6f 100644
--- a/hw/bsp/nrf51-arduino_101/syscfg.yml
+++ b/hw/bsp/nrf51-arduino_101/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 7b53105..0000000
--- a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long _ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ _ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index 171f66f..0000000
--- a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/nrf51-blenano/syscfg.yml b/hw/bsp/nrf51-blenano/syscfg.yml
index c5b3e0d..ce68059 100644
--- a/hw/bsp/nrf51-blenano/syscfg.yml
+++ b/hw/bsp/nrf51-blenano/syscfg.yml
@@ -103,6 +103,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s
deleted file mode 100644
index 42dbc9c..0000000
--- a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long _NMI_Handler /* NMI Handler */
- .long _HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long _PendSV_Handler /* PendSV Handler */
- .long _SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long _POWER_CLOCK_IRQHandler
- .long _RADIO_IRQHandler
- .long _UART0_IRQHandler
- .long _SPI0_TWI0_IRQHandler
- .long _SPI1_TWI1_IRQHandler
- .long 0 /*Reserved */
- .long _GPIOTE_IRQHandler
- .long ADC_IRQHandler
- .long _TIMER0_IRQHandler
- .long _TIMER1_IRQHandler
- .long _TIMER2_IRQHandler
- .long _RTC0_IRQHandler
- .long _TEMP_IRQHandler
- .long _RNG_IRQHandler
- .long _ECB_IRQHandler
- .long _CCM_AAR_IRQHandler
- .long _WDT_IRQHandler
- .long _RTC1_IRQHandler
- .long _QDEC_IRQHandler
- .long _LPCOMP_IRQHandler
- .long _SWI0_IRQHandler
- .long _SWI1_IRQHandler
- .long _SWI2_IRQHandler
- .long _SWI3_IRQHandler
- .long _SWI4_IRQHandler
- .long _SWI5_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long 0 /*Reserved */
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-/* Default handler. This uses the vector in the relocated vector table */
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- LDR R2, =__vector_tbl_reloc__
- MRS R0, PSR
- MOVS R1, #0x3F
- ANDS R0, R1
- LSLS R0, R0, #2
- LDR R0, [R0, R2]
- BX R0
- .size Default_Handler, . - Default_Handler
-
-/*
- * All of the following IRQ Handlers will point to the default handler unless
- * they are defined elsewhere.
- */
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ _NMI_Handler
- IRQ _HardFault_Handler
- IRQ _SVC_Handler
- IRQ _PendSV_Handler
- IRQ _SysTick_Handler
- IRQ _POWER_CLOCK_IRQHandler
- IRQ _RADIO_IRQHandler
- IRQ _UART0_IRQHandler
- IRQ _SPI0_TWI0_IRQHandler
- IRQ _SPI1_TWI1_IRQHandler
- IRQ _GPIOTE_IRQHandler
- IRQ ADC_IRQHandler
- IRQ _TIMER0_IRQHandler
- IRQ _TIMER1_IRQHandler
- IRQ _TIMER2_IRQHandler
- IRQ _RTC0_IRQHandler
- IRQ _TEMP_IRQHandler
- IRQ _RNG_IRQHandler
- IRQ _ECB_IRQHandler
- IRQ _CCM_AAR_IRQHandler
- IRQ _WDT_IRQHandler
- IRQ _RTC1_IRQHandler
- IRQ _QDEC_IRQHandler
- IRQ _LPCOMP_IRQHandler
- IRQ _SWI0_IRQHandler
- IRQ _SWI1_IRQHandler
- IRQ _SWI2_IRQHandler
- IRQ _SWI3_IRQHandler
- IRQ _SWI4_IRQHandler
- IRQ _SWI5_IRQHandler
-
- .end
diff --git a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s
deleted file mode 100644
index ec41c56..0000000
--- a/hw/bsp/vbluno51/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv6-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .equ NRF_POWER_RAMON_ADDRESS, 0x40000524
- .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
- .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
-/* Clear CPU state before proceeding */
- SUBS r0, r0
- MSR CONTROL, r0
- MSR PRIMASK, r0
-
-/* Make sure ALL RAM banks are powered on */
- MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
-
- LDR R0, =NRF_POWER_RAMON_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- LDR R0, =NRF_POWER_RAMONB_ADDRESS
- LDR R2, [R0]
- ORRS R2, R1
- STR R2, [R0]
-
- /* Clear BSS */
- subs r0, r0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- bhs .data_copy_loop
- stmia r2!, {r0}
- b .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
-.data_copy_loop:
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
-
- .end
diff --git a/hw/bsp/vbluno51/syscfg.yml b/hw/bsp/vbluno51/syscfg.yml
index b8f2736..7645f63 100644
--- a/hw/bsp/vbluno51/syscfg.yml
+++ b/hw/bsp/vbluno51/syscfg.yml
@@ -101,6 +101,10 @@ syscfg.defs.BLE_CONTROLLER:
value: 1
syscfg.vals:
+ # Enable nRF51822 MCU and common startup code
+ MCU_TARGET: nRF51822
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/mcu/nordic/nrf51xxx/pkg.yml b/hw/mcu/nordic/nrf51xxx/pkg.yml
index cc2fac8..9c77756 100644
--- a/hw/mcu/nordic/nrf51xxx/pkg.yml
+++ b/hw/mcu/nordic/nrf51xxx/pkg.yml
@@ -30,5 +30,10 @@ pkg.deps:
- "@apache-mynewt-core/hw/cmsis-core"
- "@apache-mynewt-core/hw/hal"
+pkg.ign_files.'!MCU_COMMON_STARTUP || SPLIT_LOADER':
+ - gcc_startup_cm0.s
+pkg.ign_files.'!MCU_COMMON_STARTUP || !SPLIT_LOADER':
+ - gcc_startup_cm0_split.s
+
pkg.deps.BLE_CONTROLLER:
- "@apache-mynewt-nimble/nimble/drivers/nrf51"
diff --git a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s
similarity index 98%
rename from hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s
rename to hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s
index 33463cd..c8fd8f6 100644
--- a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51.s
+++ b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0.s
@@ -33,12 +33,18 @@ NOTE: Template files (including this one) are application specific and therefore
expected to be copied into the application project folder prior to its use!
*/
+#include <syscfg/syscfg.h>
+
.syntax unified
.arch armv6-m
.section .stack
.align 3
+#if MYNEWT_VAL_CHOICE(MCU_TARGET, nRF51822_16K)
+ .equ Stack_Size, 384
+#else
.equ Stack_Size, 432
+#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
diff --git a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s
similarity index 97%
rename from hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s
rename to hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s
index ddcf4a4..35e2e47 100644
--- a/hw/bsp/bmd200/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ b/hw/mcu/nordic/nrf51xxx/src/arch/cortex_m0/gcc_startup_cm0_split.s
@@ -33,12 +33,18 @@ NOTE: Template files (including this one) are application specific and therefore
expected to be copied into the application project folder prior to its use!
*/
+#include <syscfg/syscfg.h>
+
.syntax unified
.arch armv6-m
.section .stack
.align 3
+#if MYNEWT_VAL_CHOICE(MCU_TARGET, nRF51822_16K)
+ .equ Stack_Size, 384
+#else
.equ Stack_Size, 432
+#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
diff --git a/hw/mcu/nordic/nrf51xxx/syscfg.yml b/hw/mcu/nordic/nrf51xxx/syscfg.yml
index ebac618..4f277f9 100644
--- a/hw/mcu/nordic/nrf51xxx/syscfg.yml
+++ b/hw/mcu/nordic/nrf51xxx/syscfg.yml
@@ -17,18 +17,13 @@
#
syscfg.defs:
- I2C_0:
- description: 'I2C (TWI) interface 0'
- value: 0
- restrictions:
- - "!SPI_0_MASTER"
- - "!SPI_0_SLAVE"
- I2C_1:
- description: 'I2C (TWI) interface 1'
- value: 0
- restrictions:
- - "!SPI_1_MASTER"
- - "!SPI_1_SLAVE"
+ MCU_TARGET:
+ description: >
+ Specifies target MCU, shall be set by BSP.
+ value: nRF51822
+ choices:
+ - nRF51822
+ - nRF51822_16K
MCU_FLASH_MIN_WRITE_SIZE:
description: >
@@ -43,6 +38,25 @@ syscfg.defs:
expected to be overridden by the BSP.
value: 0
+ MCU_COMMON_STARTUP:
+ description: >
+ Enables generic startup code. This allows BSP to not include own
+ startup code.
+ value: 0
+
+ I2C_0:
+ description: 'I2C (TWI) interface 0'
+ value: 0
+ restrictions:
+ - "!SPI_0_MASTER"
+ - "!SPI_0_SLAVE"
+ I2C_1:
+ description: 'I2C (TWI) interface 1'
+ value: 0
+ restrictions:
+ - "!SPI_1_MASTER"
+ - "!SPI_1_SLAVE"
+
SPI_0_MASTER:
description: 'SPI 0 master'
value: 0
[mynewt-core] 02/03: hw/mcu/nrf52: Add common startup code
Posted by an...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 9d7256d0f53dada0790a8ded465729e6f896375d
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Thu Feb 24 21:57:07 2022 +0100
hw/mcu/nrf52: Add common startup code
This adds common startup code to nRF52 package so it can be reused by
BSP. This avoids multiple duplicates of the same file in all BSPs.
Also proper configuration is added so standard and split startup code
is not included in build at the same time. This fixes issue when link
option -whole-archive is used.
---
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/ada_feather_nrf52/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/arduino_primo_nrf52/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/bmd300eval/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/dwm1001-dev/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 324 --------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/fanstel-ev-bt840/syscfg.yml | 3 +
.../nina-b1/src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/nina-b1/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/nordic_pca10040/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 326 ---------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/nordic_pca10056/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 326 ---------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/nordic_pca10059/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/nordic_pca20020/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
hw/bsp/pinetime/syscfg.yml | 3 +-
.../puckjs/src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/puckjs/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/rb-blend2/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/rb-nano2/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52840.s | 324 --------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 167 -----------
hw/bsp/reel_board/syscfg.yml | 3 +
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/ruuvitag_rev_b/syscfg.yml | 4 +-
.../telee02/src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/telee02/syscfg.yml | 4 +-
hw/bsp/ublox_bmd_345/syscfg.yml | 4 +-
.../src/arch/cortex_m4/gcc_startup_nrf52.s | 301 -------------------
.../src/arch/cortex_m4/gcc_startup_nrf52_split.s | 166 -----------
hw/bsp/vbluno52/syscfg.yml | 4 +-
hw/mcu/nordic/nrf52xxx/pkg.yml | 5 +
.../nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4.s} | 0
.../src/arch/cortex_m4/gcc_startup_cm4_split.s} | 0
hw/mcu/nordic/nrf52xxx/syscfg.yml | 6 +
58 files changed, 67 insertions(+), 8359 deletions(-)
diff --git a/hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/ada_feather_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/ada_feather_nrf52/syscfg.yml b/hw/bsp/ada_feather_nrf52/syscfg.yml
index 0ab0105..dbdb2b1 100644
--- a/hw/bsp/ada_feather_nrf52/syscfg.yml
+++ b/hw/bsp/ada_feather_nrf52/syscfg.yml
@@ -30,8 +30,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 73c5053..0000000
--- a/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/arduino_primo_nrf52/syscfg.yml b/hw/bsp/arduino_primo_nrf52/syscfg.yml
index be68695..5841a9d 100644
--- a/hw/bsp/arduino_primo_nrf52/syscfg.yml
+++ b/hw/bsp/arduino_primo_nrf52/syscfg.yml
@@ -35,8 +35,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 12
UART_0_PIN_RX: 11
diff --git a/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 73c5053..0000000
--- a/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/bmd300eval/syscfg.yml b/hw/bsp/bmd300eval/syscfg.yml
index 677165a..4276e2e 100644
--- a/hw/bsp/bmd300eval/syscfg.yml
+++ b/hw/bsp/bmd300eval/syscfg.yml
@@ -27,8 +27,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/dwm1001-dev/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/dwm1001-dev/syscfg.yml b/hw/bsp/dwm1001-dev/syscfg.yml
index f5a8736..76c72e8 100644
--- a/hw/bsp/dwm1001-dev/syscfg.yml
+++ b/hw/bsp/dwm1001-dev/syscfg.yml
@@ -30,8 +30,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 5
UART_0_PIN_RX: 11
diff --git a/hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52840.s b/hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52840.s
deleted file mode 100644
index 8f44373..0000000
--- a/hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52840.s
+++ /dev/null
@@ -1,324 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long MemoryManagement_Handler
- .long BusFault_Handler
- .long UsageFault_Handler
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long DebugMon_Handler
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
- .long FPU_IRQHandler
- .long USBD_IRQHandler
- .long UARTE1_IRQHandler
- .long QSPI_IRQHandler
- .long CRYPTOCELL_IRQHandler
- .long SPIM3_IRQHandler
- .long 0 /*Reserved */
- .long PWM3_IRQHandler
-
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak DebugMon_Handler
- .type DebugMon_Handler, %function
-DebugMon_Handler:
- b .
- .size DebugMon_Handler, . - DebugMon_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
- IRQ FPU_IRQHandler
- IRQ USBD_IRQHandler
- IRQ UARTE1_IRQHandler
- IRQ QSPI_IRQHandler
- IRQ CRYPTOCELL_IRQHandler
- IRQ SPIM3_IRQHandler
- IRQ PWM3_IRQHandler
-
- .end
diff --git a/hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 5a0532c..0000000
--- a/hw/bsp/fanstel-ev-bt840/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/fanstel-ev-bt840/syscfg.yml b/hw/bsp/fanstel-ev-bt840/syscfg.yml
index cb6bf1f..03b1ff4 100644
--- a/hw/bsp/fanstel-ev-bt840/syscfg.yml
+++ b/hw/bsp/fanstel-ev-bt840/syscfg.yml
@@ -22,7 +22,10 @@ syscfg.defs:
value: 1
syscfg.vals:
+ # Enable nRF52840 MCU and common startup code
MCU_TARGET: nRF52840
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/nina-b1/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/nina-b1/syscfg.yml b/hw/bsp/nina-b1/syscfg.yml
index fed1bc3..5dcef9d 100644
--- a/hw/bsp/nina-b1/syscfg.yml
+++ b/hw/bsp/nina-b1/syscfg.yml
@@ -30,8 +30,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 5
diff --git a/hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/nordic_pca10040/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/nordic_pca10040/syscfg.yml b/hw/bsp/nordic_pca10040/syscfg.yml
index ef74266..61ba10f 100644
--- a/hw/bsp/nordic_pca10040/syscfg.yml
+++ b/hw/bsp/nordic_pca10040/syscfg.yml
@@ -34,8 +34,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52840.s b/hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52840.s
deleted file mode 100644
index 774205f..0000000
--- a/hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52840.s
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long MemoryManagement_Handler
- .long BusFault_Handler
- .long UsageFault_Handler
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long DebugMon_Handler
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
- .long FPU_IRQHandler
- .long USBD_IRQHandler
- .long UARTE1_IRQHandler
- .long QSPI_IRQHandler
- .long CRYPTOCELL_IRQHandler
- .long 0 /*Reserved */
- .long PWM3_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long SPIM3_IRQHandler
-
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak DebugMon_Handler
- .type DebugMon_Handler, %function
-DebugMon_Handler:
- b .
- .size DebugMon_Handler, . - DebugMon_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
- IRQ FPU_IRQHandler
- IRQ USBD_IRQHandler
- IRQ UARTE1_IRQHandler
- IRQ QSPI_IRQHandler
- IRQ CRYPTOCELL_IRQHandler
- IRQ SPIM3_IRQHandler
- IRQ PWM3_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 5a0532c..0000000
--- a/hw/bsp/nordic_pca10056/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/nordic_pca10056/syscfg.yml b/hw/bsp/nordic_pca10056/syscfg.yml
index ea150be..501f42e 100644
--- a/hw/bsp/nordic_pca10056/syscfg.yml
+++ b/hw/bsp/nordic_pca10056/syscfg.yml
@@ -25,8 +25,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52840 MCU
+ # Enable nRF52840 MCU and common startup code
MCU_TARGET: nRF52840
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52840.s b/hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52840.s
deleted file mode 100644
index 774205f..0000000
--- a/hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52840.s
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long MemoryManagement_Handler
- .long BusFault_Handler
- .long UsageFault_Handler
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long DebugMon_Handler
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
- .long FPU_IRQHandler
- .long USBD_IRQHandler
- .long UARTE1_IRQHandler
- .long QSPI_IRQHandler
- .long CRYPTOCELL_IRQHandler
- .long 0 /*Reserved */
- .long PWM3_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long SPIM3_IRQHandler
-
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak DebugMon_Handler
- .type DebugMon_Handler, %function
-DebugMon_Handler:
- b .
- .size DebugMon_Handler, . - DebugMon_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
- IRQ FPU_IRQHandler
- IRQ USBD_IRQHandler
- IRQ UARTE1_IRQHandler
- IRQ QSPI_IRQHandler
- IRQ CRYPTOCELL_IRQHandler
- IRQ SPIM3_IRQHandler
- IRQ PWM3_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 5a0532c..0000000
--- a/hw/bsp/nordic_pca10059/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/nordic_pca10059/syscfg.yml b/hw/bsp/nordic_pca10059/syscfg.yml
index c3d1fd9..f8826b0 100644
--- a/hw/bsp/nordic_pca10059/syscfg.yml
+++ b/hw/bsp/nordic_pca10059/syscfg.yml
@@ -25,8 +25,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52840 MCU
+ # Enable nRF52840 MCU and common startup code
MCU_TARGET: nRF52840
+ MCU_COMMON_STARTUP: 1
+
UART_0: 0
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/nordic_pca20020/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/nordic_pca20020/syscfg.yml b/hw/bsp/nordic_pca20020/syscfg.yml
index 2b8d928..027f1bf 100644
--- a/hw/bsp/nordic_pca20020/syscfg.yml
+++ b/hw/bsp/nordic_pca20020/syscfg.yml
@@ -39,8 +39,10 @@ syscfg.defs:
value: 400
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# There are no pins assigned for UART so disable it
UART_0: 0
# Set default pins for peripherals
diff --git a/hw/bsp/pinetime/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/pinetime/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/pinetime/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/pinetime/syscfg.yml b/hw/bsp/pinetime/syscfg.yml
index 7f22f3c..b6819f3 100644
--- a/hw/bsp/pinetime/syscfg.yml
+++ b/hw/bsp/pinetime/syscfg.yml
@@ -43,8 +43,9 @@ syscfg.vals.BOOT_LOADER:
# Settings this BSP overrides.
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
# 32.768 kHz crystal oscillator
MCU_LFCLK_SOURCE: LFXO
diff --git a/hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/puckjs/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/puckjs/syscfg.yml b/hw/bsp/puckjs/syscfg.yml
index c48c1e7..09de810 100644
--- a/hw/bsp/puckjs/syscfg.yml
+++ b/hw/bsp/puckjs/syscfg.yml
@@ -30,8 +30,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 29
UART_0_PIN_RX: 28
diff --git a/hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 73c5053..0000000
--- a/hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index c955590..0000000
--- a/hw/bsp/rb-blend2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/rb-blend2/syscfg.yml b/hw/bsp/rb-blend2/syscfg.yml
index 414bd04..f5f6301 100644
--- a/hw/bsp/rb-blend2/syscfg.yml
+++ b/hw/bsp/rb-blend2/syscfg.yml
@@ -31,8 +31,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 73c5053..0000000
--- a/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index c955590..0000000
--- a/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/rb-nano2/syscfg.yml b/hw/bsp/rb-nano2/syscfg.yml
index b20be53..bf5b042 100644
--- a/hw/bsp/rb-nano2/syscfg.yml
+++ b/hw/bsp/rb-nano2/syscfg.yml
@@ -31,8 +31,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 29
UART_0_PIN_RX: 30
diff --git a/hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52840.s b/hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52840.s
deleted file mode 100644
index 8f44373..0000000
--- a/hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52840.s
+++ /dev/null
@@ -1,324 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long MemoryManagement_Handler
- .long BusFault_Handler
- .long UsageFault_Handler
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long DebugMon_Handler
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
- .long FPU_IRQHandler
- .long USBD_IRQHandler
- .long UARTE1_IRQHandler
- .long QSPI_IRQHandler
- .long CRYPTOCELL_IRQHandler
- .long SPIM3_IRQHandler
- .long 0 /*Reserved */
- .long PWM3_IRQHandler
-
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak DebugMon_Handler
- .type DebugMon_Handler, %function
-DebugMon_Handler:
- b .
- .size DebugMon_Handler, . - DebugMon_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
- IRQ FPU_IRQHandler
- IRQ USBD_IRQHandler
- IRQ UARTE1_IRQHandler
- IRQ QSPI_IRQHandler
- IRQ CRYPTOCELL_IRQHandler
- IRQ SPIM3_IRQHandler
- IRQ PWM3_IRQHandler
-
- .end
diff --git a/hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 5a0532c..0000000
--- a/hw/bsp/reel_board/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7e-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/reel_board/syscfg.yml b/hw/bsp/reel_board/syscfg.yml
index fb39c88..d29df23 100644
--- a/hw/bsp/reel_board/syscfg.yml
+++ b/hw/bsp/reel_board/syscfg.yml
@@ -25,7 +25,10 @@ syscfg.defs:
value: 0
syscfg.vals:
+ # Enable nRF52840 MCU and common startup code
MCU_TARGET: nRF52840
+ MCU_COMMON_STARTUP: 1
+
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
NFFS_FLASH_AREA: FLASH_AREA_NFFS
diff --git a/hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/ruuvitag_rev_b/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/ruuvitag_rev_b/syscfg.yml b/hw/bsp/ruuvitag_rev_b/syscfg.yml
index 6f08839..aeb2642 100644
--- a/hw/bsp/ruuvitag_rev_b/syscfg.yml
+++ b/hw/bsp/ruuvitag_rev_b/syscfg.yml
@@ -56,8 +56,10 @@ syscfg.defs:
value: 400
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
# Latest revisions have testpoints instead of dedicated UART pins,
# we can use them instead
diff --git a/hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/telee02/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/telee02/syscfg.yml b/hw/bsp/telee02/syscfg.yml
index 4043f08..2020e03 100644
--- a/hw/bsp/telee02/syscfg.yml
+++ b/hw/bsp/telee02/syscfg.yml
@@ -30,8 +30,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/ublox_bmd_345/syscfg.yml b/hw/bsp/ublox_bmd_345/syscfg.yml
index 7e3cef1..97c3d52 100644
--- a/hw/bsp/ublox_bmd_345/syscfg.yml
+++ b/hw/bsp/ublox_bmd_345/syscfg.yml
@@ -29,8 +29,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52840 MCU
+ # Enable nRF52840 MCU and common startup code
MCU_TARGET: nRF52840
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52.s b/hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52.s
deleted file mode 100644
index 8ce6ee5..0000000
--- a/hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52.s
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
-
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector
- .align 2
- .globl __isr_vector
-__isr_vector:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
- .long NMI_Handler /* NMI Handler */
- .long HardFault_Handler /* Hard Fault Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long SVC_Handler /* SVCall Handler */
- .long 0 /* Reserved */
- .long 0 /* Reserved */
- .long PendSV_Handler /* PendSV Handler */
- .long SysTick_Handler /* SysTick Handler */
-
- /* External Interrupts */
- .long POWER_CLOCK_IRQHandler
- .long RADIO_IRQHandler
- .long UARTE0_UART0_IRQHandler
- .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- .long NFCT_IRQHandler
- .long GPIOTE_IRQHandler
- .long SAADC_IRQHandler
- .long TIMER0_IRQHandler
- .long TIMER1_IRQHandler
- .long TIMER2_IRQHandler
- .long RTC0_IRQHandler
- .long TEMP_IRQHandler
- .long RNG_IRQHandler
- .long ECB_IRQHandler
- .long CCM_AAR_IRQHandler
- .long WDT_IRQHandler
- .long RTC1_IRQHandler
- .long QDEC_IRQHandler
- .long COMP_LPCOMP_IRQHandler
- .long SWI0_EGU0_IRQHandler
- .long SWI1_EGU1_IRQHandler
- .long SWI2_EGU2_IRQHandler
- .long SWI3_EGU3_IRQHandler
- .long SWI4_EGU4_IRQHandler
- .long SWI5_EGU5_IRQHandler
- .long TIMER3_IRQHandler
- .long TIMER4_IRQHandler
- .long PWM0_IRQHandler
- .long PDM_IRQHandler
- .long 0 /*Reserved */
- .long 0 /*Reserved */
- .long MWU_IRQHandler
- .long PWM1_IRQHandler
- .long PWM2_IRQHandler
- .long SPIM2_SPIS2_SPI2_IRQHandler
- .long RTC2_IRQHandler
- .long I2S_IRQHandler
-
- .size __isr_vector, . - __isr_vector
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- .fnstart
-
- /* Clear BSS */
- mov r0, #0
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler,.-Reset_Handler
-
- .section ".text"
-
-
-/* Dummy Exception Handlers (infinite loops which can be modified) */
-
- .weak NMI_Handler
- .type NMI_Handler, %function
-NMI_Handler:
- B .
- .size NMI_Handler, . - NMI_Handler
-
-
- .weak HardFault_Handler
- .type HardFault_Handler, %function
-HardFault_Handler:
- B .
- .size HardFault_Handler, . - HardFault_Handler
-
-
- .weak MemoryManagement_Handler
- .type MemoryManagement_Handler, %function
-MemoryManagement_Handler:
- B .
- .size MemoryManagement_Handler, . - MemoryManagement_Handler
-
-
- .weak BusFault_Handler
- .type BusFault_Handler, %function
-BusFault_Handler:
- B .
- .size BusFault_Handler, . - BusFault_Handler
-
-
- .weak UsageFault_Handler
- .type UsageFault_Handler, %function
-UsageFault_Handler:
- B .
- .size UsageFault_Handler, . - UsageFault_Handler
-
-
- .weak SVC_Handler
- .type SVC_Handler, %function
-SVC_Handler:
- B .
- .size SVC_Handler, . - SVC_Handler
-
-
- .weak PendSV_Handler
- .type PendSV_Handler, %function
-PendSV_Handler:
- B .
- .size PendSV_Handler, . - PendSV_Handler
-
-
- .weak SysTick_Handler
- .type SysTick_Handler, %function
-SysTick_Handler:
- B .
- .size SysTick_Handler, . - SysTick_Handler
-
-
-/* IRQ Handlers */
-
- .globl Default_Handler
- .type Default_Handler, %function
-Default_Handler:
- B .
- .size Default_Handler, . - Default_Handler
-
- .macro IRQ handler
- .weak \handler
- .set \handler, Default_Handler
- .endm
-
- IRQ POWER_CLOCK_IRQHandler
- IRQ RADIO_IRQHandler
- IRQ UARTE0_UART0_IRQHandler
- IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
- IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
- IRQ NFCT_IRQHandler
- IRQ GPIOTE_IRQHandler
- IRQ SAADC_IRQHandler
- IRQ TIMER0_IRQHandler
- IRQ TIMER1_IRQHandler
- IRQ TIMER2_IRQHandler
- IRQ RTC0_IRQHandler
- IRQ TEMP_IRQHandler
- IRQ RNG_IRQHandler
- IRQ ECB_IRQHandler
- IRQ CCM_AAR_IRQHandler
- IRQ WDT_IRQHandler
- IRQ RTC1_IRQHandler
- IRQ QDEC_IRQHandler
- IRQ COMP_LPCOMP_IRQHandler
- IRQ SWI0_EGU0_IRQHandler
- IRQ SWI1_EGU1_IRQHandler
- IRQ SWI2_EGU2_IRQHandler
- IRQ SWI3_EGU3_IRQHandler
- IRQ SWI4_EGU4_IRQHandler
- IRQ SWI5_EGU5_IRQHandler
- IRQ TIMER3_IRQHandler
- IRQ TIMER4_IRQHandler
- IRQ PWM0_IRQHandler
- IRQ PDM_IRQHandler
- IRQ MWU_IRQHandler
- IRQ PWM1_IRQHandler
- IRQ PWM2_IRQHandler
- IRQ SPIM2_SPIS2_SPI2_IRQHandler
- IRQ RTC2_IRQHandler
- IRQ I2S_IRQHandler
-
- .end
diff --git a/hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
deleted file mode 100644
index 044aa17..0000000
--- a/hw/bsp/vbluno52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-Copyright (c) 2015, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-* Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-NOTE: Template files (including this one) are application specific and therefore
-expected to be copied into the application project folder prior to its use!
-*/
-
- .syntax unified
- .arch armv7-m
- .section .stack
- .align 3
- .equ Stack_Size, 432
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
-
- .section .heap
- .align 3
-#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
-#else
- .equ Heap_Size, 0
-#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
-
- .section .isr_vector_split
- .align 2
- .globl __isr_vector_split
-__isr_vector_split:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler_split /* Reset Handler */
-
- .size __isr_vector_split, . - __isr_vector_split
-
-/* Reset Handler */
-
- .text
- .thumb
- .thumb_func
- .align 1
- .globl Reset_Handler_split
- .type Reset_Handler_split, %function
-Reset_Handler_split:
- .fnstart
-
- /* Clear CPU state before proceeding */
- mov r0, #0
- msr control, r0
- msr primask, r0
- /* Clear BSS */
- ldr r2, =__bss_start__
- ldr r3, =__bss_end__
-.bss_zero_loop:
- cmp r2, r3
- itt lt
- strlt r0, [r2], #4
- blt .bss_zero_loop
-
-
-/* Loop to copy data from read only memory to RAM. The ranges
- * of copy from/to are specified by following symbols evaluated in
- * linker script.
- * __etext: End of code section, i.e., begin of data sections to copy from.
- * __data_start__/__data_end__: RAM address range that data should be
- * copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC0
-
-.LC1:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC1
-
-.LC0:
- ldr r1, =__etext_loader
- ldr r2, =__data_start___loader
- ldr r3, =__data_end___loader
-
- subs r3, r2
- ble .LC2
-
-.LC3:
- subs r3, 4
- ldr r0, [r1,r3]
- str r0, [r2,r3]
- bgt .LC3
-.LC2:
-
- subs r0, r0
- ldr r2, =__bss_start___loader
- ldr r3, =__bss_end___loader
-
- subs r3, r2
- ble .LC4
-
-.LC5:
- subs r3, 4
- str r0, [r2,r3]
- bgt .LC5
-.LC4:
-
- LDR R0, =__HeapBase
- LDR R1, =__HeapLimit
- BL _sbrkInit
-
- LDR R0, =SystemInit
- BLX R0
-
- BL hal_system_init
-
- LDR R0, =_start_split
- BX R0
-
- .pool
- .cantunwind
- .fnend
- .size Reset_Handler_split,.-Reset_Handler_split
-
- .section ".text"
- .end
diff --git a/hw/bsp/vbluno52/syscfg.yml b/hw/bsp/vbluno52/syscfg.yml
index 212782a..9799f40 100644
--- a/hw/bsp/vbluno52/syscfg.yml
+++ b/hw/bsp/vbluno52/syscfg.yml
@@ -30,8 +30,10 @@ syscfg.defs:
value: 0
syscfg.vals:
- # Enable nRF52832 MCU
+ # Enable nRF52832 MCU and common startup code
MCU_TARGET: nRF52832
+ MCU_COMMON_STARTUP: 1
+
# Set default pins for peripherals
UART_0_PIN_TX: 6
UART_0_PIN_RX: 8
diff --git a/hw/mcu/nordic/nrf52xxx/pkg.yml b/hw/mcu/nordic/nrf52xxx/pkg.yml
index cb50d55..1d0fa1f 100644
--- a/hw/mcu/nordic/nrf52xxx/pkg.yml
+++ b/hw/mcu/nordic/nrf52xxx/pkg.yml
@@ -30,6 +30,11 @@ pkg.deps:
- "@apache-mynewt-core/hw/cmsis-core"
- "@apache-mynewt-core/hw/hal"
+pkg.ign_files.'!MCU_COMMON_STARTUP || SPLIT_LOADER':
+ - gcc_startup_cm4.s
+pkg.ign_files.'!MCU_COMMON_STARTUP || !SPLIT_LOADER':
+ - gcc_startup_cm4_split.s
+
pkg.deps.BUS_DRIVER_PRESENT:
- "@apache-mynewt-core/hw/bus/drivers/spi_hal"
pkg.deps.'BUS_DRIVER_PRESENT && MCU_BUS_DRIVER_I2C_USE_TWIM':
diff --git a/hw/bsp/ublox_bmd_345/src/arch/cortex_m4/gcc_startup_nrf52840.s b/hw/mcu/nordic/nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4.s
similarity index 100%
rename from hw/bsp/ublox_bmd_345/src/arch/cortex_m4/gcc_startup_nrf52840.s
rename to hw/mcu/nordic/nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4.s
diff --git a/hw/bsp/ublox_bmd_345/src/arch/cortex_m4/gcc_startup_nrf52_split.s b/hw/mcu/nordic/nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4_split.s
similarity index 100%
rename from hw/bsp/ublox_bmd_345/src/arch/cortex_m4/gcc_startup_nrf52_split.s
rename to hw/mcu/nordic/nrf52xxx/src/arch/cortex_m4/gcc_startup_cm4_split.s
diff --git a/hw/mcu/nordic/nrf52xxx/syscfg.yml b/hw/mcu/nordic/nrf52xxx/syscfg.yml
index 8452301..497865d 100644
--- a/hw/mcu/nordic/nrf52xxx/syscfg.yml
+++ b/hw/mcu/nordic/nrf52xxx/syscfg.yml
@@ -97,6 +97,12 @@ syscfg.defs:
Enabled Instruction code cache
value: 0
+ MCU_COMMON_STARTUP:
+ description: >
+ Enables generic startup code. This allows BSP to not include own
+ startup code.
+ value: 0
+
# MCU peripherals definitions
I2C_0:
description: 'Enable nRF52xxx I2C (TWI) 0'