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Posted to commits@nuttx.apache.org by ac...@apache.org on 2020/10/02 14:46:37 UTC
[incubator-nuttx] branch master updated (80ce780 -> 62732dd)
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 80ce780 Sources and Docs: Fix typos and nxstyle issues
new 844f39f arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA bits so that the call to up_cpu_index is only performed when SMP is enabled.
new 62732dd arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of ESP32_NGPIOS
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/xtensa/include/esp32/chip.h | 2 ++
arch/xtensa/src/esp32/esp32_gpio.c | 20 ++++++++++++--------
2 files changed, 14 insertions(+), 8 deletions(-)
[incubator-nuttx] 01/02: arch/xtensa/src/esp32/esp32_gpio.c: Change
the logic of setting the ENA bits so that the call to up_cpu_index is only
performed when SMP is enabled.
Posted by ac...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 844f39fc67bf045cb6cc84eea34dc3167963aa15
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 2 12:54:02 2020 +0100
arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA
bits so that the call to up_cpu_index is only performed when SMP is
enabled.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/xtensa/src/esp32/esp32_gpio.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c
index cb994cc..25bf4fa 100644
--- a/arch/xtensa/src/esp32/esp32_gpio.c
+++ b/arch/xtensa/src/esp32/esp32_gpio.c
@@ -354,7 +354,9 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype)
{
uintptr_t regaddr;
uint32_t regval;
+#ifdef CONFIG_SMP
int cpu;
+#endif
int pin;
DEBUGASSERT(irq <= ESP32_FIRST_GPIOIRQ && irq <= ESP32_LAST_GPIOIRQ);
@@ -380,18 +382,20 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype)
* Bit 5: SDIO's extent interrupt enable.
*/
+#ifdef CONFIG_SMP
cpu = up_cpu_index();
- if (cpu == 0)
+ if (cpu != 0)
{
- /* PRO_CPU */
+ /* APP_CPU */
- regval |= ((1 << 2) << GPIO_PIN_INT_ENA_S);
+ regval |= ((1 << 0) << GPIO_PIN_INT_ENA_S);
}
else
+#endif
{
- /* APP_CPU */
+ /* PRO_CPU */
- regval |= ((1 << 0) << GPIO_PIN_INT_ENA_S);
+ regval |= ((1 << 2) << GPIO_PIN_INT_ENA_S);
}
regval |= (intrtype << GPIO_PIN_INT_TYPE_S);
[incubator-nuttx] 02/02: arch/xtensa/src/esp32/esp32_gpio.c:
ESP32_NIRQ_GPIO was used instead of ESP32_NGPIOS
Posted by ac...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 62732dd6b8309d356f34643a02beb9b7dd93161b
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Fri Oct 2 13:02:11 2020 +0100
arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of
ESP32_NGPIOS
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
arch/xtensa/include/esp32/chip.h | 2 ++
arch/xtensa/src/esp32/esp32_gpio.c | 6 +++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/xtensa/include/esp32/chip.h b/arch/xtensa/include/esp32/chip.h
index e3cbc19..08cd344 100644
--- a/arch/xtensa/include/esp32/chip.h
+++ b/arch/xtensa/include/esp32/chip.h
@@ -51,6 +51,8 @@
#define ESP32_NSPI 4 /* SPI0-3 */
#define ESP32_NUARTS 3 /* UART0-2 */
+#define ESP32_NGPIOS 40 /* GPIO0-39 */
+
/****************************************************************************
* Public Types
****************************************************************************/
diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c
index 25bf4fa..cbb90f5 100644
--- a/arch/xtensa/src/esp32/esp32_gpio.c
+++ b/arch/xtensa/src/esp32/esp32_gpio.c
@@ -163,7 +163,7 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
uint32_t cntrl;
unsigned int pinmode;
- DEBUGASSERT(pin >= 0 && pin <= ESP32_NIRQ_GPIO);
+ DEBUGASSERT(pin >= 0 && pin <= ESP32_NGPIOS);
/* Handle input pins */
@@ -250,7 +250,7 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
void esp32_gpiowrite(int pin, bool value)
{
- DEBUGASSERT(pin >= 0 && pin <= ESP32_NIRQ_GPIO);
+ DEBUGASSERT(pin >= 0 && pin <= ESP32_NGPIOS);
if (value)
{
@@ -288,7 +288,7 @@ bool esp32_gpioread(int pin)
{
uint32_t regval;
- DEBUGASSERT(pin >= 0 && pin <= ESP32_NIRQ_GPIO);
+ DEBUGASSERT(pin >= 0 && pin <= ESP32_NGPIOS);
if (pin < 32)
{