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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/04/18 14:22:24 UTC
[incubator-nuttx] 03/03: board/arch_fpu*: move arch_[get|cmp]fpu to common arch

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 29005bd79fcb05d25b92bed39693c5245a9cf505
Author: chao.an <an...@xiaomi.com>
AuthorDate: Fri Apr 15 22:35:54 2022 +0800

    board/arch_fpu*: move arch_[get|cmp]fpu to common arch
    
    rename the arch api:
    arch_getfpu  -> up_saveusercontext
    arch_cmpfpu  -> up_cmpfpu
    
    Signed-off-by: chao.an <an...@xiaomi.com>
---
 arch/arm/include/armv7-m/irq_cmnvector.h |  2 ++
 arch/arm/include/armv7-m/irq_lazyfpu.h   |  2 ++
 arch/arm/include/armv8-m/irq_cmnvector.h |  2 ++
 arch/arm/include/armv8-m/irq_lazyfpu.h   |  2 ++
 arch/arm/src/a1x/Make.defs               |  1 +
 arch/arm/src/am335x/Make.defs            |  1 +
 arch/arm/src/common/arm_fpucmp.c         | 59 ++++++++++++++++++++++++++++++++
 arch/arm/src/cxd56xx/Make.defs           |  1 +
 arch/arm/src/efm32/Make.defs             |  1 +
 arch/arm/src/eoss3/Make.defs             |  1 +
 arch/arm/src/imx6/Make.defs              |  1 +
 arch/arm/src/imxrt/Make.defs             |  1 +
 arch/arm/src/kinetis/Make.defs           |  1 +
 arch/arm/src/lpc17xx_40xx/Make.defs      |  1 +
 arch/arm/src/lpc43xx/Make.defs           |  1 +
 arch/arm/src/lpc54xx/Make.defs           |  1 +
 arch/arm/src/max326xx/Make.defs          |  1 +
 arch/arm/src/nrf52/Make.defs             |  1 +
 arch/arm/src/s32k1xx/Make.defs           |  1 +
 arch/arm/src/sam34/Make.defs             |  1 +
 arch/arm/src/sama5/Make.defs             |  1 +
 arch/arm/src/samd5e5/Make.defs           |  1 +
 arch/arm/src/samv7/Make.defs             |  1 +
 arch/arm/src/stm32/Make.defs             |  1 +
 arch/arm/src/stm32f7/Make.defs           |  1 +
 arch/arm/src/stm32h7/Make.defs           |  1 +
 arch/arm/src/stm32l4/Make.defs           |  1 +
 arch/arm/src/stm32l5/Make.defs           |  1 +
 arch/arm/src/stm32u5/Make.defs           |  1 +
 arch/arm/src/tiva/Make.defs              |  1 +
 arch/arm/src/tms570/Make.defs            |  1 +
 arch/arm/src/xmc4/Make.defs              |  1 +
 arch/risc-v/src/bl602/Make.defs          |  1 +
 arch/risc-v/src/c906/Make.defs           |  1 +
 arch/risc-v/src/common/riscv_fpucmp.c    | 59 ++++++++++++++++++++++++++++++++
 arch/risc-v/src/mpfs/Make.defs           |  1 +
 arch/risc-v/src/qemu-rv/Make.defs        |  1 +
 include/nuttx/arch.h                     | 14 ++++++++
 38 files changed, 171 insertions(+)

diff --git a/arch/arm/include/armv7-m/irq_cmnvector.h b/arch/arm/include/armv7-m/irq_cmnvector.h
index 93b3835739..4c923e3d83 100644
--- a/arch/arm/include/armv7-m/irq_cmnvector.h
+++ b/arch/arm/include/armv7-m/irq_cmnvector.h
@@ -133,6 +133,8 @@
 #define XCPTCONTEXT_REGS    (HW_XCPT_REGS + SW_XCPT_REGS)
 #define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
 
+#define FPU_CONTEXT_REGS    SW_FPU_REGS
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/include/armv7-m/irq_lazyfpu.h b/arch/arm/include/armv7-m/irq_lazyfpu.h
index d632d4c8a2..0b2b2611e0 100644
--- a/arch/arm/include/armv7-m/irq_lazyfpu.h
+++ b/arch/arm/include/armv7-m/irq_lazyfpu.h
@@ -151,6 +151,8 @@
 #define XCPTCONTEXT_REGS    (HW_XCPT_REGS + SW_XCPT_REGS)
 #define XCPTCONTEXT_SIZE    (HW_XCPT_SIZE + SW_XCPT_SIZE)
 
+#define FPU_CONTEXT_REGS    SW_FPU_REGS
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/include/armv8-m/irq_cmnvector.h b/arch/arm/include/armv8-m/irq_cmnvector.h
index 9956374d43..c64467689f 100644
--- a/arch/arm/include/armv8-m/irq_cmnvector.h
+++ b/arch/arm/include/armv8-m/irq_cmnvector.h
@@ -139,6 +139,8 @@
 #define XCPTCONTEXT_REGS    (HW_XCPT_REGS + SW_XCPT_REGS)
 #define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
 
+#define FPU_CONTEXT_REGS    SW_FPU_REGS
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/include/armv8-m/irq_lazyfpu.h b/arch/arm/include/armv8-m/irq_lazyfpu.h
index 1f3f0c7774..5c159d6a45 100644
--- a/arch/arm/include/armv8-m/irq_lazyfpu.h
+++ b/arch/arm/include/armv8-m/irq_lazyfpu.h
@@ -157,6 +157,8 @@
 #define XCPTCONTEXT_REGS    (HW_XCPT_REGS + SW_XCPT_REGS)
 #define XCPTCONTEXT_SIZE    (HW_XCPT_SIZE + SW_XCPT_SIZE)
 
+#define FPU_CONTEXT_REGS    SW_FPU_REGS
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/a1x/Make.defs b/arch/arm/src/a1x/Make.defs
index 220bee2489..53c68204a1 100644
--- a/arch/arm/src/a1x/Make.defs
+++ b/arch/arm/src/a1x/Make.defs
@@ -105,6 +105,7 @@ CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
diff --git a/arch/arm/src/am335x/Make.defs b/arch/arm/src/am335x/Make.defs
index 81f6c36281..13bfad7d45 100644
--- a/arch/arm/src/am335x/Make.defs
+++ b/arch/arm/src/am335x/Make.defs
@@ -101,6 +101,7 @@ CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
diff --git a/arch/arm/src/common/arm_fpucmp.c b/arch/arm/src/common/arm_fpucmp.c
new file mode 100644
index 0000000000..9a69369eff
--- /dev/null
+++ b/arch/arm/src/common/arm_fpucmp.c
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * arch/arm/src/common/arm_fpucmp.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <string.h>
+#include <nuttx/irq.h>
+
+#include "arm_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_FPU
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_fpucmp
+ *
+ * Description:
+ *   compare FPU areas from thread context
+ *
+ ****************************************************************************/
+
+bool up_fpucmp(const void *saveregs1, const void *saveregs2)
+{
+  const uint32_t *regs1 = saveregs1;
+  const uint32_t *regs2 = saveregs2;
+
+  return memcmp(&regs1[REG_S0],
+                &regs2[REG_S0], (4 * FPU_CONTEXT_REGS)) == 0;
+}
+#endif /* CONFIG_ARCH_FPU */
diff --git a/arch/arm/src/cxd56xx/Make.defs b/arch/arm/src/cxd56xx/Make.defs
index 629abecfa5..68105f0ed3 100644
--- a/arch/arm/src/cxd56xx/Make.defs
+++ b/arch/arm/src/cxd56xx/Make.defs
@@ -63,6 +63,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs
index 03d70d30ca..4a47269488 100644
--- a/arch/arm/src/efm32/Make.defs
+++ b/arch/arm/src/efm32/Make.defs
@@ -59,6 +59,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
diff --git a/arch/arm/src/eoss3/Make.defs b/arch/arm/src/eoss3/Make.defs
index b84a63a547..549b3fb97b 100644
--- a/arch/arm/src/eoss3/Make.defs
+++ b/arch/arm/src/eoss3/Make.defs
@@ -58,6 +58,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 CHIP_CSRCS  = eoss3_start.c eoss3_gpio.c eoss3_lowputc.c eoss3_clockconfig.c
diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index deccf72e33..68a0bfd519 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -125,6 +125,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
diff --git a/arch/arm/src/imxrt/Make.defs b/arch/arm/src/imxrt/Make.defs
index e2efb5adb0..37f0ae6b91 100644
--- a/arch/arm/src/imxrt/Make.defs
+++ b/arch/arm/src/imxrt/Make.defs
@@ -73,6 +73,7 @@ CMN_CSRCS += arm_cache.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 # Required i.MX RT files
diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs
index 55172b856c..0863ef844c 100644
--- a/arch/arm/src/kinetis/Make.defs
+++ b/arch/arm/src/kinetis/Make.defs
@@ -77,6 +77,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
diff --git a/arch/arm/src/lpc17xx_40xx/Make.defs b/arch/arm/src/lpc17xx_40xx/Make.defs
index 1e680a1b0b..c5552bc8a3 100644
--- a/arch/arm/src/lpc17xx_40xx/Make.defs
+++ b/arch/arm/src/lpc17xx_40xx/Make.defs
@@ -75,6 +75,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 # Required LPC17xx files
diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs
index 220feb5e0f..71a3582d7f 100644
--- a/arch/arm/src/lpc43xx/Make.defs
+++ b/arch/arm/src/lpc43xx/Make.defs
@@ -63,6 +63,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 CHIP_CSRCS  = lpc43_allocateheap.c lpc43_cgu.c lpc43_clrpend.c lpc43_gpio.c
diff --git a/arch/arm/src/lpc54xx/Make.defs b/arch/arm/src/lpc54xx/Make.defs
index 41f2299fda..8b515c3837 100644
--- a/arch/arm/src/lpc54xx/Make.defs
+++ b/arch/arm/src/lpc54xx/Make.defs
@@ -63,6 +63,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 CHIP_CSRCS  = lpc54_start.c lpc54_clockconfig.c lpc54_irq.c lpc54_clrpend.c
diff --git a/arch/arm/src/max326xx/Make.defs b/arch/arm/src/max326xx/Make.defs
index 3a6d376126..f7bc59918f 100644
--- a/arch/arm/src/max326xx/Make.defs
+++ b/arch/arm/src/max326xx/Make.defs
@@ -61,6 +61,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 # Common MAX326XX Source Files
diff --git a/arch/arm/src/nrf52/Make.defs b/arch/arm/src/nrf52/Make.defs
index c7f225fb9b..887fc836a2 100644
--- a/arch/arm/src/nrf52/Make.defs
+++ b/arch/arm/src/nrf52/Make.defs
@@ -71,6 +71,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 CHIP_CSRCS  = nrf52_start.c nrf52_clockconfig.c nrf52_irq.c nrf52_utils.c
diff --git a/arch/arm/src/s32k1xx/Make.defs b/arch/arm/src/s32k1xx/Make.defs
index 555f948a3d..e49d552069 100644
--- a/arch/arm/src/s32k1xx/Make.defs
+++ b/arch/arm/src/s32k1xx/Make.defs
@@ -40,6 +40,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 # Source files common to all S32K1xx chip families.
diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs
index 2cbeb3b579..a390e7a26f 100644
--- a/arch/arm/src/sam34/Make.defs
+++ b/arch/arm/src/sam34/Make.defs
@@ -67,6 +67,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs
index 1aca3b5939..e6657f9f81 100644
--- a/arch/arm/src/sama5/Make.defs
+++ b/arch/arm/src/sama5/Make.defs
@@ -107,6 +107,7 @@ CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
diff --git a/arch/arm/src/samd5e5/Make.defs b/arch/arm/src/samd5e5/Make.defs
index d224240307..afa67f1b42 100644
--- a/arch/arm/src/samd5e5/Make.defs
+++ b/arch/arm/src/samd5e5/Make.defs
@@ -57,6 +57,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs
index 7ff7c5084d..67d481e3b5 100644
--- a/arch/arm/src/samv7/Make.defs
+++ b/arch/arm/src/samv7/Make.defs
@@ -62,6 +62,7 @@ CMN_CSRCS += arm_cache.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs
index 6b73ca5a58..0103951438 100644
--- a/arch/arm/src/stm32/Make.defs
+++ b/arch/arm/src/stm32/Make.defs
@@ -71,6 +71,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs
index 80ccb1d381..f0178c78cf 100644
--- a/arch/arm/src/stm32f7/Make.defs
+++ b/arch/arm/src/stm32f7/Make.defs
@@ -62,6 +62,7 @@ CMN_CSRCS += arm_cache.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
diff --git a/arch/arm/src/stm32h7/Make.defs b/arch/arm/src/stm32h7/Make.defs
index 48b601c932..78831a876a 100644
--- a/arch/arm/src/stm32h7/Make.defs
+++ b/arch/arm/src/stm32h7/Make.defs
@@ -62,6 +62,7 @@ CMN_CSRCS += arm_cache.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs
index f9d97f4e44..54d33c6084 100644
--- a/arch/arm/src/stm32l4/Make.defs
+++ b/arch/arm/src/stm32l4/Make.defs
@@ -56,6 +56,7 @@ CMN_CSRCS += arm_vectors.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
diff --git a/arch/arm/src/stm32l5/Make.defs b/arch/arm/src/stm32l5/Make.defs
index 6cc506f49c..667fdf8476 100644
--- a/arch/arm/src/stm32l5/Make.defs
+++ b/arch/arm/src/stm32l5/Make.defs
@@ -61,6 +61,7 @@ CMN_CSRCS += arm_vectors.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
diff --git a/arch/arm/src/stm32u5/Make.defs b/arch/arm/src/stm32u5/Make.defs
index dc64268e0c..44c11dbba6 100644
--- a/arch/arm/src/stm32u5/Make.defs
+++ b/arch/arm/src/stm32u5/Make.defs
@@ -61,6 +61,7 @@ CMN_CSRCS += arm_vectors.c
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
diff --git a/arch/arm/src/tiva/Make.defs b/arch/arm/src/tiva/Make.defs
index a659f10e93..f4460dbbee 100644
--- a/arch/arm/src/tiva/Make.defs
+++ b/arch/arm/src/tiva/Make.defs
@@ -50,6 +50,7 @@ CMN_CSRCS += arm_vectors.c
 ifeq ($(CONFIG_ARCH_FPU),y)
   CMN_ASRCS += arm_fpu.S
   CMN_CSRCS += arm_fpuconfig.c
+  CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
diff --git a/arch/arm/src/tms570/Make.defs b/arch/arm/src/tms570/Make.defs
index 02a35e37d3..96662935ee 100644
--- a/arch/arm/src/tms570/Make.defs
+++ b/arch/arm/src/tms570/Make.defs
@@ -73,6 +73,7 @@ CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
diff --git a/arch/arm/src/xmc4/Make.defs b/arch/arm/src/xmc4/Make.defs
index fc4b2c0340..4d3830aa14 100644
--- a/arch/arm/src/xmc4/Make.defs
+++ b/arch/arm/src/xmc4/Make.defs
@@ -76,6 +76,7 @@ endif
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_fpu.S
 CMN_CSRCS += arm_fpuconfig.c
+CMN_CSRCS += arm_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
diff --git a/arch/risc-v/src/bl602/Make.defs b/arch/risc-v/src/bl602/Make.defs
index a88690ecdf..1a6850d8ee 100644
--- a/arch/risc-v/src/bl602/Make.defs
+++ b/arch/risc-v/src/bl602/Make.defs
@@ -47,6 +47,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += riscv_fpu.S
+CMN_CSRCS += riscv_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
diff --git a/arch/risc-v/src/c906/Make.defs b/arch/risc-v/src/c906/Make.defs
index 6a1a84503e..52c7cac166 100644
--- a/arch/risc-v/src/c906/Make.defs
+++ b/arch/risc-v/src/c906/Make.defs
@@ -47,6 +47,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += riscv_fpu.S
+CMN_CSRCS += riscv_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
diff --git a/arch/risc-v/src/common/riscv_fpucmp.c b/arch/risc-v/src/common/riscv_fpucmp.c
new file mode 100644
index 0000000000..d37faefe91
--- /dev/null
+++ b/arch/risc-v/src/common/riscv_fpucmp.c
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * arch/risc-v/src/common/riscv_fpucmp.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <string.h>
+#include <nuttx/irq.h>
+
+#include "riscv_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_FPU
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_fpucmp
+ *
+ * Description:
+ *   compare FPU areas from thread context
+ *
+ ****************************************************************************/
+
+bool up_fpucmp(const void *saveregs1, const void *saveregs2)
+{
+  const uintptr_t *regs1 = saveregs1;
+  const uintptr_t *regs2 = saveregs2;
+
+  return memcmp(&regs1[INT_XCPT_REGS], &regs2[INT_XCPT_REGS],
+                INT_REG_SIZE * FPU_XCPT_REGS) == 0;
+}
+#endif /* CONFIG_ARCH_FPU */
diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs
index c95c8a6d1d..c58e938036 100755
--- a/arch/risc-v/src/mpfs/Make.defs
+++ b/arch/risc-v/src/mpfs/Make.defs
@@ -48,6 +48,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += riscv_fpu.S
+CMN_CSRCS += riscv_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
diff --git a/arch/risc-v/src/qemu-rv/Make.defs b/arch/risc-v/src/qemu-rv/Make.defs
index 89c251ae2b..0d4d701333 100644
--- a/arch/risc-v/src/qemu-rv/Make.defs
+++ b/arch/risc-v/src/qemu-rv/Make.defs
@@ -60,6 +60,7 @@ endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += riscv_fpu.S
+CMN_CSRCS += riscv_fpucmp.c
 endif
 
 ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index deb1ce5233..2a930d1e7d 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -2573,6 +2573,20 @@ void up_perf_convert(uint32_t elapsed, FAR struct timespec *ts);
 
 int up_saveusercontext(FAR void *saveregs);
 
+/****************************************************************************
+ * Name: up_fpucmp
+ *
+ * Description:
+ *   compare FPU areas from thread context
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_FPU
+bool up_fpucmp(FAR const void *saveregs1, FAR const void *saveregs2);
+#else
+#define up_fpucmp(r1, r2) (true)
+#endif
+
 #undef EXTERN
 #if defined(__cplusplus)
 }