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Posted to commits@nuttx.apache.org by xi...@apache.org on 2026/10/14 15:41:08 UTC
(nuttx) branch master updated (0121eddcc48 -> 8130a13beb7)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang781216 pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
from 0121eddcc48 Documentation/cancellation_points: Fix two codespell errors.
new 4fbab66754c arch/arm/imxrt: Add revision read from ELE
new 8130a13beb7 arch/arm/imxrt: Add support to access DTCM for imxrt118x ELE
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/imxrt/hardware/rt118x/imxrt118x_ele.h | 9 +-
arch/arm/src/imxrt/imxrt118x_ele.c | 123 ++++++++++++++++-----
arch/arm/src/imxrt/imxrt118x_ele.h | 17 +++
3 files changed, 117 insertions(+), 32 deletions(-)
(nuttx) 02/02: arch/arm/imxrt: Add support to access DTCM for imxrt118x ELE
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang781216 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 8130a13beb73f5014e880eb369578d479e7a4ccf
Author: Jukka Laitinen <ju...@tii.ae>
AuthorDate: Tue Oct 13 15:23:28 2026 +0300
arch/arm/imxrt: Add support to access DTCM for imxrt118x ELE
Make the needed address translation for secure element, in case
the host buffers reside in DTCM.
Remove the upper_32_bits and lower_32_bits macros, upper 32 bits
of any address is always 0.
Signed-off-by: Jukka Laitinen <ju...@tii.ae>
---
arch/arm/src/imxrt/imxrt118x_ele.c | 56 ++++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 15 deletions(-)
diff --git a/arch/arm/src/imxrt/imxrt118x_ele.c b/arch/arm/src/imxrt/imxrt118x_ele.c
index cbbc6708156..4eb3e790715 100644
--- a/arch/arm/src/imxrt/imxrt118x_ele.c
+++ b/arch/arm/src/imxrt/imxrt118x_ele.c
@@ -35,6 +35,7 @@
#include <debug.h>
#include "arm_internal.h"
+#include "imxrt_dtcm.h"
#include "hardware/rt118x/imxrt118x_memorymap.h"
#include "imxrt118x_ele.h"
@@ -62,9 +63,6 @@
# define DCACHE_LINESIZE ARMV7M_DCACHE_LINESIZE
#endif
-#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16))
-#define lower_32_bits(n) ((uint32_t)(n))
-
#define ELE_RNG_TIMEOUT_US 5000
#define ELE_RNG_SLEEP_US 100
#define ELE_TRNG_STATUS_READY 0x3
@@ -189,17 +187,23 @@ static void imxrt118x_ele_receivemsg(struct ele_msg *msg_ptr)
static int imxrt118x_ele_get_info(void)
{
- uint32_t addr = (uint32_t)(uintptr_t)g_info;
+ uint32_t addr;
+
+ if (!imxrt_dma_address(g_info, sizeof(g_info), &addr))
+ {
+ return -EFAULT;
+ }
g_msg.header.version = ELE_VERSION;
g_msg.header.tag = ELE_CMD_TAG;
g_msg.header.size = 4;
g_msg.header.command = ELE_GET_INFO_REQ;
- g_msg.data[0] = upper_32_bits(addr);
- g_msg.data[1] = lower_32_bits(addr);
+ g_msg.data[0] = 0;
+ g_msg.data[1] = addr;
g_msg.data[2] = sizeof(g_info);
- up_invalidate_dcache(addr, addr + sizeof(g_info));
+ up_invalidate_dcache((uintptr_t)g_info,
+ (uintptr_t)g_info + sizeof(g_info));
imxrt118x_ele_sendmsg(&g_msg);
imxrt118x_ele_receivemsg(&g_msg);
@@ -209,7 +213,8 @@ static int imxrt118x_ele_get_info(void)
return -EIO;
}
- up_invalidate_dcache(addr, addr + sizeof(g_info));
+ up_invalidate_dcache((uintptr_t)g_info,
+ (uintptr_t)g_info + sizeof(g_info));
return 0;
}
@@ -233,6 +238,8 @@ void imxrt118x_ele_init(void)
int imxrt118x_ele_load_fw(uint32_t fw_addr)
{
+ imxrt_dma_address((const void *)(uintptr_t)fw_addr, 0, &fw_addr);
+
g_msg.header.version = ELE_VERSION;
g_msg.header.tag = ELE_CMD_TAG;
g_msg.header.size = 4;
@@ -295,6 +302,9 @@ uint32_t imxrt118x_ele_read_common_fuse(uint32_t fuse_id)
int imxrt118x_ele_get_key(uint8_t *key, size_t key_size,
uint8_t *ctx, size_t ctx_size)
{
+ uint32_t dma_key;
+ uint32_t dma_ctx;
+
if (!key)
{
_err("Invalid key parameter\n");
@@ -325,14 +335,20 @@ int imxrt118x_ele_get_key(uint8_t *key, size_t key_size,
return -EINVAL;
}
+ if (!imxrt_dma_address(key, key_size, &dma_key) ||
+ !imxrt_dma_address(ctx, ctx_size, &dma_ctx))
+ {
+ return -EFAULT;
+ }
+
g_msg.header.version = ELE_VERSION;
g_msg.header.tag = ELE_CMD_TAG;
g_msg.header.size = 7;
g_msg.header.command = ELE_DERIVE_KEY_REQ;
- g_msg.data[0] = upper_32_bits((uintptr_t)key);
- g_msg.data[1] = lower_32_bits((uintptr_t)key);
- g_msg.data[2] = upper_32_bits((uintptr_t)ctx);
- g_msg.data[3] = lower_32_bits((uintptr_t)ctx);
+ g_msg.data[0] = 0;
+ g_msg.data[1] = dma_key;
+ g_msg.data[2] = 0;
+ g_msg.data[3] = dma_ctx;
g_msg.data[4] = ((ctx_size << 16) | key_size);
uint32_t crc = g_msg.header.data;
@@ -448,12 +464,16 @@ int imxrt118x_ele_get_soc_revision(uint8_t *revision)
int imxrt118x_ele_auth_oem_ctnr(unsigned long ctnr_addr, uint32_t *response)
{
+ uint32_t addr;
+
+ imxrt_dma_address((const void *)ctnr_addr, 0, &addr);
+
g_msg.header.version = ELE_VERSION;
g_msg.header.tag = ELE_CMD_TAG;
g_msg.header.size = 3;
g_msg.header.command = ELE_OEM_CNTN_AUTH_REQ;
- g_msg.data[0] = upper_32_bits(ctnr_addr);
- g_msg.data[1] = lower_32_bits(ctnr_addr);
+ g_msg.data[0] = 0;
+ g_msg.data[1] = addr;
imxrt118x_ele_sendmsg(&g_msg);
imxrt118x_ele_receivemsg(&g_msg);
@@ -572,6 +592,7 @@ int imxrt118x_ele_get_random(uint32_t paddr, size_t len)
{
uint16_t counter = 0;
uint16_t max_tries = ELE_RNG_TIMEOUT_US / ELE_RNG_SLEEP_US;
+ uint32_t addr;
if (paddr == 0 || len == 0)
{
@@ -579,6 +600,11 @@ int imxrt118x_ele_get_random(uint32_t paddr, size_t len)
return -EINVAL;
}
+ if (!imxrt_dma_address((const void *)(uintptr_t)paddr, len, &addr))
+ {
+ return -EFAULT;
+ }
+
while ((imxrt118x_ele_get_trng_state() != 0))
{
if (counter > max_tries)
@@ -600,7 +626,7 @@ int imxrt118x_ele_get_random(uint32_t paddr, size_t len)
g_msg.header.size = 4;
g_msg.header.command = ELE_GET_RNG_REQ;
g_msg.data[0] = 0;
- g_msg.data[1] = paddr;
+ g_msg.data[1] = addr;
g_msg.data[2] = len;
imxrt118x_ele_sendmsg(&g_msg);
(nuttx) 01/02: arch/arm/imxrt: Add revision read from ELE
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang781216 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 4fbab66754cc5166f0f7b9e4a965b93f4b906f3c
Author: Jukka Laitinen <ju...@tii.ae>
AuthorDate: Tue Sep 22 12:01:43 2026 +0300
arch/arm/imxrt: Add revision read from ELE
Add a new helper function for EdgeLock Enclave driver for reading the SoC revision
- Refactor ELE_GET_INFO_REQ into an own function imxrt118x_ele_get_info
and use that for imxrt118x_ele_get_lifecycle
- Add imxrt118x_ele_get_soc_revision using the imxrt118x_ele_get_info
Signed-off-by: Jukka Laitinen <ju...@tii.ae>
---
arch/arm/src/imxrt/hardware/rt118x/imxrt118x_ele.h | 9 ++-
arch/arm/src/imxrt/imxrt118x_ele.c | 77 ++++++++++++++++------
arch/arm/src/imxrt/imxrt118x_ele.h | 17 +++++
3 files changed, 81 insertions(+), 22 deletions(-)
diff --git a/arch/arm/src/imxrt/hardware/rt118x/imxrt118x_ele.h b/arch/arm/src/imxrt/hardware/rt118x/imxrt118x_ele.h
index ed050eac0d1..679fc641f47 100644
--- a/arch/arm/src/imxrt/hardware/rt118x/imxrt118x_ele.h
+++ b/arch/arm/src/imxrt/hardware/rt118x/imxrt118x_ele.h
@@ -76,9 +76,12 @@
/* GET_INFO returned data. */
-#define ELE_GET_INFO_BYTES 160
-#define ELE_GET_INFO_LC_WORD 2
-#define ELE_GET_INFO_LC_MASK 0xffff
+#define ELE_GET_INFO_BYTES 160
+#define ELE_GET_INFO_SOC_WORD 1
+#define ELE_GET_INFO_SOC_REV_SHIFT 24
+#define ELE_GET_INFO_SOC_REV_MASK 0xff
+#define ELE_GET_INFO_LC_WORD 2
+#define ELE_GET_INFO_LC_MASK 0xffff
/* System 3 Messaging Unit A (IMXRT1180RM Ch. 65).
* The CM33 boots in Secure state and NXP's own SDK uses the Secure alias
diff --git a/arch/arm/src/imxrt/imxrt118x_ele.c b/arch/arm/src/imxrt/imxrt118x_ele.c
index 99a43414270..cbbc6708156 100644
--- a/arch/arm/src/imxrt/imxrt118x_ele.c
+++ b/arch/arm/src/imxrt/imxrt118x_ele.c
@@ -86,6 +86,8 @@ struct ele_trng_state
****************************************************************************/
static struct ele_msg g_msg;
+static uint8_t g_info[ELE_GET_INFO_BYTES]
+ aligned_data(DCACHE_LINESIZE);
#ifdef CONFIG_IMXRT_ELE_LOAD_FW
/* Embeds the NXP EdgeLock Enclave firmware AHAB container (path from
@@ -177,6 +179,40 @@ static void imxrt118x_ele_receivemsg(struct ele_msg *msg_ptr)
}
}
+/****************************************************************************
+ * Name: imxrt118x_ele_get_info
+ *
+ * Description:
+ * Query the device information from the EdgeLock Enclave.
+ *
+ ****************************************************************************/
+
+static int imxrt118x_ele_get_info(void)
+{
+ uint32_t addr = (uint32_t)(uintptr_t)g_info;
+
+ g_msg.header.version = ELE_VERSION;
+ g_msg.header.tag = ELE_CMD_TAG;
+ g_msg.header.size = 4;
+ g_msg.header.command = ELE_GET_INFO_REQ;
+ g_msg.data[0] = upper_32_bits(addr);
+ g_msg.data[1] = lower_32_bits(addr);
+ g_msg.data[2] = sizeof(g_info);
+
+ up_invalidate_dcache(addr, addr + sizeof(g_info));
+
+ imxrt118x_ele_sendmsg(&g_msg);
+ imxrt118x_ele_receivemsg(&g_msg);
+
+ if ((g_msg.data[0] & 0xff) != ELE_OK)
+ {
+ return -EIO;
+ }
+
+ up_invalidate_dcache(addr, addr + sizeof(g_info));
+ return 0;
+}
+
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -379,32 +415,35 @@ int imxrt118x_ele_close_device(void)
uint32_t imxrt118x_ele_get_lifecycle(void)
{
- static uint8_t info[ELE_GET_INFO_BYTES]
- aligned_data(DCACHE_LINESIZE);
-
- uint32_t addr = (uint32_t)(uintptr_t)info;
-
- g_msg.header.version = ELE_VERSION;
- g_msg.header.tag = ELE_CMD_TAG;
- g_msg.header.size = 4;
- g_msg.header.command = ELE_GET_INFO_REQ;
- g_msg.data[0] = upper_32_bits(addr);
- g_msg.data[1] = lower_32_bits(addr);
- g_msg.data[2] = sizeof(info);
+ if (imxrt118x_ele_get_info() < 0)
+ {
+ return 0;
+ }
- up_invalidate_dcache(addr, addr + sizeof(info));
+ return ((uint32_t *)g_info)[ELE_GET_INFO_LC_WORD] &
+ ELE_GET_INFO_LC_MASK;
+}
- imxrt118x_ele_sendmsg(&g_msg);
- imxrt118x_ele_receivemsg(&g_msg);
+int imxrt118x_ele_get_soc_revision(uint8_t *revision)
+{
+ uint32_t soc;
+ int ret;
- if ((g_msg.data[0] & 0xff) != ELE_OK)
+ if (revision == NULL)
{
- return 0;
+ return -EINVAL;
}
- up_invalidate_dcache(addr, addr + sizeof(info));
+ ret = imxrt118x_ele_get_info();
+ if (ret < 0)
+ {
+ return ret;
+ }
- return ((uint32_t *)info)[ELE_GET_INFO_LC_WORD] & ELE_GET_INFO_LC_MASK;
+ soc = ((uint32_t *)g_info)[ELE_GET_INFO_SOC_WORD];
+ *revision = (soc >> ELE_GET_INFO_SOC_REV_SHIFT) &
+ ELE_GET_INFO_SOC_REV_MASK;
+ return 0;
}
int imxrt118x_ele_auth_oem_ctnr(unsigned long ctnr_addr, uint32_t *response)
diff --git a/arch/arm/src/imxrt/imxrt118x_ele.h b/arch/arm/src/imxrt/imxrt118x_ele.h
index ba7efaa4d01..ed1aa03fadb 100644
--- a/arch/arm/src/imxrt/imxrt118x_ele.h
+++ b/arch/arm/src/imxrt/imxrt118x_ele.h
@@ -179,6 +179,23 @@ int imxrt118x_ele_close_device(void);
uint32_t imxrt118x_ele_get_lifecycle(void);
+/****************************************************************************
+ * Name: imxrt118x_ele_get_soc_revision
+ *
+ * Description:
+ * Return the SoC silicon revision reported by ELE GET_INFO. The revision
+ * uses NXP's hexadecimal major/minor encoding, for example 0xb0 or 0xc0.
+ *
+ * Output Parameters:
+ * revision - SoC silicon revision.
+ *
+ * Returned Value:
+ * OK on success, a negated errno value otherwise.
+ *
+ ****************************************************************************/
+
+int imxrt118x_ele_get_soc_revision(uint8_t *revision);
+
/****************************************************************************
* Name: imxrt118x_ele_auth_oem_ctnr
*