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Posted to commits@nuttx.apache.org by gn...@apache.org on 2020/09/16 19:24:51 UTC
[incubator-nuttx] 01/05: giant-board support (SAMA5D27C-D1G)
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit cab35983d439a0199892a4025797fc87bfd295d6
Author: Adam Feuer <ad...@starcat.io>
AuthorDate: Mon Sep 14 12:49:19 2020 -0700
giant-board support (SAMA5D27C-D1G)
---
boards/Kconfig | 23 +-
boards/arm/sama5/giant-board/Kconfig | 127 +++++
boards/arm/sama5/giant-board/README.md | 615 +++++++++++++++++++++
.../arm/sama5/giant-board/configs/netnsh/defconfig | 115 ++++
boards/arm/sama5/giant-board/configs/nsh/defconfig | 76 +++
.../giant-board/configs/sdmmc-net-nsh/defconfig | 151 +++++
.../sama5/giant-board/configs/sdmmcnsh/defconfig | 138 +++++
boards/arm/sama5/giant-board/helpers/netusb-up.sh | 57 ++
boards/arm/sama5/giant-board/include/.gitignore | 1 +
boards/arm/sama5/giant-board/include/board.h | 195 +++++++
.../arm/sama5/giant-board/include/board_492mhz.h | 207 +++++++
.../sama5/giant-board/include/board_memorymap.h | 59 ++
boards/arm/sama5/giant-board/include/board_sdram.h | 167 ++++++
boards/arm/sama5/giant-board/scripts/Make.defs | 88 +++
boards/arm/sama5/giant-board/scripts/dramboot.ld | 123 +++++
boards/arm/sama5/giant-board/scripts/gnu-elf.ld | 124 +++++
boards/arm/sama5/giant-board/scripts/isram.ld | 119 ++++
boards/arm/sama5/giant-board/scripts/uboot.ld | 124 +++++
boards/arm/sama5/giant-board/src/Makefile | 105 ++++
boards/arm/sama5/giant-board/src/giant-board.h | 436 +++++++++++++++
boards/arm/sama5/giant-board/src/sam_adc.c | 86 +++
boards/arm/sama5/giant-board/src/sam_ajoystick.c | 437 +++++++++++++++
boards/arm/sama5/giant-board/src/sam_appinit.c | 76 +++
boards/arm/sama5/giant-board/src/sam_autoleds.c | 138 +++++
boards/arm/sama5/giant-board/src/sam_boot.c | 90 +++
boards/arm/sama5/giant-board/src/sam_bringup.c | 400 ++++++++++++++
boards/arm/sama5/giant-board/src/sam_i2schar.c | 111 ++++
boards/arm/sama5/giant-board/src/sam_ostest.c | 95 ++++
boards/arm/sama5/giant-board/src/sam_pwm.c | 147 +++++
boards/arm/sama5/giant-board/src/sam_reset.c | 62 +++
boards/arm/sama5/giant-board/src/sam_sdmmc.c | 319 +++++++++++
boards/arm/sama5/giant-board/src/sam_sdram.c | 572 +++++++++++++++++++
boards/arm/sama5/giant-board/src/sam_spi.c | 166 ++++++
boards/arm/sama5/giant-board/src/sam_usb.c | 479 ++++++++++++++++
boards/arm/sama5/giant-board/src/sam_usbmsc.c | 91 +++
boards/arm/sama5/giant-board/src/sam_userleds.c | 98 ++++
36 files changed, 6412 insertions(+), 5 deletions(-)
diff --git a/boards/Kconfig b/boards/Kconfig
index 6e9b2a7..b42b7b6 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -1364,13 +1364,22 @@ config ARCH_BOARD_SABRE_6QUAD
board featuring the iMX 6Quad CPU.
config ARCH_BOARD_SAMA5D2_XULT
- bool "Atmel SAMA5D2 Xplained Ultra development board"
+ bool "Atmel SAMA5D2 Xplained Ultra development board"
+ depends on ARCH_CHIP_ATSAMA5D27
+ select ARCH_HAVE_LEDS
+ select ARCH_HAVE_BUTTONS
+ select ARCH_HAVE_IRQBUTTONS
+ ---help---
+ The port of NuttX to the Atmel SAMA5D2-XULT development board
+
+config ARCH_BOARD_GIANT_BOARD
+ bool "Groboards Giant Board (SAMA5D27C-D1G)"
depends on ARCH_CHIP_ATSAMA5D27
+ select SAMA5D27_GIANT_BOARD_492MHZ
select ARCH_HAVE_LEDS
- select ARCH_HAVE_BUTTONS
- select ARCH_HAVE_IRQBUTTONS
---help---
- The port of NuttX to the Atmel SAMA5D2-XULT development board
+ This options selects support for NuttX on the Groboards Giant Board,
+ featuring the SAMA5D27C-D1G SIP with 128MB DDR2 RAM.
config ARCH_BOARD_SAMA5D3X_EK
bool "Atmel SAMA5D3x-EK development board"
@@ -2268,7 +2277,8 @@ config ARCH_BOARD
default "s32k146evb" if ARCH_BOARD_S32K146EVB
default "s32k148evb" if ARCH_BOARD_S32K148EVB
default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
- default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
+ default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
+ default "giant-board" if ARCH_BOARD_GIANT_BOARD
default "sama5d3x-ek" if ARCH_BOARD_SAMA5D3X_EK
default "sama5d3-xplained" if ARCH_BOARD_SAMA5D3_XPLAINED
default "sama5d4-ek" if ARCH_BOARD_SAMA5D4_EK
@@ -2589,6 +2599,9 @@ endif
if ARCH_BOARD_SAMA5D2_XULT
source "boards/arm/sama5/sama5d2-xult/Kconfig"
endif
+if ARCH_BOARD_GIANT_BOARD
+source "boards/arm/sama5/giant-board/Kconfig"
+endif
if ARCH_BOARD_SAMA5D3X_EK
source "boards/arm/sama5/sama5d3x-ek/Kconfig"
endif
diff --git a/boards/arm/sama5/giant-board/Kconfig b/boards/arm/sama5/giant-board/Kconfig
new file mode 100644
index 0000000..2c31aef
--- /dev/null
+++ b/boards/arm/sama5/giant-board/Kconfig
@@ -0,0 +1,127 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_GIANT_BOARD
+
+choice
+ prompt "CPU Frequency"
+ default SAMA5D27_GIANT_BOARD_492MHZ
+
+config SAMA5D27_GIANT_BOARD_492MHZ
+ bool "492 MHz"
+
+endchoice # CPU Frequency
+
+config SAMA5D27_GIANT_BOARD_USBHOST_STACKSIZE
+ int "USB host waiter stack size"
+ default 1536 if USBHOST_HUB
+ default 1024 if !USBHOST_HUB
+ depends on USBHOST
+
+config SAMA5D27_GIANT_BOARD_USBHOST_PRIO
+ int "USB host waiter task priority"
+ default 100
+ depends on USBHOST
+
+config SAMA5_SDMMC
+ bool "enable SDMMC controller"
+ default y if SAMA5_HAVE_SDMMC
+ select SDIO_DMA
+ select SCHED_WORKQUEUE
+ select SCHED_HPWORK
+ select MMCSD
+ select MMCSD_SDIO
+ select SDIO_BLOCKSETUP
+ select ARCH_HAVE_SDIO
+ select SAMA5_SDMMC_DMA
+ ---help---
+ Enable SD Card interface SDMMC0. Selects SAMA5_SDMMC SAMA5_SDMMC0
+ SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
+
+config SAMA5_SDMMC0
+ bool "Enable SDMMC0 (built-in eMMC)"
+ default n if SAMA5_SDMMC
+ depends on SAMA5_SDMMC
+
+config SAMA5_SDMMC0_SIZE
+ int "SDMMC0 size in bytes"
+ default 4294967296
+ depends on SAMA5_SDMMC0
+ ---help---
+ Size of eMMC flash in bytes. Default: 4GB
+
+config SAMA5D27_SDMMC0_MOUNT
+ bool "Mount SDMMC0 at startup"
+ default n
+ depends on SAMA5_SDMMC0
+
+config SAMA5D27_SDMMC0_MOUNT_BLKDEV
+ string "SDMMC0 block device name"
+ default mmc0
+ depends on SAMA5_SDMMC0
+
+config SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT
+ string "SDMMC0 mountpoint"
+ default "/mnt/sdmmc0"
+ depends on SAMA5_SDMMC0
+
+config SAMA5D27_SDMMC0_MOUNT_FSTYPE
+ string "SDMMC0 file system type"
+ default "vfat"
+ depends on SAMA5_SDMMC0
+
+config CONFIG_SAMA5_SDMMC1_WIDTH_D1_D8
+ bool "SDMMC0 data bus width 8 bits"
+ default y
+ depends on SAMA5_SDMMC0
+
+config SAMA5_SDMMC1
+ bool "Enable SDMMC1"
+ default y if SAMA5_SDMMC
+ select SAMA5_SDMMC1_WIDTH_D1_D4
+ depends on SAMA5_SDMMC
+
+config SAMA5_SDMMC1_SIZE
+ int "SDMMC1 size in bytes"
+ default 1073741824
+ depends on SAMA5_SDMMC1
+ ---help---
+ Size of SD Card in bytes. Default: 16GB
+
+config SAMA5D27_SDMMC1_MOUNT
+ bool "Mount SDMMC1 at startup"
+ default n
+ depends on SAMA5_SDMMC1
+
+config SAMA5D27_SDMMC1_MOUNT_BLKDEV
+ string "SDMMC1 block device name"
+ default mmc1
+ depends on SAMA5_SDMMC1
+
+config SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT
+ string "SDMMC1 mountpoint"
+ default "/mnt/sdmmc1"
+ depends on SAMA5_SDMMC1
+
+config SAMA5D27_SDMMC1_MOUNT_FSTYPE
+ string "SDMMC1 file system type"
+ default "vfat"
+ depends on SAMA5_SDMMC1
+
+config MMCSD_HAVE_CARDDETECT
+ bool "SDMMC1 card detect"
+ default y
+ depends on SAMA5_SDMMC1
+
+config SAMA5_SDMMC1_WIDTH_D1_D4
+ bool "SDMMC1 data bus width 4 bits"
+ default y
+ depends on SAMA5_SDMMC1
+
+config SAMA5_SYSTEMRESET
+ bool "Enable system reset - this will enable the nsh reboot command"
+ select BOARDCTL_RESET
+
+endif # ARCH_BOARD_GIANT_BOARD
diff --git a/boards/arm/sama5/giant-board/README.md b/boards/arm/sama5/giant-board/README.md
new file mode 100644
index 0000000..159a55f
--- /dev/null
+++ b/boards/arm/sama5/giant-board/README.md
@@ -0,0 +1,615 @@
+# README
+
+ This README file describes the port of NuttX to the Groboards Giant Board
+ development board. This board features the Atmel SAMA5D27 microprocessor
+ as a SIP with 128KB on-chip DDR2 RAM (part number `ATSAMA5D27C-D1G`).
+ See https://groboards.com/giant-board/ for further information.
+
+ This was copied from the SAMA5D2-XULT README, and needs updating.
+
+## Contents
+
+ - STATUS
+ - Loading Code into SRAM with J-Link
+ - DRAMBOOT, AT25BOOT, SRAMBOOT
+ - Running NuttX from SDRAM
+ - Buttons and LEDs
+ - Serial Console
+ - Giant Board Configuration Options
+ - Configurations
+
+## Status
+
+1. Most of this document is a partially corrected clone of the SAMA5D2-XULT
+ README.txt and still contains errors and inconsistencies.
+
+## Loading Code into SRAM from SD Card
+
+There is no JTAG connector on the Giant Board. There are pads to wire up an SWD
+adapter, but this has not been tested.
+
+The way to run NuttX is to boot from an SD Card. You can download an SD Card image
+or a zip file of the required files from this page:
+
+https://www.starcat.io/starcat-nuttx/
+
+The SD Card has to be FAT formatted, have an AT91Bootstrap binary called boot.bin,
+a U-Boot binary called u-boot.bin as well as a compiled device tree for the
+SAMA5D27C-D1G called `at91-sama5d27_giantboard.dtb` in the `dtbs/` folder. You can
+build these yourself using the tools at
+
+https://github.com/Groboards/giantboard-tools
+
+The layout should look like this:
+
+ BOOT.BIN
+ uboot.env
+ nuttx.bin
+ u-boot.bin
+ dtbs/
+ at91-sama5d27_giantboard.dtb
+
+You only need uboot.env if you want to boot automatically. See the U-Boot
+documentation for instructions on how to create this file.
+
+## Running NuttX from SDRAM
+
+NuttX will be executed from SDRAM, and NuttX binary must reside on SD Card media.
+
+### NuttX Configuration
+
+In order to run from SDRAM, NuttX must be built at origin 0x20008000 in
+SDRAM (skipping over SDRAM memory used by the bootloader). The following
+configuration option is required:
+
+ CONFIG_SAMA5_BOOT_SDRAM=y
+ CONFIG_BOOT_RUNFROMSDRAM=y
+
+These options tell the NuttX code that it will be booting and running from
+SDRAM. In this case, the start-logic will do to things: (1) it will not
+configure the SAMA5D2 clocking. Rather, it will use the clock configuration
+as set up by the bootloader. And (2) it will not attempt to configure the
+SDRAM. Since NuttX is already running from SDRAM, it must accept the SDRAM
+configuration as set up by the bootloader.
+
+### Boot sequence
+
+Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted
+
+Several pieces of software are involved to boot a Nutt5X into SDRAM. First
+is the primary bootloader in ROM which is in charge to check if a valid
+application is present on supported media (NOR FLASH, Serial DataFlash,
+NAND FLASH, SD card).
+
+The boot sequence of linux4SAM is done in several steps :
+
+1. The ROM bootloader checks if a valid application is present in FLASH
+ and if it is the case downloads it into internal SRAM. This program
+ is usually a second level bootloader called AT91BootStrap.
+
+2. AT91Bootstrap is the second level bootloader. It is in charge of the
+ hardware configuration. It downloads U-Boot / Barebox binary from
+ FLASH to SDRAM / DDRAM and starts the third level bootloader
+ (U-Boot / Barebox)
+
+ (see http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap).
+
+3. The third level bootloader is either U-Boot or Barebox. The third
+ level bootloader is in charge of downloading NuttX binary from FLASH,
+ network, SD card, etc. It then starts NuttX.
+
+ 4. Then NuttX runs from SDRAM
+
+### NAND FLASH Memory Map
+
+Reference: http://www.at91.com/linux4sam/bin/view/Linux4SAM/GettingStarted
+
+ 0x0000:0000 - 0x0003:ffff: AT91BootStrap
+ 0x0004:0000 - 0x000b:ffff: U-Boot
+ 0x000c:0000 - 0x000f:ffff: U-Boot environment
+ 0x0010:0000 - 0x0017:ffff: U-Boot environment redundant
+ 0x0018:0000 - 0x001f:ffff: Device tree (DTB)
+ 0x0020:0000 - 0x007f:ffff: NuttX
+ 0x0080:0000 - end: Available for use as a NAND file system
+
+### Load NuttX with U-Boot on AT91 boards
+
+Reference http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot
+
+#### Preparing NuttX image
+
+U-Boot does not support normal binary images. Instead you have to
+create an nuttx.bin file. The NuttX build generates this file
+automatically. Copy it to the root of the SD Card that you made,
+and boot the card. The SD Card image above will automatically boot
+using the nuttx.bin file. If you are using another image (the
+Giant Board linux image for instance), you can hit space to enter
+U-Boot, and then from the U-Boot prompt do the following:
+
+ U-Boot> fatload mmc 0 0x20008000 nuttx.bin
+ mci: setting clock 257812 Hz, block size 512
+ mci: setting clock 257812 Hz, block size 512
+ mci: setting clock 257812 Hz, block size 512
+ gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out
+ mci: setting clock 257812 Hz, block size 512
+ mci: setting clock 22000000 Hz, block size 512
+ reading nuttx.bin
+ 108076 bytes read in 23 ms (4.5 MiB/s)
+
+ U-Boot> go 0x20008040
+ ## Starting application at 0x20008040 ...
+
+ NuttShell (NSH) NuttX-7.2
+ nsh>
+
+## Buttons and LEDs
+
+### Buttons
+
+A single button, PB1, is available on the Giant Board. This is connected to the
+Power Management Integrated Circuit (PMIC). It is not available to the user.
+
+This appears to have no affect under NuttX.
+
+You can add your own buttons, support for pollable buttons is enabled with:
+
+ CONFIG_ARCH_BUTTONS=y
+
+For interrupt driven buttons, add:
+
+ CONFIG_ARCH_IRQBUTTONS=y
+
+Program interfaces for button access are described in nuttx/include/nuttx/arch.h
+
+There is an example that can be enabled to test button interrupts. That
+example is enabled like:
+
+ CONFIG_EXAMPLES_BUTTONS=y
+ CONFIG_EXAMPLES_BUTTONS_MAX=0
+ CONFIG_EXAMPLES_BUTTONS_MIN=0
+ CONFIG_EXAMPLES_BUTTONS_NAME0="PB_USER"
+ CONFIG_EXAMPLES_IRQBUTTONS_MAX=0
+ CONFIG_EXAMPLES_IRQBUTTONS_MIN=0
+
+### LEDs
+
+There is an Orange LED on the Giant Board, driven by pin (PA6) labeled STATUS.
+Bringing the pin high will illuminate the LED.
+
+ ------------------------------ ------------------- -------------------------
+ SAMA5D2 PIO SIGNAL USAGE
+ ------------------------------ ------------------- -------------------------
+ PA6 STATUS_LED Orange LED
+ ------------------------------ ------------------- -------------------------
+
+When CONFIG_ARCH_LEDS is defined in the NuttX configuration, NuttX will
+control the Orange LED as follows:
+
+ SYMBOL Meaning Orange LED
+ ------------------- ----------------------- ---------
+ LED_STARTED NuttX has been started OFF
+ LED_HEAPALLOCATE Heap has been allocated OFF
+ LED_IRQSENABLED Interrupts enabled OFF
+ LED_STACKCREATED Idle stack created ON
+ LED_INIRQ In an interrupt N/C
+ LED_SIGNAL In a signal handler N/C
+ LED_ASSERTION An assertion failed N/C
+ LED_PANIC The system has crashed FLASH
+
+Thus if the Orange LED is statically on, NuttX has successfully booted and
+is, apparently, running normally. If LED is flashing at approximately
+2Hz, then a fatal error has been detected and the system has halted.
+
+## Serial Console
+
+The default serial console is UART1 (TX and RX on the pin connectors).
+There is a TTL serial connection available on pins 14 and 15 of the J1
+connector.
+
+ ---- ------------------------ -------------
+ J1 SCHEMATIC SAMA5D2
+ PIN NAME(s) PIO FUNCTION
+ ---- ------------------------ -------------
+ 15 UART1_RX DBGU_UTXD1_PD3 PD3 UTXD1
+ 14 UART1_TX DBGU_URXD1_PD2 PD2 URXD1
+ ---- ------------------------ -------------
+
+The other UART on the connectors (J1 and J1) is FLEXCOM4.
+Terminology: FLEXCOM is the same as USART in previous SAMA5D versions.
+
+ ---- ----------- -------------
+ BOARD SAMA5D2
+ PIN NAME PIO FUNCTION
+ ---- ------------ -------------
+ J2 4 FLEXCOM_IO1 PD21 FLEXCOM4
+ J1 6 AD2 PD13 FLEXCOM4
+ ---- ------------ -------------
+
+By default, the standard UART on the connectors (FLEXCOM4) is
+enabled in all of these configurations unless otherwise noted.
+
+REVISIT: UART1 on the DBGU connect might be a better choice for the
+default serial console
+
+## Giant Board Configuration Options
+
+CONFIG_ARCH - Identifies the arch/ subdirectory. This should
+be set to:
+
+ CONFIG_ARCH="arm"
+
+CONFIG_ARCH_family - For use in C code:
+
+ CONFIG_ARCH_ARM=y
+
+CONFIG_ARCH_architecture - For use in C code:
+
+ CONFIG_ARCH_CORTEXA5=y
+
+CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+ CONFIG_ARCH_CHIP="sama5"
+
+CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+chip:
+
+ CONFIG_ARCH_CHIP_SAMA5=y
+ CONFIG_ARCH_CHIP_ATSAMA5D27=y
+
+CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
+hence, the board that supports the particular chip or SoC.
+
+ CONFIG_ARCH_BOARD="giant-board" (for the Groboards Giant Board)
+
+CONFIG_ARCH_BOARD_name - For use in C code
+
+ CONFIG_ARCH_BOARD_GIANT_BOARD=y
+
+CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
+of delay loops
+
+CONFIG_ENDIAN_BIG - define if big endian (default is little
+endian)
+
+CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
+
+ CONFIG_RAM_SIZE=0x0002000 (128Kb)
+
+CONFIG_RAM_START - The physical start address of installed DRAM
+
+ CONFIG_RAM_START=0x20000000
+
+CONFIG_RAM_VSTART - The virtual start address of installed DRAM
+
+ CONFIG_RAM_VSTART=0x20000000
+
+CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+have LEDs
+
+CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+stack. If defined, this symbol is the size of the interrupt
+stack in bytes. If not defined, the user task stacks will be
+used during interrupt handling.
+
+CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
+
+Individual subsystems can be enabled:
+
+REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt
+
+ CONFIG_SAMA5_DBGU - Debug Unit
+ CONFIG_SAMA5_PIT - Periodic Interval Timer
+ CONFIG_SAMA5_WDT - Watchdog timer
+ CONFIG_SAMA5_HSMC - Multi-bit ECC
+ CONFIG_SAMA5_SMD - SMD Soft Modem
+ CONFIG_SAMA5_FLEXCOM0 - Flexcom 0
+ CONFIG_SAMA5_FLEXCOM1 - Flexcom 0
+ CONFIG_SAMA5_FLEXCOM2 - Flexcom 0
+ CONFIG_SAMA5_FLEXCOM3 - Flexcom 0
+ CONFIG_SAMA5_FLEXCOM4 - Flexcom 0
+ CONFIG_SAMA5_UART0 - UART 0 (not available on the pins)
+ CONFIG_SAMA5_UART1 - UART 1
+ CONFIG_SAMA5_UART2 - UART 2 (not available on the pins)
+ CONFIG_SAMA5_UART3 - UART 3 (not available on the pins)
+ CONFIG_SAMA5_UART4 - UART 4 (not available on the pins)
+ CONFIG_SAMA5_TWI0 - Two-Wire Interface 0
+ CONFIG_SAMA5_TWI1 - Two-Wire Interface 1
+ CONFIG_SAMA5_SDMMC0 - SD MMC card interface 0 (not available on the pins)
+ CONFIG_SAMA5_SDMMC1 - SD MMC card interface 1
+ CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0
+ CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1
+ CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2)
+ CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5)
+ CONFIG_SAMA5_PWM - Pulse Width Modulation Controller
+ CONFIG_SAMA5_ADC - Touch Screen ADC Controller
+ CONFIG_SAMA5_XDMAC0 - XDMA Controller 0
+ CONFIG_SAMA5_XDMAC1 - XDMA Controller 1
+ CONFIG_SAMA5_UHPHS - USB Host High Speed
+ CONFIG_SAMA5_UDPHS - USB Device High Speed
+ CONFIG_SAMA5_EMAC0 - Ethernet MAC 0 (GMAC0) (not available on the pins)
+ CONFIG_SAMA5_EMAC1 - Ethernet MAC 1 (GMAC1) (not available on the pins)
+ CONFIG_SAMA5_LCDC - LCD Controller (not available on the pins)
+ CONFIG_SAMA5_ISI - Image Sensor Interface (not available on the pins)
+ CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0
+ CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1
+ CONFIG_SAMA5_SHA - Secure Hash Algorithm
+ CONFIG_SAMA5_AES - Advanced Encryption Standard
+ CONFIG_SAMA5_TDES - Triple Data Encryption Standard
+ CONFIG_SAMA5_TRNG - True Random Number Generator
+ CONFIG_SAMA5_ARM - Performance Monitor Unit
+ CONFIG_SAMA5_FUSE - Fuse Controller
+ CONFIG_SAMA5_MPDDRC - MPDDR controller
+
+Some subsystems can be configured to operate in different ways. The drivers
+need to know how to configure the subsystem.
+
+ CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts
+ CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts
+ CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts
+ CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts
+
+ CONFIG_USART0_SERIALDRIVER - Flexcom0 is configured as a UART
+ CONFIG_USART1_SERIALDRIVER - Flexcom1 is configured as a UART
+ CONFIG_USART2_SERIALDRIVER - Flexcom2 is configured as a UART
+ CONFIG_USART3_SERIALDRIVER - Flexcom3 is configured as a UART
+ CONFIG_USART4_SERIALDRIVER - Flexcom4 is configured as a UART
+
+#### AT91SAMA5 specific device driver settings
+
+ CONFIG_SAMA5_DBGU_SERIAL_CONSOLE - selects the DBGU
+ for the console and ttyDBGU
+ CONFIG_SAMA5_DBGU_RXBUFSIZE - Characters are buffered as received.
+ This specific the size of the receive buffer
+ CONFIG_SAMA5_DBGU_TXBUFSIZE - Characters are buffered before
+ being sent. This specific the size of the transmit buffer
+ CONFIG_SAMA5_DBGU_BAUD - The configure BAUD of the DBGU.
+ CONFIG_SAMA5_DBGU_PARITY - 0=no parity, 1=odd parity, 2=even parity
+
+ CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART
+ m (m=4,5) for the console and ttys0 (default is the DBGU).
+ CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
+ This specific the size of the receive buffer
+ CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
+ being sent. This specific the size of the transmit buffer
+ CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
+ CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
+ CONFIG_U[S]ARTn_PARITY - 0=no parity, 1=odd parity, 2=even parity
+ CONFIG_U[S]ARTn_2STOP - Two stop bits
+
+#### AT91SAMA5 USB Host Configuration
+
+Pre-requisites
+
+ CONFIG_USBDEV - Enable USB device support
+ CONFIG_USBHOST - Enable USB host support
+ CONFIG_SAMA5_UHPHS - Needed
+ CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block
+ CONFIG_SCHED_WORKQUEUE - Worker thread support is required
+
+Options:
+
+ CONFIG_SAMA5_OHCI_NEDS
+ Number of endpoint descriptors
+ CONFIG_SAMA5_OHCI_NTDS
+ Number of transfer descriptors
+ CONFIG_SAMA5_OHCI_TDBUFFERS
+ Number of transfer descriptor buffers
+ CONFIG_SAMA5_OHCI_TDBUFSIZE
+ Size of one transfer descriptor buffer
+ CONFIG_USBHOST_INT_DISABLE
+ Disable interrupt endpoint support
+ CONFIG_USBHOST_ISOC_DISABLE
+ Disable isochronous endpoint support
+ CONFIG_USBHOST_BULK_DISABLE
+ Disable bulk endpoint support
+
+config SAMA5_OHCI_REGDEBUG
+
+## Configurations
+
+### Information Common to All Configurations
+
+Each Giant Board configuration is maintained in a sub-directory and
+can be selected as follow:
+
+ tools/configure.sh giant-board:<subdir>
+
+Before building, make sure the PATH environment variable includes the
+correct path to the directory than holds your toolchain binaries.
+
+And then build NuttX by simply typing the following. At the conclusion of
+the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
+
+ make
+
+The <subdir> that is provided above as an argument to the tools/configure.sh
+must be is one of the following.
+
+NOTES:
+
+ 1. These configurations use the mconf-based configuration tool. To
+ change any of these configurations using that tool, you should:
+
+ a. Build and install the kconfig-mconf tool. See nuttx/README.txt
+ see additional README.txt files in the NuttX tools repository.
+
+ b. Execute 'make menuconfig' in nuttx/ in order to start the
+ reconfiguration process.
+
+ 2. Unless stated otherwise, all configurations generate console
+ output on the DBGU (J23).
+
+ 3. All of these configurations use the Code Sourcery for Windows toolchain
+ (unless stated otherwise in the description of the configuration). That
+ toolchain selection can easily be reconfigured using 'make menuconfig'.
+ Here are the relevant current settings:
+
+ Build Setup:
+
+ CONFIG_HOST_WINDOWS=y : Microsoft Windows
+ CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment
+
+System Type -> Toolchain:
+
+ CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows
+
+4. The SAMA5Dx is running at 528MHz by default in these configurations.
+
+Board Selection -> CPU Frequency
+
+ CONFIG_SAMA5D2XULT_528MHZ=y : Enable 528MHz operation
+ CONFIG_BOARD_LOOPSPERMSEC=65775 : Calibrated on SAMA5D3-Xplained at 528MHz running from SDRAM
+
+### Configuration Sub-directories
+
+Summary: Some of the descriptions below are long and wordy. Here is the
+concise summary of the available Giant Board configurations:
+
+- nsh:
+
+ This is a basic NuttShell (NSH) configuration.
+
+ There may be issues with some of these configurations. See the details
+ for status of individual configurations.
+
+#### Now for the gory details:
+
+- netnsh:
+
+ This is a network enabled configuration based on the NuttShell (NSH).
+ The CDC-ECM driver is enabled, so you can plug a USB cable into the
+ USB-Micro port (USB-A) and the board will appear as an CDC-ECM
+ ethernet adapter.
+
+- nsh:
+
+ This configuration directory provide the NuttShell (NSH). This is a
+ very simple NSH configuration upon which you can build further
+ functionality.
+
+ NOTES:
+
+ 1. This configuration uses the UART1 (PD2 and PD3) for the serial
+ console. USART1 is available at the "DBGU" RS-232 connector (J24).
+ This is easily changed by reconfiguring to (1) enable a different
+ serial peripheral, and (2) selecting that serial peripheral as the
+ console device.
+
+ 2. By default, this configuration is set up to build on Windows
+ under either a Cygwin or MSYS environment using a recent, Windows-
+ native, generic ARM EABI GCC toolchain (such as the ARM supported
+ toolchain). Both the build environment and the toolchain
+ selection can easily be changed by reconfiguring:
+
+ CONFIG_HOST_WINDOWS=y : Windows operating system
+ CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
+ CONFIG_ARMV7A_TOOLCHAIN_EABIW=y : Generic GCC EABI toolchain for Windows
+
+ If you are running on Linux, make *certain* that you have
+ CONFIG_HOST_LINUX=y *before* the first make or you will create a
+ corrupt configuration that may not be easy to recover from. See
+ the warning in the section "Information Common to All Configurations"
+ for further information.
+
+ 4. This configuration supports logging of debug output to a circular
+ buffer in RAM. This feature is discussed fully in this Wiki page:
+ http://nuttx.org/doku.php?id=wiki:howtos:syslog . Relevant
+ configuration settings are summarized below:
+
+ File System:
+
+ Device Drivers:
+ CONFIG_RAMLOG=y : Enable the RAM-based logging feature.
+ CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the
+ system logger.
+ CONFIG_RAMLOG_NONBLOCKING=y : Needs to be non-blocking for dmesg
+ CONFIG_RAMLOG_BUFSIZE=16384 : Buffer size is 16KiB
+
+ NOTE: This RAMLOG feature is really only of value if debug output
+ is enabled. But, by default, no debug output is disabled in this
+ configuration. Therefore, there is no logic that will add anything
+ to the RAM buffer. This feature is configured and in place only
+ to support any future debugging needs that you may have.
+
+ If you don't plan on using the debug features, then by all means
+ disable this feature and save 16KiB of RAM!
+
+ NOTE: There is an issue with capturing data in the RAMLOG: If
+ the system crashes, all of the crash dump information will into
+ the RAMLOG and you will be unable to access it! You can tell that
+ the system has crashed because (a) it will be unresponsive and (b)
+ the RED LED will be blinking at about 2Hz.
+
+ That is another good reason to disable the RAMLOG!
+
+ 5. This configuration executes out of SDRAM flash and is loaded into
+ SDRAM from SD card U-Boot. Data also is positioned in SDRAM.
+
+ Booting with U-Boot from nuttx.bin on an SD card is the only boot
+ method that has been tested. These are the commands that I used to boot NuttX
+ from the SD card:
+
+ U-Boot> fatload mmc 0 0x20008000 nuttx.bin
+ U-Boot> go 0x20008040
+
+ 6. This configuration supports /dev/null, /dev/zero, and /dev/random.
+
+ CONFIG_DEV_NULL=y : Enables /dev/null
+ CONFIG_DEV_ZERO=y : Enabled /dev/zero
+
+ Support for /dev/random is implemented using the SAMA5D2's True
+ Random Number Generator (TRNG). See the section above entitled
+ "TRNG and /dev/random" for information about configuring /dev/random.
+
+ CONFIG_SAMA5_TRNG=y : Enables the TRNG peripheral
+ CONFIG_DEV_RANDOM=y : Enables /dev/random
+
+ 7. This configuration has support for NSH built-in applications enabled.
+ No built-in applications are enabled, however.
+
+ 8. This configuration has support for the FAT and PROCFS file
+ systems built in.
+
+ The FAT file system includes long file name support. Please be aware
+ that Microsoft claims patents against the long file name support (see
+ more discussion in the top-level COPYING file).
+
+ CONFIG_FS_FAT=y : Enables the FAT file system
+ CONFIG_FAT_LCNAMES=y : Enable lower case 8.3 file names
+ CONFIG_FAT_LFN=y : Enables long file name support
+ CONFIG_FAT_MAXFNAME=32 : Arbitrarily limits the size of a path
+ segment name to 32 bytes
+
+ The PROCFS file system is enabled simply with:
+
+ CONFIG_FS_PROCFS=y : Enable PROCFS file system
+
+ 9. The Real Time Clock/Calendar (RTC) is enabled in this configuration.
+ See the section entitled "RTC" above for detailed configuration
+ settings.
+
+ The RTC alarm is not enabled by default since there is nothing in
+ this configuration that uses it. The alarm can easily be enabled,
+ however, as described in the "RTC" section.
+
+ The time value from the RTC will be used as the NuttX system time
+ in all timestamp operations. You may use the NSH 'date' command
+ to set or view the RTC as described above in the "RTC" section.
+
+ NOTE: If you want the RTC to preserve time over power cycles, you
+ will need to install a battery in the battery holder (J12) and close
+ the jumper, JP13.
+
+- sdmmcnsh:
+
+ This is a configuration based on the NuttShell (NSH). The SDMMC
+ peripheral is enabled, and can read and write to a VFAT filesystem
+ on the SD Card.
+
+ NuttX will mount the SD Card at `/mnt/mmcsd1`.
+
+- sdmmc-net-nsh:
+
+ This is a combination of the netnsh and sdmmcnsh configurations.
diff --git a/boards/arm/sama5/giant-board/configs/netnsh/defconfig b/boards/arm/sama5/giant-board/configs/netnsh/defconfig
new file mode 100644
index 0000000..e8e88f3
--- /dev/null
+++ b/boards/arm/sama5/giant-board/configs/netnsh/defconfig
@@ -0,0 +1,115 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_AUDIO_FORMAT_MP3 is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_SAMA5_UART0 is not set
+# CONFIG_SAMA5_UHPHS_RHPORT3 is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="giant-board"
+CONFIG_ARCH_BOARD_GIANT_BOARD=y
+CONFIG_ARCH_CHIP="sama5"
+CONFIG_ARCH_CHIP_ATSAMA5D27=y
+CONFIG_ARCH_CHIP_SAMA5=y
+CONFIG_ARCH_CHIP_SAMA5D2=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_AUDIO=y
+CONFIG_AUDIO_NUM_BUFFERS=8
+CONFIG_BOARD_LOOPSPERMSEC=65775
+CONFIG_BOOT_RUNFROMSDRAM=y
+CONFIG_BUILTIN=y
+CONFIG_CDCACM=y
+CONFIG_DEV_ZERO=y
+CONFIG_EXAMPLES_TCPBLASTER=y
+CONFIG_EXAMPLES_TCPECHO=y
+CONFIG_EXAMPLES_UDPBLASTER=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FS_BINFS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FATTIME=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_FS_TMPFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HIDKBD_POLLUSEC=80000
+CONFIG_I2S=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IOB_NBUFFERS=24
+CONFIG_IOB_THROTTLE=0
+CONFIG_MAX_TASKS=16
+CONFIG_NETINIT_NOMAC=y
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_NET_CDCECM=y
+CONFIG_NET_ETH_PKTSIZE=1500
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_LOOPBACK=y
+CONFIG_NET_SENDFILE=y
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_SOLINGER=y
+CONFIG_NET_TCP=y
+CONFIG_NET_TCPBACKLOG=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_KEEPALIVE=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_WRITE_BUFFERS=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAMLOG=y
+CONFIG_RAMLOG_BUFSIZE=16384
+CONFIG_RAMLOG_SYSLOG=y
+CONFIG_RAM_SIZE=268435456
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_VSTART=0x20000000
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SAMA5_BOOT_SDRAM=y
+CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
+CONFIG_SAMA5_DDRCS_RESERVE=y
+CONFIG_SAMA5_EHCI=y
+CONFIG_SAMA5_OHCI=y
+CONFIG_SAMA5_PIO_IRQ=y
+CONFIG_SAMA5_RTC=y
+CONFIG_SAMA5_TRNG=y
+CONFIG_SAMA5_UART1=y
+CONFIG_SAMA5_UDPHS=y
+CONFIG_SAMA5_UHPHS=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_SIG_EVTHREAD=y
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_TTY_SIGINT=y
+CONFIG_TTY_SIGSTP=y
+CONFIG_UART1_SERIAL_CONSOLE=y
+CONFIG_UBOOT_UIMAGE=y
+CONFIG_UIMAGE_ENTRY_POINT=0x20008040
+CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
+CONFIG_USBDEV=y
+CONFIG_USBDEV_DUALSPEED=y
+CONFIG_USBHOST_CDCACM=y
+CONFIG_USBHOST_COMPOSITE=y
+CONFIG_USBHOST_HIDKBD=y
+CONFIG_USBHOST_HUB=y
+CONFIG_USBHOST_MSC=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/sama5/giant-board/configs/nsh/defconfig b/boards/arm/sama5/giant-board/configs/nsh/defconfig
new file mode 100644
index 0000000..facaec1
--- /dev/null
+++ b/boards/arm/sama5/giant-board/configs/nsh/defconfig
@@ -0,0 +1,76 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_AUDIO_FORMAT_MP3 is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_SAMA5_UART0 is not set
+# CONFIG_SAMA5_UHPHS_RHPORT1 is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="giant-board"
+CONFIG_ARCH_BOARD_GIANT_BOARD=y
+CONFIG_ARCH_CHIP="sama5"
+CONFIG_ARCH_CHIP_ATSAMA5D27=y
+CONFIG_ARCH_CHIP_SAMA5=y
+CONFIG_ARCH_CHIP_SAMA5D2=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_AUDIO=y
+CONFIG_AUDIO_NUM_BUFFERS=8
+CONFIG_BOARD_LOOPSPERMSEC=65775
+CONFIG_BOOT_RUNFROMSDRAM=y
+CONFIG_BUILTIN=y
+CONFIG_DEV_ZERO=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FS_FAT=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HIDKBD_POLLUSEC=80000
+CONFIG_I2S=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard"
+CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y
+CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAMLOG=y
+CONFIG_RAMLOG_BUFSIZE=16384
+CONFIG_RAMLOG_SYSLOG=y
+CONFIG_RAM_SIZE=268435456
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_VSTART=0x20000000
+CONFIG_RR_INTERVAL=200
+CONFIG_SAMA5_BOOT_SDRAM=y
+CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
+CONFIG_SAMA5_DDRCS_RESERVE=y
+CONFIG_SAMA5_EHCI=y
+CONFIG_SAMA5_OHCI=y
+CONFIG_SAMA5_PIO_IRQ=y
+CONFIG_SAMA5_RTC=y
+CONFIG_SAMA5_TRNG=y
+CONFIG_SAMA5_UART1=y
+CONFIG_SAMA5_UHPHS=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_WAITPID=y
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_NXPLAYER=y
+CONFIG_UART1_SERIAL_CONSOLE=y
+CONFIG_UBOOT_UIMAGE=y
+CONFIG_UIMAGE_ENTRY_POINT=0x20008040
+CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
+CONFIG_USBHOST_HIDKBD=y
+CONFIG_USBHOST_MSC=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/sama5/giant-board/configs/sdmmc-net-nsh/defconfig b/boards/arm/sama5/giant-board/configs/sdmmc-net-nsh/defconfig
new file mode 100644
index 0000000..7dfea4e
--- /dev/null
+++ b/boards/arm/sama5/giant-board/configs/sdmmc-net-nsh/defconfig
@@ -0,0 +1,151 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="giant-board"
+CONFIG_ARCH_BOARD_GIANT_BOARD=y
+CONFIG_ARCH_CHIP="sama5"
+CONFIG_ARCH_CHIP_ATSAMA5D27=y
+CONFIG_ARCH_CHIP_SAMA5=y
+CONFIG_ARCH_CHIP_SAMA5D2=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_AUDIO=y
+CONFIG_AUDIO_NUM_BUFFERS=8
+CONFIG_BOARDCTL_ROMDISK=y
+CONFIG_BOARD_LOOPSPERMSEC=65775
+CONFIG_BOOT_RUNFROMSDRAM=y
+CONFIG_BUILTIN=y
+CONFIG_CDCACM=y
+CONFIG_CONSOLE_SYSLOG=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEV_LOOP=y
+CONFIG_DEV_ZERO=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_TCPBLASTER=y
+CONFIG_EXAMPLES_TCPECHO=y
+CONFIG_EXAMPLES_UDPBLASTER=y
+CONFIG_EXAMPLES_WGET=y
+CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FS_AUTOMOUNTER=y
+CONFIG_FS_BINFS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FATTIME=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_FS_TMPFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HIDKBD_POLLUSEC=80000
+CONFIG_I2S=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IOB_NBUFFERS=72
+CONFIG_IOB_THROTTLE=16
+CONFIG_MAX_TASKS=16
+CONFIG_NETDB_BUFSIZE=128
+CONFIG_NETINIT_NETLOCAL=y
+CONFIG_NETINIT_NOMAC=y
+CONFIG_NETUTILS_TELNETC=y
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NET_ARP_IPIN=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_CDCECM=y
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_LOOPBACK=y
+CONFIG_NET_ROUTE=y
+CONFIG_NET_SENDFILE=y
+CONFIG_NET_SOLINGER=y
+CONFIG_NET_STATISTICS=y
+CONFIG_NET_TCP=y
+CONFIG_NET_TCPBACKLOG=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_KEEPALIVE=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_WRITE_BUFFERS=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_PROMPT_STRING="nsh> "
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAMLOG=y
+CONFIG_RAMLOG_BUFSIZE=16384
+CONFIG_RAMLOG_SYSLOG=y
+CONFIG_RAM_SIZE=268435456
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_VSTART=0x20000000
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV="/dev/mmcsd0"
+CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT="/mnt/mmcsd0"
+CONFIG_SAMA5D27_SDMMC1_MOUNT=y
+CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV="/dev/mmcsd1"
+CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT="/mnt/mmcsd1"
+CONFIG_SAMA5_BOOT_SDRAM=y
+CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
+CONFIG_SAMA5_DDRCS_RESERVE=y
+CONFIG_SAMA5_EHCI=y
+CONFIG_SAMA5_HSMC=y
+CONFIG_SAMA5_OHCI=y
+CONFIG_SAMA5_PIOA_IRQ=y
+CONFIG_SAMA5_PIOB_IRQ=y
+CONFIG_SAMA5_PIOC_IRQ=y
+CONFIG_SAMA5_PIO_IRQ=y
+CONFIG_SAMA5_RTC=y
+CONFIG_SAMA5_SDMMC0=y
+CONFIG_SAMA5_SDMMC0_SIZE=1073741824
+CONFIG_SAMA5_SDMMC=y
+CONFIG_SAMA5_TRNG=y
+CONFIG_SAMA5_UART1=y
+CONFIG_SAMA5_UDPHS=y
+CONFIG_SAMA5_UHPHS=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_LPNTHREADS=2
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_SIG_EVTHREAD=y
+CONFIG_START_DAY=31
+CONFIG_START_MONTH=7
+CONFIG_START_YEAR=2014
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_SYSTEM_VI=y
+CONFIG_TTY_SIGINT=y
+CONFIG_TTY_SIGSTP=y
+CONFIG_UART1_SERIAL_CONSOLE=y
+CONFIG_UBOOT_UIMAGE=y
+CONFIG_UIMAGE_ENTRY_POINT=0x20008040
+CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
+CONFIG_USBDEV=y
+CONFIG_USBDEV_DMA=y
+CONFIG_USBDEV_DUALSPEED=y
+CONFIG_USBDEV_TRACE=y
+CONFIG_USBDEV_TRACE_NRECORDS=512
+CONFIG_USBHOST_CDCACM=y
+CONFIG_USBHOST_COMPOSITE=y
+CONFIG_USBHOST_HIDKBD=y
+CONFIG_USBHOST_HUB=y
+CONFIG_USBHOST_MSC=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/sama5/giant-board/configs/sdmmcnsh/defconfig b/boards/arm/sama5/giant-board/configs/sdmmcnsh/defconfig
new file mode 100644
index 0000000..5e5a24e
--- /dev/null
+++ b/boards/arm/sama5/giant-board/configs/sdmmcnsh/defconfig
@@ -0,0 +1,138 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_AUDIO_FORMAT_MP3 is not set
+# CONFIG_DISABLE_OS_API is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_CMDPARMS is not set
+# CONFIG_SAMA5_UART0 is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="giant-board"
+CONFIG_ARCH_BOARD_GIANT_BOARD=y
+CONFIG_ARCH_CHIP="sama5"
+CONFIG_ARCH_CHIP_ATSAMA5D27=y
+CONFIG_ARCH_CHIP_SAMA5=y
+CONFIG_ARCH_CHIP_SAMA5D2=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_AUDIO=y
+CONFIG_AUDIO_NUM_BUFFERS=8
+CONFIG_BOARDCTL_ROMDISK=y
+CONFIG_BOARD_LOOPSPERMSEC=65775
+CONFIG_BOOT_RUNFROMSDRAM=y
+CONFIG_BUILTIN=y
+CONFIG_CONSOLE_SYSLOG=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEV_LOOP=y
+CONFIG_DEV_ZERO=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXAMPLES_TCPBLASTER=y
+CONFIG_EXAMPLES_TCPECHO=y
+CONFIG_EXAMPLES_WGET=y
+CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FS_AUTOMOUNTER=y
+CONFIG_FS_FAT=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HIDKBD_POLLUSEC=80000
+CONFIG_I2S=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IOB_NBUFFERS=72
+CONFIG_IOB_THROTTLE=16
+CONFIG_MAX_TASKS=16
+CONFIG_NETDB_BUFSIZE=128
+CONFIG_NETINIT_NETLOCAL=y
+CONFIG_NETINIT_NOMAC=y
+CONFIG_NETUTILS_TELNETC=y
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NET_ARP_IPIN=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_CDCECM=y
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_ROUTE=y
+CONFIG_NET_STATISTICS=y
+CONFIG_NET_TCP=y
+CONFIG_NET_TCPBACKLOG=y
+CONFIG_NET_TCP_NOTIFIER=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_UDP=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_PROMPT_STRING="nsh> "
+CONFIG_NSH_QUOTE=y
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=268435456
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_VSTART=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV="/dev/mmcsd0"
+CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT="/mnt/mmcsd0"
+CONFIG_SAMA5D27_SDMMC1_MOUNT=y
+CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV="/dev/mmcsd1"
+CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT="/mnt/mmcsd1"
+CONFIG_SAMA5_BOOT_SDRAM=y
+CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
+CONFIG_SAMA5_DDRCS_RESERVE=y
+CONFIG_SAMA5_EHCI=y
+CONFIG_SAMA5_HSMC=y
+CONFIG_SAMA5_OHCI=y
+CONFIG_SAMA5_PIOA_IRQ=y
+CONFIG_SAMA5_PIOB_IRQ=y
+CONFIG_SAMA5_PIOC_IRQ=y
+CONFIG_SAMA5_PIO_IRQ=y
+CONFIG_SAMA5_RTC=y
+CONFIG_SAMA5_SDMMC0=y
+CONFIG_SAMA5_SDMMC0_SIZE=1073741824
+CONFIG_SAMA5_SDMMC=y
+CONFIG_SAMA5_TRNG=y
+CONFIG_SAMA5_UART1=y
+CONFIG_SAMA5_UDPHS=y
+CONFIG_SAMA5_UHPHS=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_LPNTHREADS=2
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SERIAL_TERMIOS=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_SIG_EVTHREAD=y
+CONFIG_START_DAY=31
+CONFIG_START_MONTH=7
+CONFIG_START_YEAR=2014
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSLOG_TIMESTAMP=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_SYSTEM_VI=y
+CONFIG_TTY_SIGINT=y
+CONFIG_TTY_SIGSTP=y
+CONFIG_UART1_SERIAL_CONSOLE=y
+CONFIG_USBDEV=y
+CONFIG_USBDEV_DMA=y
+CONFIG_USBDEV_DUALSPEED=y
+CONFIG_USBDEV_TRACE=y
+CONFIG_USBDEV_TRACE_NRECORDS=512
+CONFIG_USBHOST_HIDKBD=y
+CONFIG_USBHOST_MSC=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/sama5/giant-board/helpers/netusb-up.sh b/boards/arm/sama5/giant-board/helpers/netusb-up.sh
new file mode 100755
index 0000000..28bb698
--- /dev/null
+++ b/boards/arm/sama5/giant-board/helpers/netusb-up.sh
@@ -0,0 +1,57 @@
+#!/bin/bash
+############################################################################
+# boards/arm/sama5/giant-board/helpers/netusb-up.sh
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################/
+
+set -x
+
+# This script can be used to set up the USB Ethernet Gadget interfaces
+# on Linux. Tested on Ubuntu 19.10, kernel 5.3.0-24-generic
+#
+# You may have to change the IF_HOST variable to match your network interface.
+
+# USB Ethernet Gadget interface
+IF_USB=usb0
+# external interface
+IF_HOST=wlp0s20f3
+
+IP_NET="10.0.0.0/24"
+IP_NETMASK="255.255.255.0"
+IP_BROADCAST="10.0.0.255"
+IP_HOST="10.0.0.1"
+IP_NUTTX="10.0.0.2"
+
+sudo ifconfig $IF_USB up
+ifconfig -a
+sudo ifconfig $IF_USB add $IP_HOST
+sudo ifconfig $IF_USB:0 broadcast $IP_BROADCAST netmask $IP_NETMASK
+sudo ip route delete $IP_NET
+ip route add $IP_NET dev $IF_USB src $IP_HOST
+sudo ip route add $IP_NET dev $IF_USB src $IP_HOST
+sudo ip route add $IP_NUTTX/32 dev ens35u2 src $IP_HOST
+
+# nat to allow NuttX to access the internet
+sudo iptables -t nat -A POSTROUTING -o $IF_HOST -j MASQUERADE
+sudo iptables -A FORWARD -i $IF_HOST -o $IF_USB -m state --state RELATED,ESTABLISHED -j ACCEPT
+sudo iptables -A FORWARD -i $IF_USB -o $IF_HOST -j ACCEPT
+
+ip route show
+
+# pinging the nuttx system should work now
+ping -c 1 $IP_NUTTX
diff --git a/boards/arm/sama5/giant-board/include/.gitignore b/boards/arm/sama5/giant-board/include/.gitignore
new file mode 100644
index 0000000..c8c7108
--- /dev/null
+++ b/boards/arm/sama5/giant-board/include/.gitignore
@@ -0,0 +1 @@
+/boot_romfsimg.h
diff --git a/boards/arm/sama5/giant-board/include/board.h b/boards/arm/sama5/giant-board/include/board.h
new file mode 100644
index 0000000..a0d672b
--- /dev/null
+++ b/boards/arm/sama5/giant-board/include/board.h
@@ -0,0 +1,195 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H
+#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdbool.h>
+# include <nuttx/irq.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
+ * These definitions will configure operational clocking.
+ */
+
+/* On-board crystal frequencies */
+
+#define BOARD_MAINOSC_FREQUENCY (24000000) /* MAINOSC: 12MHz crystal on-board */
+#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
+
+#if defined(CONFIG_SAMA5_BOOT_SDRAM)
+/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate
+ * bootloader.
+ * That bootloader had to have already configured the PLL and SDRAM for
+ * proper operation.
+ *
+ * In this case, we do not reconfigure the clocking.
+ * Rather, we need to query the register settings to determine the clock
+ * frequencies.
+ * We can only assume that the Main clock source is the on-board 24MHz
+ * crystal.
+ */
+
+# include <arch/board/board_sdram.h>
+
+#elif defined(CONFIG_GIANT_BOARD_492MHZ)
+
+/* This configuration results in a CPU clock of 492MHz.
+ *
+ * In this configuration, UPLL is the source of the UHPHS clock (if enabled).
+ */
+
+# include <arch/board/board_492mhz.h>
+
+#endif
+
+/* LED definitions **********************************************************/
+
+/* There is a status LED on board the Giant Board.
+ *
+ * ------------------------------ ------------------- ---------------------
+ * SAMA5D27 PIO SIGNAL USAGE
+ * ------------------------------ ------------------- ---------------------
+ * PA6 STATUS_LED Orange LED
+ * ------------------------------ ------------------- ---------------------
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_ORANGE 0
+#define BOARD_NLEDS 1
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_ORANGE_BIT (1 << BOARD_ORANGE)
+
+/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
+ * defined. In that case, the usage by the board port is defined in
+ * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
+ * events as follows. Note that only the GREEN LED is used in this case
+ *
+ * SYMBOL Val Meaning Green LED
+ * ----------------- --- ----------------------- -----------
+ */
+
+#define LED_STARTED 0 /* NuttX has been started OFF */
+#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
+#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
+#define LED_STACKCREATED 1 /* Idle stack created ON */
+#define LED_INIRQ 2 /* In an interrupt N/C */
+#define LED_SIGNAL 2 /* In a signal handler N/C */
+#define LED_ASSERTION 2 /* An assertion failed N/C */
+#define LED_PANIC 3 /* The system has crashed Flash */
+#undef LED_IDLE /* MCU is is sleep mode Not used */
+
+/* Thus if the Orange LED is statically on, NuttX has successfully booted
+ * and is, apparently, running normally.
+ * If LED is flashing at approximately 2Hz, then a fatal error has been
+ * detected and the system has halted.
+ */
+
+/* Pin disambiguation *******************************************************/
+
+/* Alternative pin selections are provided with a numeric suffix like _1, _2,
+ * etc. Drivers, however, will use the pin selection without the numeric
+ * suffix.
+ * Additional definitions are required in this board.h file.
+ * For example, if we wanted the PCK0on PB26, then the following definition
+ * should appear in the board.h header file for that board:
+ *
+ * #define PIO_PMC_PCK0 PIO_PMC_PCK0_1
+ *
+ * The PCK logic will then automatically configure PB26 as the PCK0 pin.
+ */
+
+/* UART1. There is a TTL serial connection available on
+ * pins RX and TX. This is be driven by UART1.
+ *
+ * ---- ------------------------ -------------
+ * J1/2 SCHEMATIC SAMA5D2
+ * PIN NAME(s) PIO FUNCTION
+ * ---- ------------------------ -------------
+ * 14 UART1_RX PD3 UTXD1
+ * 15 UART1_TX PD2 URXD1
+ * ---- ------------------------ -------------
+ */
+
+#define PIO_UART1_RXD PIO_UART1_RXD_1
+#define PIO_UART1_TXD PIO_UART1_TXD_1
+
+/* FLEXCOM4 is available as a UART.
+ *
+ * ----- ------- -------------
+ * J1/2 BOARD SAMA5D2
+ * PIN NAME PIO FUNCTION
+ * ----- ------- -------------
+ * 6 AD2 PD21 FLEXCOM4
+ * 9 AD3 PD22 FLEXCOM4
+ * ----- ------- -------------
+ */
+
+#define PIO_FLEXCOM4_IO0 PIO_FLEXCOM4_IO0_2
+#define PIO_FLEXCOM4_IO1 PIO_FLEXCOM4_IO1_2
+
+/* PIO pins */
+
+#define PIO_TX IO_
+
+/* SDIO - Used for both Port 0 & 1 ******************************************/
+
+/* 386 KHz for initial inquiry stuff */
+
+#define BOARD_SDMMC_IDMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV256
+#define BOARD_SDMMC_IDMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(2)
+
+/* 24.8MHz for other modes */
+
+#define BOARD_SDMMC_MMCMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
+#define BOARD_SDMMC_MMCMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
+
+#define BOARD_SDMMC_SD1MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
+#define BOARD_SDMMC_SD1MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
+
+#define BOARD_SDMMC_SD4MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
+#define BOARD_SDMMC_SD4MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
+
+/****************************************************************************
+ * Assembly Language Macros
+ ****************************************************************************/
+
+#ifdef __ASSEMBLY__
+ .macro config_sdram
+ .endm
+#endif /* __ASSEMBLY__ */
+
+#endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H */
diff --git a/boards/arm/sama5/giant-board/include/board_492mhz.h b/boards/arm/sama5/giant-board/include/board_492mhz.h
new file mode 100644
index 0000000..9e3068e
--- /dev/null
+++ b/boards/arm/sama5/giant-board/include/board_492mhz.h
@@ -0,0 +1,207 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/include/board_492mhz.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_492MHZ_H
+#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_492MHZ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
+ * These definitions will configure operational clocking.
+ *
+ * This configuration results in a CPU clock of 492MHz:
+ *
+ * MAINOSC: Frequency = 24MHz (crystal)
+ * PLLA: PLL Multiplier = 40+1 to generate PLLACK = 984MHz
+ * Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 6 to generate
+ * MCK = 164MHz
+ * CPU clock = 492MHz
+ */
+
+/* Main oscillator register settings.
+ *
+ * The start up time should be should be:
+ * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles.
+ */
+
+#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
+#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
+#define BOARD_CKGR_PLLAR_OUT (0)
+#define BOARD_CKGR_PLLAR_MUL (40 << PMC_CKGR_PLLAR_MUL_SHIFT)
+
+/* PMC master clock register settings.
+ *
+ * Master/Processor Clock Source Selection = PLLA
+ * Master/Processor Clock Prescaler = 1
+ * PLLA Divider = 1
+ * Master Clock Division (MDIV) = 6
+ *
+ * NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3.
+ *
+ * Prescaler input = 984MHz / 1 = 984MHz
+ * Prescaler output = 984MHz / 1 = 984MHz
+ * Processor Clock (PCK) = 984Mhz / 2 = 492MHz
+ * Master clock (MCK) = 984MHz / 6 = 164Mhz
+ */
+
+#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA
+#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1
+#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1
+#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4
+
+/* ADC Configuration
+ *
+ * ADCClock = MCK / ((PRESCAL+1) * 2)
+ *
+ * Given:
+ * MCK = 164MHz
+ * ADCClock = 8MHz
+ * Then:
+ * PRESCAL = 20.5
+ *
+ * PRESCAL=20 and MCK=164MHz yields ADC clock of 8.2MHz
+ */
+
+#define BOARD_ADC_PRESCAL (20)
+#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
+#define BOARD_TSD_TRACKTIM (2000) /* Min 1�s at 8MHz */
+#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
+
+/* Resulting frequencies */
+
+/* Giant Board
+ *
+ * Crystal frequency: 24 MHz
+ * CPU clock: 492 MHz
+ * Master clock: 164 MHz
+ */
+
+#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
+#define BOARD_PLLA_FREQUENCY (984000000) /* PLLACK: 41 * 24Mhz / 1 */
+#define BOARD_PCK_FREQUENCY (492000000) /* CPU: PLLACK / 2 / 1 */
+#define BOARD_MCK_FREQUENCY (164000000) /* MCK: PLLACK / 1 / 1 / 3 */
+#define BOARD_ADCCLK_FREQUENCY (10250000) /* ADCCLK: MCK / ((7+1)*2) */
+
+/* Clocking to certain peripherals may be MCK/2.
+ *
+ * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
+ */
+
+#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
+#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
+#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
+
+#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
+ defined(CONFIG_SAMA5_UDPHS)
+
+/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded
+ * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL
+ * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either
+ * the 12MHz internal RC oscillator on a an external 12MHz crystal. The
+ * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier.
+ *
+ * For High-speed operations, the user has to perform the following:
+ *
+ * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in
+ * PMC_PCER register.
+ * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register.
+ * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
+ * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
+ * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
+ * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB
+ * register.
+ * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
+ * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is
+ * selected.
+ * 8) Enable OHCI clocks, UHP bit in PMC_SCER register.
+ *
+ * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI
+ * driver is initialized.
+ */
+
+# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */
+# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */
+# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */
+# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */
+#endif
+
+/* HSMCI clocking
+ *
+ * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
+ * divided by (2*(CLKDIV) + CLOCKODD + 2).
+ *
+ * MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2)
+ *
+ * Where CLKDIV has a range of 0-255.
+ */
+
+/* MCK = 132MHz, CLKDIV = 164,
+ * MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz
+ */
+
+#define SDMMC_INIT_CLKDIV (164 << SDMMC_MR_CLKDIV_SHIFT)
+
+/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD,
+ * MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz
+ */
+
+#define SDMMC_MMCXFR_CLKDIV ((2 << SDMMC_MR_CLKDIV_SHIFT) | SDMMC_MR_CLKODD)
+
+/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */
+
+#define SDMMC_SDXFR_CLKDIV (2 << SDMMC_MR_CLKDIV_SHIFT)
+#define SDMMC_SDWIDEXFR_CLKDIV SDMMC_SDXFR_CLKDIV
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_492MHZ_H */
diff --git a/boards/arm/sama5/giant-board/include/board_memorymap.h b/boards/arm/sama5/giant-board/include/board_memorymap.h
new file mode 100644
index 0000000..4ac8791
--- /dev/null
+++ b/boards/arm/sama5/giant-board/include/board_memorymap.h
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/include/board_memorymap.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_MEMORYMAP_H
+#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_MEMORYMAP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_MEMORYMAP_H */
diff --git a/boards/arm/sama5/giant-board/include/board_sdram.h b/boards/arm/sama5/giant-board/include/board_sdram.h
new file mode 100644
index 0000000..c61bb5f
--- /dev/null
+++ b/boards/arm/sama5/giant-board/include/board_sdram.h
@@ -0,0 +1,167 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/include/board_sdram.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_SDRAM_H
+#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_SDRAM_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include "sam_pmc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* After power-on reset, the SAMA5 device is running on a 24MHz internal RC.
+ * When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate
+ * bootloader. That bootloader had to have already configured the PLL
+ * and SDRAM for proper operation.
+ *
+ * In this case, we do not reconfigure the clocking.
+ * Rather, we need to query the register settings to determine the clock
+ * frequencies.
+ * We can only assume that the Main clock source is the on-board 12MHz
+ * crystal.
+ */
+
+#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
+#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
+#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
+#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
+#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
+
+/* Clocking to certain peripherals may be MCK/2.
+ *
+ * REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
+ */
+
+#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
+#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
+#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
+
+#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
+ defined(CONFIG_SAMA5_UDPHS)
+
+/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded
+ * High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL
+ * (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either
+ * the 12MHz internal RC oscillator on a an external 12MHz crystal. The
+ * Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier.
+ *
+ * For High-speed operations, the user has to perform the following:
+ *
+ * 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in
+ * PMC_PCER register.
+ * 2) Write CKGR_PLLCOUNT field in PMC_UCKR register.
+ * 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
+ * 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
+ * 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
+ * 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB
+ * register.
+ * 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
+ * PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is
+ * selected.
+ * 8) Enable OHCI clocks, UHP bit in PMC_SCER register.
+ *
+ * Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI
+ * driver is initialized.
+ */
+
+# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */
+# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */
+# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */
+# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */
+#endif
+
+/* ADC Configuration
+ *
+ * ADCClock = MCK / ((PRESCAL+1) * 2)
+ * PRESCAL = (MCK / (2 * ADCClock) - 1)
+ */
+
+#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
+#define BOARD_ADCCLK_FREQUENCY \
+ ((BOARD_PLLADIV2_FREQUENCY / (2 *BOARD_PLLADIV2_FREQUENCY)) - 1)
+
+#define BOARD_ADC_PRESCAL (7)
+#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
+#define BOARD_TSD_TRACKTIM (2000) /* Min 1�s at 8MHz */
+#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
+
+/* SDMMC clocking
+ *
+ * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
+ * divided by (2*(CLKDIV) + CLOCKODD + 2).
+ *
+ * CLKFULLDIV = 2*CLKDIV + CLOCKODD;
+ * MCI_SPEED = MCK / (CLKFULLDIV + 2)
+ * CLKFULLDIV = MCK / MCI_SPEED - 2
+ *
+ * CLKDIV = CLKFULLDIV >> 1
+ * CLOCKODD = CLKFULLDIV & 1
+ *
+ * Where CLKDIV has a range of 0-255.
+ */
+
+/* Initial clock: 400 KHz (target) */
+
+#define HSMCI_INIT_CLKDIV sam_hsmci_clkdiv(400000)
+
+/* MMC transfer clock: 20 MHz (target) */
+
+#define HSMCI_MMCXFR_CLKDIV sam_hsmci_clkdiv(20000000)
+
+/* SD transfer clock: 25 MHz (target) */
+
+#define HSMCI_SDXFR_CLKDIV sam_hsmci_clkdiv(25000000)
+
+#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_SDRAM_H */
diff --git a/boards/arm/sama5/giant-board/scripts/Make.defs b/boards/arm/sama5/giant-board/scripts/Make.defs
new file mode 100644
index 0000000..4e6817f
--- /dev/null
+++ b/boards/arm/sama5/giant-board/scripts/Make.defs
@@ -0,0 +1,88 @@
+############################################################################
+# boards/arm/sama5/giant-board/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################/
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/arch/arm/src/armv7-a/Toolchain.defs
+
+ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y)
+ LDSCRIPT = isram.ld
+endif
+
+ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
+ifeq ($(CONFIG_SAMA5D2XULT_DRAM_BOOT),y)
+ LDSCRIPT = dramboot.ld
+else
+ LDSCRIPT = uboot.ld
+endif
+endif
+
+ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
+ ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
+else
+ ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+endif
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+# NXFLAT module definitions
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# ELF module definitions
+
+CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
+
+LDELFFLAGS = -r -e main
+ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
+ LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
+else
+ LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld
+endif
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
diff --git a/boards/arm/sama5/giant-board/scripts/dramboot.ld b/boards/arm/sama5/giant-board/scripts/dramboot.ld
new file mode 100644
index 0000000..c37f48e
--- /dev/null
+++ b/boards/arm/sama5/giant-board/scripts/dramboot.ld
@@ -0,0 +1,123 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/scripts/dramboot.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The SAMA5D27C-D1G has 128 KB of ISRAM beginning at virtual address 0x0020:0000.
+ * This memory configuration, however, loads into the 256MB SDRAM on board
+ * the SAMA5D27C-D1G which lies at 0x2000:0000.
+ *
+ * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
+ * high end of ISRAM for the page table.
+ */
+
+MEMORY
+{
+ isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K
+ sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 128M
+}
+
+ENTRY(entry)
+ENTRY(_stext)
+
+SECTIONS
+{
+ .text :
+ {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ *(.ARM.extab*)
+ *(.gnu.linkonce.armextab.*)
+ _etext = ABSOLUTE(.);
+ } > sdram
+
+ .init_section :
+ {
+ _sinit = ABSOLUTE(.);
+ *(.init_array .init_array.*)
+ _einit = ABSOLUTE(.);
+ } > sdram
+
+ .ARM.extab :
+ {
+ *(.ARM.extab*)
+ } > sdram
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+
+ PROVIDE_HIDDEN (__exidx_start = .);
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > sdram
+ PROVIDE_HIDDEN (__exidx_end = .);
+
+ .data :
+ {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > sdram
+
+ .bss :
+ {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = ABSOLUTE(.);
+ } > sdram
+
+ /* Uninitialized data */
+
+ .noinit :
+ {
+ _snoinit = ABSOLUTE(.);
+ *(.noinit*)
+ _enoinit = ABSOLUTE(.);
+ } > sdram
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/sama5/giant-board/scripts/gnu-elf.ld b/boards/arm/sama5/giant-board/scripts/gnu-elf.ld
new file mode 100644
index 0000000..5732749
--- /dev/null
+++ b/boards/arm/sama5/giant-board/scripts/gnu-elf.ld
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/scripts/gnu-elf.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+SECTIONS
+{
+ .text 0x00000000 :
+ {
+ _stext = . ;
+ *(.text)
+ *(.text.*)
+ *(.gnu.warning)
+ *(.stub)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.jcr)
+
+ /* C++ support: The .init and .fini sections contain specific logic
+ * to manage static constructors and destructors.
+ */
+
+ *(.gnu.linkonce.t.*)
+ *(.init) /* Old ABI */
+ *(.fini) /* Old ABI */
+ _etext = . ;
+ }
+
+ .rodata :
+ {
+ _srodata = . ;
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ _erodata = . ;
+ }
+
+ .data :
+ {
+ _sdata = . ;
+ *(.data)
+ *(.data1)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ . = ALIGN(4);
+ _edata = . ;
+ }
+
+ /* Uninitialized data */
+
+ .noinit :
+ {
+ _snoinit = . ;
+ *(.noinit*)
+ _enoinit = . ;
+ }
+
+ /* C++ support. For each global and static local C++ object,
+ * GCC creates a small subroutine to construct the object. Pointers
+ * to these routines (not the routines themselves) are stored as
+ * simple, linear arrays in the .ctors section of the object file.
+ * Similarly, pointers to global/static destructor routines are
+ * stored in .dtors.
+ */
+
+ .ctors :
+ {
+ _sctors = . ;
+ *(.ctors) /* Old ABI: Unallocated */
+ *(.init_array) /* New ABI: Allocated */
+ _edtors = . ;
+ }
+
+ .dtors :
+ {
+ _sdtors = . ;
+ *(.dtors) /* Old ABI: Unallocated */
+ *(.fini_array) /* New ABI: Allocated */
+ _edtors = . ;
+ }
+
+ .bss :
+ {
+ _sbss = . ;
+ *(.bss)
+ *(.bss.*)
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.b*)
+ *(COMMON)
+ _ebss = . ;
+ }
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/sama5/giant-board/scripts/isram.ld b/boards/arm/sama5/giant-board/scripts/isram.ld
new file mode 100644
index 0000000..bb3e2dd
--- /dev/null
+++ b/boards/arm/sama5/giant-board/scripts/isram.ld
@@ -0,0 +1,119 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/scripts/isram.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The SAMA5D27C-D1G has 128 KB of ISRAM beginning at virtual address 0x0020:0000.
+ *
+ * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
+ * high end of ISRAM for the page table.
+ */
+
+MEMORY
+{
+ isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K
+}
+
+ENTRY(entry)
+ENTRY(_stext)
+
+SECTIONS
+{
+ .text :
+ {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ *(.ARM.extab*)
+ *(.gnu.linkonce.armextab.*)
+ _etext = ABSOLUTE(.);
+ } > isram
+
+ .init_section :
+ {
+ _sinit = ABSOLUTE(.);
+ *(.init_array .init_array.*)
+ _einit = ABSOLUTE(.);
+ } > isram
+
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } > isram
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+
+ PROVIDE_HIDDEN (__exidx_start = .);
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > isram
+ PROVIDE_HIDDEN (__exidx_end = .);
+
+ .data :
+ {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > isram
+
+ .bss :
+ {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = ABSOLUTE(.);
+ } > isram
+
+ /* Uninitialized data */
+
+ .noinit :
+ {
+ _snoinit = ABSOLUTE(.);
+ *(.noinit*)
+ _enoinit = ABSOLUTE(.);
+ } > isram
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/sama5/giant-board/scripts/uboot.ld b/boards/arm/sama5/giant-board/scripts/uboot.ld
new file mode 100644
index 0000000..e661748
--- /dev/null
+++ b/boards/arm/sama5/giant-board/scripts/uboot.ld
@@ -0,0 +1,124 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/scripts/uboot.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The SAMA5D27C-D1G has 128 KB of ISRAM beginning at virtual address 0x0020:0000.
+ * This memory configuration, however, loads into the 256MB SDRAM on board
+ * the SAMA5D27C-D1G which lies at 0x2000:0000. An offset 0x00008000 is
+ * reserved for used by the U-boot bootloader.
+ *
+ * Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
+ * high end of ISRAM for the page table.
+ */
+
+MEMORY
+{
+ isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K
+ sdram (W!RX) : ORIGIN = 0x20008000, LENGTH = 128M - 32K
+}
+
+ENTRY(entry)
+ENTRY(_stext)
+
+SECTIONS
+{
+ .text :
+ {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ *(.ARM.extab*)
+ *(.gnu.linkonce.armextab.*)
+ _etext = ABSOLUTE(.);
+ } > sdram
+
+ .init_section :
+ {
+ _sinit = ABSOLUTE(.);
+ *(.init_array .init_array.*)
+ _einit = ABSOLUTE(.);
+ } > sdram
+
+ .ARM.extab :
+ {
+ *(.ARM.extab*)
+ } > sdram
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+
+ PROVIDE_HIDDEN (__exidx_start = .);
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > sdram
+ PROVIDE_HIDDEN (__exidx_end = .);
+
+ .data :
+ {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > sdram
+
+ .bss :
+ {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = ABSOLUTE(.);
+ } > sdram
+
+ /* Uninitialized data */
+
+ .noinit :
+ {
+ _snoinit = ABSOLUTE(.);
+ *(.noinit*)
+ _enoinit = ABSOLUTE(.);
+ } > sdram
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/sama5/giant-board/src/Makefile b/boards/arm/sama5/giant-board/src/Makefile
new file mode 100644
index 0000000..306635a
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/Makefile
@@ -0,0 +1,105 @@
+############################################################################
+# boards/arm/sama5/giant-board/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################/
+
+include $(TOPDIR)/Make.defs
+
+CSRCS = sam_boot.c
+
+ifeq ($(CONFIG_SAMA5_SPI0),y)
+CSRCS += sam_spi.c
+else
+ifeq ($(CONFIG_SAMA5_SPI1),y)
+CSRCS += sam_spi.c
+endif
+endif
+
+ifeq ($(CONFIG_SAMA5_DDRCS),y)
+CSRCS += sam_sdram.c
+endif
+
+ifeq ($(CONFIG_SAMA5_SDMMC0),y)
+CSRCS += sam_sdmmc.c
+else
+ifeq ($(CONFIG_SAMA5_SDMMC1),y)
+CSRCS += sam_sdmmc.c
+endif
+
+endif
+ifeq ($(CONFIG_SAMA5_HSMCI0),y)
+CSRCS += sam_hsmci.c
+else
+ifeq ($(CONFIG_SAMA5_HSMCI1),y)
+CSRCS += sam_hsmci.c
+endif
+endif
+
+ifeq ($(CONFIG_SAMA5_UHPHS),y)
+CSRCS += sam_usb.c
+else
+ifeq ($(CONFIG_SAMA5_UDPHS),y)
+CSRCS += sam_usb.c
+endif
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += sam_appinit.c
+CSRCS += sam_bringup.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += sam_adc.c
+ifeq ($(CONFIG_AJOYSTICK),y)
+CSRCS += sam_ajoystick.c
+endif
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += sam_pwm.c
+endif
+
+ifeq ($(CONFIG_AUDIO_I2SCHAR),y)
+ifeq ($(CONFIG_SAMA5_SSC0),y)
+CSRCS += sam_i2schar.c
+else
+ifeq ($(CONFIG_SAMA5_SSC1),y)
+CSRCS += sam_i2schar.c
+endif
+endif
+endif
+
+ifeq ($(CONFIG_USBMSC),y)
+CSRCS += sam_usbmsc.c
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+CSRCS += sam_ostest.c
+endif
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += sam_autoleds.c
+else
+CSRCS += sam_userleds.c
+endif
+
+ifeq ($(CONFIG_BOARDCTL_RESET),y)
+CSRCS += sam_reset.c
+endif
+
+include $(TOPDIR)/boards/Board.mk
diff --git a/boards/arm/sama5/giant-board/src/giant-board.h b/boards/arm/sama5/giant-board/src/giant-board.h
new file mode 100644
index 0000000..e43c238
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/giant-board.h
@@ -0,0 +1,436 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/giant-board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_SRC_GIANT_BOARD_H
+#define __BOARDS_ARM_SAMA5_GIANT_BOARD_SRC_GIANT_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include <arch/irq.h>
+#include <nuttx/irq.h>
+
+#include "hardware/sam_pinmap.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define HAVE_SDMMC 1
+#define HAVE_USBHOST 1
+#define HAVE_USBDEV 1
+#define HAVE_USBMONITOR 1
+#define HAVE_NETWORK 1
+
+/* SDMMC */
+
+/* Can't support MMC/SD if the card interface(s) are not enable */
+
+#if !defined(CONFIG_SAMA5_SDMMC) && !defined(CONFIG_SAMA5_SDMMC0)
+# undef HAVE_SDMMC
+#endif
+
+/* Can't support MMC/SD features if mountpoints are disabled */
+
+#if defined(HAVE_SDMMC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+# warning Mountpoints disabled. No MMC/SD support
+# undef HAVE_SDMCC
+#endif
+
+/* We need PIO interrupts on PIOD to support card detect interrupts */
+
+#if defined(HAVE_SDMMC) && !defined(CONFIG_SAMA5_PIOA_IRQ)
+# warning PIOA interrupts not enabled. No MMC/SD support.
+# undef HAVE_SDMMC
+#endif
+
+/* MMC/SD minor numbers: The NSH device minor extended is extended to
+ * support two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be:
+ * /dev/mmcsd0 and /dev/mmcsd1.
+ */
+
+#ifndef CONFIG_NSH_MMCSDMINOR
+# define CONFIG_NSH_MMCSDMINOR 0
+#endif
+
+#ifdef HAVE_SDMMC
+
+# if ( defined(CONFIG_SAMA5_SDMMC0) && defined(CONFIG_SAMA5_SDMMC1) )
+# define SDMMC0_SLOTNO 0
+# define SDMMC1_SLOTNO 1
+# else
+# if ( defined(CONFIG_SAMA5_SDMMC0) )
+# define SDMMC0_SLOTNO 0
+# endif
+# if ( defined(CONFIG_SAMA5_SDMMC1) )
+# define SDMMC1_SLOTNO 0
+# endif
+# endif
+
+# ifdef CONFIG_SAMA5_SDMMC0
+# define SDMMC0_MINOR CONFIG_NSH_MMCSDMINOR
+# define SDMMC1_MINOR (CONFIG_NSH_MMCSDMINOR+1)
+# else
+# define SDMMC1_MINOR CONFIG_NSH_MMCSDMINOR
+# endif
+#else
+#endif
+
+/* USB Host / USB Device */
+
+/* Either CONFIG_SAMA5_UHPHS or CONFIG_SAMA5_UDPHS must be defined,
+ * or there is no USB of any kind.
+ */
+
+#if !defined(CONFIG_SAMA5_UHPHS)
+# undef CONFIG_SAMA5_OHCI
+# undef CONFIG_SAMA5_EHCI
+#endif
+
+#if !defined(CONFIG_SAMA5_UDPHS)
+# undef HAVE_USBDEV
+#endif
+
+/* CONFIG_USBDEV and CONFIG_USBHOST must also be defined */
+
+#if !defined(CONFIG_USBDEV)
+# undef HAVE_USBDEV
+#endif
+
+#if defined(CONFIG_USBHOST)
+# if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI)
+# warning CONFIG_USBHOST is defined, but neither CONFIG_SAMA5_OHCI nor CONFIG_SAMA5_EHCI are defined
+# endif
+#else
+# undef CONFIG_SAMA5_OHCI
+# undef CONFIG_SAMA5_EHCI
+#endif
+
+#if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI)
+# undef HAVE_USBHOST
+#endif
+
+/* Check if we should enable the USB monitor before starting NSH */
+
+#ifndef CONFIG_USBMONITOR
+# undef HAVE_USBMONITOR
+#endif
+
+#ifndef HAVE_USBDEV
+# undef CONFIG_USBDEV_TRACE
+#endif
+
+#ifndef HAVE_USBHOST
+# undef CONFIG_USBHOST_TRACE
+#endif
+
+#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE)
+# undef HAVE_USBMONITOR
+#endif
+
+/* Networking */
+
+#if !defined(CONFIG_NET)
+# undef HAVE_NETWORK
+#endif
+
+/* procfs File System */
+
+#ifdef CONFIG_FS_PROCFS
+# ifdef CONFIG_NSH_PROC_MOUNTPOINT
+# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
+# else
+# define SAMA5_PROCFS_MOUNTPOINT "/proc"
+# endif
+#endif
+
+/* Giant Board pinout
+ *
+ * Orientation is on pinout diagram, USB connector up.
+ * https://groboards.com/giant-board/
+ *
+ * The Giant Board doesn't have pin numbers, instead the pins are labeled
+ * with the first function in this list. (AD4, AD2, etc.)
+ *
+ * J1 - left pins
+ *
+ * Reset
+ * 3.3V
+ * VREF
+ * GND
+ * AD4 / PD23
+ * AD2 / PD21
+ * AD1 / PD20
+ * AD5 / PD24
+ * AD3 / PD22
+ * AD0 / PD19
+ * SCK / PA14
+ * MOSI / PA15
+ * MISO / PA16
+ * RX / PD2
+ * TX / PD3
+ * GND
+ *
+ * J2 - right pins
+ *
+ * VBAT
+ * EN
+ * VBUS
+ * PD13
+ * PD31
+ * PWM1 / PB0
+ * PWM3 / PB7
+ * PWML1 / PB1
+ * PWM2 / PB5
+ * PB3 / PWMEXTRG
+ * SCL / PC0
+ * SDA / PB31
+ *
+ */
+
+/* J1 - left pins */
+
+#define GB_PIO_AD4 PIO_ADC_AD4 /* AD4 / PD23 */
+#define GB_PIO_PD23 PIO_ADC_AD4 /* AD4 / PD23 */
+
+#define GB_PIO_AD2 PIO_ADC_AD2 /* AD2 / PD21 */
+#define GB_PIO_PD21 PIO_ADC_AD2 /* AD2 / PD21 */
+
+#define GB_PIO_AD1 PIO_ADC_AD1 /* AD1 / PD20 */
+#define GB_PIO_PD20 PIO_ADC_AD1 /* AD1 / PD20 */
+
+#define GB_PIO_AD5 PIO_ADC_AD5 /* AD5 / PD24 */
+#define GB_PIO_PD24 PIO_ADC_AD5 /* AD5 / PD24 */
+
+#define GB_PIO_AD3 PIO_ADC_AD3 /* AD3 / PD22 */
+#define GB_PIO_PD22 PIO_ADC_AD3 /* AD3 / PD22 */
+
+#define GB_PIO_AD0 PIO_ADC_AD0 /* AD0 / PD19 */
+#define GB_PIO_PD19 PIO_ADC_AD0 /* AD0 / PD19 */
+
+#define GB_PIO_SCK PIO_SPI0_SPCK_1 /* SCK / PA14 */
+#define GB_PIO_PA14 PIO_SPI0_SPCK_1 /* SCK / PA14 */
+
+#define GB_PIO_MOSI PIO_SPI0_MOSI_1 /* MOSI / PA15 */
+#define GB_PIO_PA15 PIO_SPI0_MOSI_1 /* MOSI / PA15 */
+
+#define GB_PIO_MISO PIO_SPI0_MISO_1 /* MISO / PA16 */
+#define GB_PIO_PA16 PIO_SPI0_MISO_1 /* MISO / PA16 */
+
+#define GB_PIO_RX PIO_UART0_TXD /* RX / PD2 */
+#define GB_PIO_PD2 PIO_UART0_TXD /* RX / PD2 */
+
+#define GB_PIO_TX PIO_UART0_RXD /* TX / PD3 */
+#define GB_PIO_PD3 PIO_UART0_RXD /* TX / PD3 */
+
+/* J2 - right pins */
+
+#define GB_PIO_PD13 PIO_TC1_CLK_2 /* PD13 */
+
+#define GB_PIO_PD31 PIO_TC3_CLK_3 /* PD31 */
+
+#define GB_PIO_PWM1 PIO_PWM0_H1 /* PWM1 / PB0 */
+#define GB_PIO_PB0 PIO_PWM0_H1 /* PWM1 / PB0 */
+
+#define GB_PIO_PWM3 PIO_PWM0_H3 /* PWM3 / PB7 */
+#define GB_PIO_PB7 PIO_PWM0_H3 /* PWM3 / PB7 */
+
+#define GB_PIO_PWML1 PIO_PWM0_L1 /* PWML1 / PB1 */
+#define GB_PIO_PB1 PIO_PWM0_L1 /* PWML1 / PB1 */
+
+#define GB_PIO_PWM2 PIO_PWM0_H2 /* PWM2 / PB5 */
+#define GB_PIO_PB5 PIO_PWM0_H2 /* PWM2 / PB5 */
+
+#define GB_PIO_PB3 PIO_PWM0_EXTRG0 /* PB3 / PWMEXTRG */
+#define GB_PIO_PWMEXTRG PIO_PWM0_EXTRG0 /* PB3 / PWMEXTRG */
+
+#define GB_PIO_SCL PIO_TWI0_CK_2 /* SCL / PC0 */
+#define GB_PIO_PC0 PIO_TWI0_CK_2 /* SCL / PC0 */
+
+#define GB_PIO_SDA PIO_TWI0_D_2 /* SDA / PB31 */
+#define GB_PIO_PB31 PIO_TWI0_D_2 /* SDA / PB31 */
+
+/* LEDs *********************************************************************/
+
+/* There is an orange status LED on board the Giant Board
+ * driven by pin (PA6).
+ *
+ * ------------------------------ ------------------- ---------------------
+ * SAMA5D2 PIO SIGNAL USAGE
+ * ------------------------------ ------------------- ---------------------
+ * PA6 STATUS_LED Orange LED
+ * ------------------------------ ------------------- ---------------------
+ */
+
+#define PIO_LED_ORANGE (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \
+ PIO_PORT_PIOA | PIO_PIN6)
+
+/* SDMMC clocking
+ *
+ * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
+ * divided by (2*(CLKDIV+1)).
+ *
+ * MCI_SPEED = MCK / (2*(CLKDIV+1))
+ * CLKDIV = MCI / MCI_SPEED / 2 - 1
+ *
+ * Where CLKDIV has a range of 0-255.
+ */
+
+/* MCK = 96MHz, CLKDIV = 119, MCI_SPEED = 96MHz / 2 * (119+1) = 400 KHz */
+
+#define SDMMC_INIT_CLKDIV (119 << SDMMC_MR_CLKDIV_SHIFT)
+
+/* MCK = 96MHz, CLKDIV = 3, MCI_SPEED = 96MHz / 2 * (3+1) = 12 MHz */
+
+#define SDMMC_MMCXFR_CLKDIV (3 << SDMMC_MR_CLKDIV_SHIFT)
+
+/* MCK = 96MHz, CLKDIV = 1, MCI_SPEED = 96MHz / 2 * (1+1) = 24 MHz */
+
+#define SDMMC_SDXFR_CLKDIV (1 << SDMMC_MR_CLKDIV_SHIFT)
+#define SDMMC_SDWIDEXFR_CLKDIV SDMMC_SDXFR_CLKDIV
+
+/* SDMMC Card Slots *********************************************************/
+
+/* The Giant Board provides a SD memory card slot:
+ * a full size SD card slot (J6)
+ *
+ * The full size SD card slot connects via SDMMC1. The card detect discrete
+ * is available on PA21 (pulled high) and shared with DAT3. The write
+ * protect discrete is not connected and not available to software. The
+ * slot only supports 4-bit wide transfer mode, and the NuttX driver
+ * currently uses only the 4-bit wide transfer mode.
+ *
+ * PA18 SDMMC1_DAT0
+ * PA19 SDMMC1_DAT1
+ * PA20 SDMMC1_DAT2
+ * PA21 SDMMC1_DAT3/SDMMC1_CD
+ * PA22 SDMMC1_CK
+ * PA28 SDMMC1_CMD
+ */
+
+#define IRQ_SDMMC1_CD SAM_IRQ_PA30
+
+/* USB Ports ****************************************************************/
+
+/* The Giant Board features two USB communication ports:
+ *
+ * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with
+ * USB Device High Speed Micro AB connector, J3
+ *
+ * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) High Speed Micro
+ * AB connector, J7
+ *
+ */
+
+/****************************************************************************
+ * Public data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_bringup
+ *
+ * Description:
+ * Bring up board features
+ *
+ ****************************************************************************/
+
+int sam_bringup(void);
+
+/****************************************************************************
+ * Name: sam_sdmmc_initialize
+ *
+ * Description:
+ * Initialize and configure one SDMMC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_SDMMC
+int sam_sdmmc_initialize(int slotno, int minor);
+#endif
+
+/****************************************************************************
+ * Name: sam_cardinserted
+ *
+ * Description:
+ * Check if a card is inserted into the selected SDMMC slot
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_SDMMC
+bool sam_cardinserted(int slotno);
+#endif
+
+/****************************************************************************
+ * Name: sam_writeprotected
+ *
+ * Description:
+ * Check if the card in the MMCSD slot is write protected
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_SDMMC
+bool sam_writeprotected(int slotno);
+#endif
+
+/****************************************************************************
+ * Name: sam_usbinitialize
+ *
+ * Description:
+ * Called from sam_usbinitialize very early in initialization to setup
+ * USB-related PIO pins for the SAMA5D2-XULT board.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS)
+void weak_function sam_usbinitialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ * Called at application startup time to initialize the USB host
+ * functionality.
+ * This function will start a thread that will monitor for device
+ * connection/disconnection events.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_USBHOST
+int sam_usbhost_initialize(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_SAMA5_GIANT_BOARD_SRC_GIANT_BOARD_H */
diff --git a/boards/arm/sama5/giant-board/src/sam_adc.c b/boards/arm/sama5/giant-board/src/sam_adc.c
new file mode 100644
index 0000000..1063fdc
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_adc.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_adc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <nuttx/analog/adc.h>
+
+#include "sam_adc.h"
+#include "giant-board.h"
+
+#ifdef CONFIG_SAMA5_ADC
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_adc_setup
+ *
+ * Description:
+ * Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************/
+
+int sam_adc_setup(void)
+{
+ static bool initialized = false;
+ struct adc_dev_s *adc;
+ int ret;
+
+ /* Check if we have already initialized */
+
+ if (!initialized)
+ {
+ /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+ adc = sam_adc_initialize();
+ if (adc == NULL)
+ {
+ aerr("ERROR: Failed to get ADC interface\n");
+ return -ENODEV;
+ }
+
+ /* Register the ADC driver at "/dev/adc0" */
+
+ ret = adc_register("/dev/adc0", adc);
+ if (ret < 0)
+ {
+ aerr("ERROR: adc_register failed: %d\n", ret);
+ return ret;
+ }
+
+ /* Now we are initialized */
+
+ initialized = true;
+ }
+
+ return OK;
+}
+
+#endif /* CONFIG_ADC */
diff --git a/boards/arm/sama5/giant-board/src/sam_ajoystick.c b/boards/arm/sama5/giant-board/src/sam_ajoystick.c
new file mode 100644
index 0000000..5ed84c22
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_ajoystick.c
@@ -0,0 +1,437 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_ajoystick.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/input/ajoystick.h>
+
+#include "sam_pio.h"
+#include "sam_adc.h"
+#include "hardware/sam_adc.h"
+#include "giant-board.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Check for pre-requisites and pin conflicts */
+
+#ifdef CONFIG_AJOYSTICK
+# if !defined(CONFIG_ADC)
+# error CONFIG_ADC is required for the Itead joystick
+# undef CONFIG_AJOYSTICK
+# elif !defined(CONFIG_SAMA5_ADC_CHAN0) || !defined(CONFIG_SAMA5_ADC_CHAN1)
+# error CONFIG_SAMA5_ADC_CHAN0 and 1 are required for Itead joystick
+# elif !defined(CONFIG_SAMA5_PIOC_IRQ)
+# error CONFIG_SAMA5_PIOC_IRQ is required for the Itead joystick
+# undef CONFIG_AJOYSTICK
+# elif defined(CONFIG_SAMA5_EMACA)
+# error EMAC conflicts with the Itead PIO usage
+# undef CONFIG_AJOYSTICK
+# elif defined(CONFIG_SAMA5_SSC0)
+# error SSC0 conflicts with the Itead PIO usage
+# undef CONFIG_AJOYSTICK
+# elif defined(CONFIG_SAMA5_SPI1)
+# warning SPI1 may conflict with the Itead PIO usage
+# elif defined(CONFIG_SAMA5_ISI)
+# warning ISI may conflict with the Itead PIO usage
+# endif
+#endif /* CONFIG_AJOYSTICK */
+
+#ifdef CONFIG_AJOYSTICK
+
+/* Number of Joystick buttons */
+
+#define AJOY_NGPIOS 7
+
+/* Bitset of supported Joystick buttons */
+
+#define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \
+ AJOY_BUTTON_3_BIT | AJOY_BUTTON_4_BIT | \
+ AJOY_BUTTON_5_BIT | AJOY_BUTTON_6_BIT | \
+ AJOY_BUTTON_7_BIT )
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s
+ *lower);
+static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
+ FAR struct ajoy_sample_s *sample);
+static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s
+ *lower);
+static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
+ ajoy_buttonset_t press, ajoy_buttonset_t release,
+ ajoy_handler_t handler, FAR void *arg);
+
+static void ajoy_disable(void);
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Pin configuration for each Itead joystick button. Index using AJOY_*
+ * button definitions in include/nuttx/input/ajoystick.h.
+ */
+
+static const pio_pinset_t g_joypio[AJOY_NGPIOS] =
+{
+ PIO_BUTTON_1, PIO_BUTTON_2, PIO_BUTTON_3, PIO_BUTTON_4,
+ PIO_BUTTON_5, PIO_BUTTON_6, PIO_BUTTON_6
+};
+
+static const uint8_t g_joyirq[AJOY_NGPIOS] =
+{
+ IRQ_BUTTON_1, IRQ_BUTTON_2, IRQ_BUTTON_3, IRQ_BUTTON_4,
+ IRQ_BUTTON_5, IRQ_BUTTON_6, IRQ_BUTTON_6
+};
+
+/* This is the button joystick lower half driver interface */
+
+static const struct ajoy_lowerhalf_s g_ajoylower =
+{
+ .al_supported = ajoy_supported,
+ .al_sample = ajoy_sample,
+ .al_buttons = ajoy_buttons,
+ .al_enable = ajoy_enable,
+};
+
+/* Thread-independent file structure for the open ADC driver */
+
+static struct file g_adcfile;
+
+/* Current interrupt handler and argument */
+
+static ajoy_handler_t g_ajoyhandler;
+static FAR void *g_ajoyarg;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ajoy_supported
+ *
+ * Description:
+ * Return the set of buttons supported on the button joystick device
+ *
+ ****************************************************************************/
+
+static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s
+ *lower)
+{
+ iinfo("Supported: %02x\n", AJOY_SUPPORTED);
+ return (ajoy_buttonset_t)AJOY_SUPPORTED;
+}
+
+/****************************************************************************
+ * Name: ajoy_sample
+ *
+ * Description:
+ * Return the current state of all button joystick buttons
+ *
+ ****************************************************************************/
+
+static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
+ FAR struct ajoy_sample_s *sample)
+{
+ struct adc_msg_s adcmsg[SAM_ADC_NCHANNELS];
+ FAR struct adc_msg_s *ptr;
+ ssize_t nread;
+ ssize_t offset;
+ int have;
+ int i;
+
+ /* Read all of the available samples (handling the case where additional
+ * channels are enabled).
+ */
+
+ nread = file_read(&g_adcfile, adcmsg,
+ MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
+ if (nread < 0)
+ {
+ if (nread != EINTR)
+ {
+ ierr("ERROR: read failed: %d\n", (int)nread);
+ }
+
+ return nread;
+ }
+ else if (nread < 2 * sizeof(struct adc_msg_s))
+ {
+ ierr("ERROR: read too small: %ld\n", (long)nread);
+ return -EIO;
+ }
+
+ /* Sample and the raw analog inputs */
+
+ for (i = 0, offset = 0, have = 0;
+ i < SAM_ADC_NCHANNELS && offset < nread && have != 3;
+ i++, offset += sizeof(struct adc_msg_s))
+ {
+ ptr = &adcmsg[i];
+
+ /* Is this one of the channels that we need? */
+
+ if ((have & 1) == 0 && ptr->am_channel == 0)
+ {
+ int32_t tmp = ptr->am_data;
+ sample->as_x = (int16_t)tmp;
+ have |= 1;
+
+ iinfo("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
+ }
+
+ if ((have & 2) == 0 && ptr->am_channel == 1)
+ {
+ int32_t tmp = ptr->am_data;
+ sample->as_y = (int16_t)tmp;
+ have |= 2;
+
+ iinfo("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
+ }
+ }
+
+ if (have != 3)
+ {
+ ierr("ERROR: Could not find joystack channels\n");
+ return -EIO;
+ }
+
+ /* Sample the discrete button inputs */
+
+ sample->as_buttons = ajoy_buttons(lower);
+ iinfo("Returning: %02x\n", AJOY_SUPPORTED);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: ajoy_buttons
+ *
+ * Description:
+ * Return the current state of button data (only)
+ *
+ ****************************************************************************/
+
+static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s
+ *lower)
+{
+ ajoy_buttonset_t ret = 0;
+ int i;
+
+ /* Read each joystick GPIO value */
+
+ for (i = 0; i < AJOY_NGPIOS; i++)
+ {
+ /* Button outputs are pulled high. So a sensed low level means that the
+ * button is pressed.
+ */
+
+ if (!sam_pioread(g_joypio[i]))
+ {
+ ret |= (1 << i);
+ }
+ }
+
+ iinfo("Returning: %02x\n", ret);
+ return ret;
+}
+
+/****************************************************************************
+ * Name: ajoy_enable
+ *
+ * Description:
+ * Enable interrupts on the selected set of joystick buttons. And empty
+ * set will disable all interrupts.
+ *
+ ****************************************************************************/
+
+static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
+ ajoy_buttonset_t press, ajoy_buttonset_t release,
+ ajoy_handler_t handler, FAR void *arg)
+{
+ irqstate_t flags;
+ ajoy_buttonset_t either = press | release;
+ ajoy_buttonset_t bit;
+ int i;
+
+ /* Start with all interrupts disabled */
+
+ flags = enter_critical_section();
+ ajoy_disable();
+
+ iinfo("press: %02x release: %02x handler: %p arg: %p\n",
+ press, release, handler, arg);
+
+ /* If no events are indicated or if no handler is provided, then this
+ * must really be a request to disable interrupts.
+ */
+
+ if (either && handler)
+ {
+ /* Save the new the handler and argument */
+
+ g_ajoyhandler = handler;
+ g_ajoyarg = arg;
+
+ /* Check each GPIO. */
+
+ for (i = 0; i < AJOY_NGPIOS; i++)
+ {
+ /* Enable interrupts on each pin that has either a press or
+ * release event associated with it.
+ */
+
+ bit = (1 << i);
+ if ((either & bit) != 0)
+ {
+ /* REVISIT: It would be better if we reconfigured for
+ * the edges of interest so that we do not get spurious
+ * interrupts.
+ */
+
+ sam_pioirqenable(g_joyirq[i]);
+ }
+ }
+ }
+
+ leave_critical_section(flags);
+}
+
+/****************************************************************************
+ * Name: ajoy_disable
+ *
+ * Description:
+ * Disable all joystick interrupts
+ *
+ ****************************************************************************/
+
+static void ajoy_disable(void)
+{
+ irqstate_t flags;
+ int i;
+
+ /* Disable each joystick interrupt */
+
+ flags = enter_critical_section();
+ for (i = 0; i < AJOY_NGPIOS; i++)
+ {
+ sam_pioirqdisable(g_joyirq[i]);
+ }
+
+ leave_critical_section(flags);
+
+ /* Nullify the handler and argument */
+
+ g_ajoyhandler = NULL;
+ g_ajoyarg = NULL;
+}
+
+/****************************************************************************
+ * Name: ajoy_interrupt
+ *
+ * Description:
+ * Discrete joystick interrupt handler
+ *
+ ****************************************************************************/
+
+static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+ DEBUGASSERT(g_ajoyhandler);
+ if (g_ajoyhandler)
+ {
+ g_ajoyhandler(&g_ajoylower, g_ajoyarg);
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_ajoy_initialization
+ *
+ * Description:
+ * Initialize and register the button joystick driver
+ *
+ ****************************************************************************/
+
+int sam_ajoy_initialization(void)
+{
+ int ret;
+ int i;
+
+ /* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
+
+ /* Open the ADC driver for reading. */
+
+ ret = file_open(&g_adcfile, "/dev/adc0", O_RDONLY);
+ if (ret < 0)
+ {
+ ierr("ERROR: Failed to open /dev/adc0: %d\n", ret);
+ return ret;
+ }
+
+ /* Configure the GPIO pins as interrupting inputs. */
+
+ for (i = 0; i < AJOY_NGPIOS; i++)
+ {
+ /* Configure the PIO as an input */
+
+ sam_configpio(g_joypio[i]);
+
+ /* Configure PIO interrupts, attach the interrupt handler, but leave
+ * the interrupt disabled.
+ */
+
+ sam_pioirq(g_joypio[i]);
+ irq_attach(g_joyirq[i], ajoy_interrupt, NULL);
+ sam_pioirqdisable(g_joyirq[i]);
+ }
+
+ /* Register the joystick device as /dev/ajoy0 */
+
+ ret = ajoy_register("/dev/ajoy0", &g_ajoylower);
+ if (ret < 0)
+ {
+ ierr("ERROR: ajoy_register failed: %d\n", ret);
+ file_close(&g_adcfile);
+ }
+
+ return ret;
+}
+
+#endif /* CONFIG_AJOYSTICK */
diff --git a/boards/arm/sama5/giant-board/src/sam_appinit.c b/boards/arm/sama5/giant-board/src/sam_appinit.c
new file mode 100644
index 0000000..87974df
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_appinit.c
@@ -0,0 +1,76 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_appinit.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <syslog.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+
+#include "giant-board.h"
+
+#ifndef CONFIG_BUILD_KERNEL
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initialization logic and the
+ * matching application logic. The value could be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifndef CONFIG_BOARD_LATE_INITIALIZE
+ /* Perform board initialization */
+
+ mcinfo("Entry\n");
+ return sam_bringup();
+#else
+ return OK;
+#endif
+}
+
+#endif /* CONFIG_BUILD_KERNEL */
diff --git a/boards/arm/sama5/giant-board/src/sam_autoleds.c b/boards/arm/sama5/giant-board/src/sam_autoleds.c
new file mode 100644
index 0000000..e19e5e2
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_autoleds.c
@@ -0,0 +1,138 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_autoleds.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* There is an Orange LED on board the Giant Board. The LED is
+ * driven by the STATUS_LED pin (PA6). Bringing the LED high will illuminate
+ * the LED.
+ *
+ * ------------------------------ ------------------- ---------------------
+ * SAMA5D2 PIO SIGNAL USAGE
+ * ------------------------------ ------------------- ---------------------
+ * PA6 STATUS_LED Orange LED
+ * ------------------------------ ------------------- ---------------------
+ *
+ * The LED is not used by the board port unless CONFIG_ARCH_LEDS is
+ * defined. In that case, the usage by the board port is defined in
+ * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
+ * events as follows. Note that only the Orange LED is used in this case
+ *
+ * SYMBOL Meaning Orange LED
+ * ------------------- ----------------------- ---------
+ * LED_STARTED NuttX has been started OFF
+ * LED_HEAPALLOCATE Heap has been allocated OFF
+ * LED_IRQSENABLED Interrupts enabled OFF
+ * LED_STACKCREATED Idle stack created ON
+ * LED_INIRQ In an interrupt N/C
+ * LED_SIGNAL In a signal handler N/C
+ * LED_ASSERTION An assertion failed N/C
+ * LED_PANIC The system has crashed FLASH
+ *
+ * Thus if the Orange LED is statically on, NuttX has successfully booted
+ * and is, apparently, running normally. If LED is flashing at
+ * approximately 2Hz, then a fatal error has been detected and the system
+ * has halted.
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "sam_pio.h"
+#include "giant-board.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+ /* Configure LED PIOs for output */
+
+ sam_configpio(PIO_LED_ORANGE);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+ switch (led)
+ {
+ default:
+ case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */
+ break; /* Leave Orange LED off */
+
+ case 1: /* LED_STACKCREATED */
+ case 3: /* LED_PANIC */
+ {
+ /* Orange LED is ON (High illuminates) */
+
+ sam_piowrite(PIO_LED_ORANGE, true);
+ }
+ break;
+
+ case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
+ break; /* No change */
+ }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+ switch (led)
+ {
+ default:
+ case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED, */
+ case 1: /* LED_STACKCREATED */
+ break; /* Will not happen */
+
+ case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
+ break; /* No change */
+
+ case 3: /* LED_PANIC */
+ {
+ /* Power LED is OFF (Low illuminates) */
+
+ sam_piowrite(PIO_LED_ORANGE, false);
+ }
+ break;
+ }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/boards/arm/sama5/giant-board/src/sam_boot.c b/boards/arm/sama5/giant-board/src/sam_boot.c
new file mode 100644
index 0000000..c75d80f
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_boot.c
@@ -0,0 +1,90 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+
+#include "giant-board.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_boardinitialize
+ *
+ * Description:
+ * All SAMA5 architectures must provide the following entry point.
+ * This entry point is called early in the initialization -- after all
+ * memory has been configured and mapped but before any devices have been
+ * initialized.
+ *
+ ****************************************************************************/
+
+void sam_boardinitialize(void)
+{
+ /* Initialize USB if the 1) the HS host or device controller is in the
+ * configuration and 2) the weak function sam_usbinitialize() has been
+ * brought into the build.
+ * Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also selected.
+ */
+
+#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS)
+ if (sam_usbinitialize)
+ {
+ sam_usbinitialize();
+ }
+#endif
+
+#ifdef CONFIG_ARCH_LEDS
+ /* Configure on-board LEDs if LED support has been selected. */
+
+ board_autoled_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ * initialization call will be performed in the boot-up sequence to a
+ * function called board_late_initialize(). board_late_initialize() will be
+ * called immediately after up_initialize() is called and just before the
+ * initial application is started. This additional initialization phase
+ * may be used, for example, to initialize board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+ /* Perform board initialization */
+
+ sam_bringup();
+}
+#endif /* CONFIG_BOARD_LATE_INITIALIZE */
diff --git a/boards/arm/sama5/giant-board/src/sam_bringup.c b/boards/arm/sama5/giant-board/src/sam_bringup.c
new file mode 100644
index 0000000..b12f5c6
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_bringup.c
@@ -0,0 +1,400 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_bringup.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/mount.h>
+#include <stdlib.h>
+#include <syslog.h>
+#include <debug.h>
+#include <string.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/kthread.h>
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbhost.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include "giant-board.h"
+
+#ifdef CONFIG_CDCACM
+# include <nuttx/usb/cdcacm.h>
+#endif
+
+#ifdef CONFIG_NET_CDCECM
+# include <nuttx/usb/cdcecm.h>
+# include <net/if.h>
+#endif
+
+#ifdef CONFIG_USBMONITOR
+# include <nuttx/usb/usbmonitor.h>
+#endif
+
+#ifdef CONFIG_RNDIS
+# include <nuttx/usb/rndis.h>
+#endif
+
+#ifdef CONFIG_MMCSD
+# include <nuttx/mmcsd.h>
+# include "sam_sdmmc.h"
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NSECTORS(n) \
+ (((n)+CONFIG_GIANTBOARD_ROMFS_ROMDISK_SECTSIZE-1) / \
+ CONFIG_GIANTBOARD_ROMFS_ROMDISK_SECTSIZE)
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_i2c_register
+ *
+ * Description:
+ * Register one I2C drivers for the I2C tool.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_I2CTOOL
+static void sam_i2c_register(int bus)
+{
+ FAR struct i2c_master_s *i2c;
+ int ret;
+
+ i2c = sam_i2cbus_initialize(bus);
+ if (i2c == NULL)
+ {
+ i2cerr("ERROR: Failed to get I2C%d interface\n", bus);
+ }
+ else
+ {
+ ret = i2c_register(i2c, bus);
+ if (ret < 0)
+ {
+ i2cerr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+ sam_i2cbus_uninitialize(i2c);
+ }
+ }
+}
+#endif
+
+/****************************************************************************
+ * Name: sam_i2ctool
+ *
+ * Description:
+ * Register I2C drivers for the I2C tool.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_I2CTOOL
+static void sam_i2ctool(void)
+{
+#ifdef CONFIG_SAMA5_TWI0
+ sam_i2c_register(0);
+#endif
+#ifdef CONFIG_SAMA5_TWI1
+ sam_i2c_register(1);
+#endif
+#ifdef CONFIG_SAMA5_TWI2
+ sam_i2c_register(2);
+#endif
+#ifdef CONFIG_SAMA5_TWI3
+ sam_i2c_register(3);
+#endif
+}
+#else
+# define sam_i2ctool()
+#endif
+
+/****************************************************************************
+ * Name: nsh_sdmmc_initialize
+ *
+ * Description:
+ * Initialize SDMMC drivers
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMA5_SDMMC
+
+static int nsh_sdmmc_initialize(void)
+{
+ struct sdio_dev_s *sdmmc0;
+ struct sdio_dev_s *sdmmc1;
+ int ret = 0;
+
+ /* Get an instance of the SDIO interface */
+
+#ifdef CONFIG_SAMA5_SDMMC0
+ sdmmc0 = sam_sdmmc_sdio_initialize(SDMMC0_SLOTNO);
+ if (!sdmmc0)
+ {
+ mcerr("ERROR: Failed to initialize SD/MMC\n");
+ }
+ else
+ {
+ /* Bind the SDIO interface to the MMC/SD driver */
+
+ ret = mmcsd_slotinitialize(SDMMC0_MINOR, sdmmc0);
+ if (ret != OK)
+ {
+ mcerr("ERROR: Failed to bind SDIO to the MMC/SD driver (slot 0): "
+ "%d\n",
+ ret);
+ }
+ }
+
+#ifdef CONFIG_SAMA5D27_SDMMC0_MOUNT
+ /* Mount the volume on SDMMC0 */
+
+ ret = mount(CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV,
+ CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT,
+ CONFIG_SAMA5D27_SDMMC0_MOUNT_FSTYPE,
+ 0, NULL);
+
+ if (ret < 0)
+ {
+ mcerr("ERROR: Failed to mount %s: %d\n",
+ CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT, errno);
+ }
+#endif
+#endif
+
+#ifdef CONFIG_SAMA5_SDMMC1
+ sdmmc1 = sam_sdmmc_sdio_initialize(SDMMC1_SLOTNO);
+ if (!sdmmc1)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize SD/MMC\n");
+ }
+ else
+ {
+ /* Bind the SDIO interface to the MMC/SD driver */
+
+ ret = mmcsd_slotinitialize(SDMMC1_MINOR, sdmmc1);
+ if (ret != OK)
+ {
+ syslog(LOG_ERR,
+ "ERROR: Failed to bind SDIO to the MMC/SD driver (slot 0): "
+ "%d\n",
+ ret);
+ }
+ }
+
+#ifdef CONFIG_SAMA5D27_SDMMC1_MOUNT
+ /* Mount the volume on SDMMC1 */
+
+ ret = mount(CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV,
+ CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT,
+ CONFIG_SAMA5D27_SDMMC1_MOUNT_FSTYPE,
+ 0, NULL);
+
+ if (ret < 0)
+ {
+ mcerr("ERROR: Failed to mount %s: %d\n",
+ CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT, errno);
+ }
+#endif
+#endif
+
+ return OK;
+}
+#else
+# define nsh_sdmmc_initialize() (OK)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_bringup
+ *
+ * Description:
+ * Bring up board features
+ *
+ ****************************************************************************/
+
+int sam_bringup(void)
+{
+ int ret;
+
+ /* Register I2C drivers on behalf of the I2C tool */
+
+ sam_i2ctool();
+
+#ifdef HAVE_SDMMC
+#ifdef CONFIG_SAMA5_SDMMC
+ /* Initialize SDMCC-based MMC/SD card support */
+
+ nsh_sdmmc_initialize();
+#endif
+#endif
+
+#ifdef HAVE_AUTOMOUNTER
+ /* Initialize the auto-mounter */
+
+ sam_automount_initialize();
+#endif
+
+#ifdef HAVE_ROMFS
+ /* Create a ROM disk for the /etc filesystem */
+
+ ret = romdisk_register(CONFIG_GIANT_BOARD_ROMFS_ROMDISK_MINOR, romfs_img,
+ NSECTORS(romfs_img_len),
+ CONFIG_GIANT_BOARD_ROMFS_ROMDISK_SECTSIZE);
+ if (ret < 0)
+ {
+ fserr("ERROR: romdisk_register failed: %d\n", -ret);
+ }
+ else
+ {
+ /* Mount the file system */
+
+ ret = mount(CONFIG_GIANT_BOARD_ROMFS_ROMDISK_DEVNAME,
+ CONFIG_GIANT_BOARD_ROMFS_MOUNT_MOUNTPOINT,
+ "romfs", MS_RDONLY, NULL);
+ if (ret < 0)
+ {
+ fserr("ERROR: mount(%s,%s,romfs) failed: %d\n",
+ CONFIG_GIANT_BOARD_ROMFS_ROMDISK_DEVNAME,
+ CONFIG_GIANT_BOARD_ROMFS_MOUNT_MOUNTPOINT, errno);
+ }
+ }
+#endif
+
+#ifdef HAVE_USBHOST
+ /* Initialize USB host operation. sam_usbhost_initialize() starts a thread
+ * will monitor for USB connection and disconnection events.
+ */
+
+ ret = sam_usbhost_initialize();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to initialize USB host: %d\n", ret);
+ }
+#endif
+
+#ifdef HAVE_USBMONITOR
+ /* Start the USB Monitor */
+
+ ret = usbmonitor_start();
+ if (ret != OK)
+ {
+ _uerr("ERROR: Failed to start the USB monitor: %d\n", ret);
+ }
+#endif
+
+#ifdef HAVE_MAXTOUCH
+ /* Initialize the touchscreen */
+
+ ret = sam_tsc_setup(0);
+ if (ret < 0)
+ {
+ tmrerr("ERROR: sam_tsc_setup failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_PWM
+ /* Initialize PWM and register the PWM device. */
+
+ ret = sam_pwm_setup();
+ if (ret < 0)
+ {
+ pwmerr("ERROR: sam_pwm_setup() failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ADC
+ /* Initialize ADC and register the ADC driver. */
+
+ ret = sam_adc_setup();
+ if (ret < 0)
+ {
+ aerr("ERROR: sam_adc_setup failed: %d\n", ret);
+ }
+#endif
+
+#ifdef HAVE_WM8904
+ /* Configure WM8904 audio */
+
+ ret = sam_wm8904_initialize(0);
+ if (ret != OK)
+ {
+ auderr("ERROR: Failed to initialize WM8904 audio: %d\n", ret);
+ }
+#endif
+
+#ifdef HAVE_AUDIO_NULL
+ /* Configure the NULL audio device */
+
+ ret = sam_audio_null_initialize(0);
+ if (ret != OK)
+ {
+ auderr("ERROR: Failed to initialize the NULL audio device: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_FS_PROCFS
+ /* Mount the procfs file system */
+
+ ret = mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
+ if (ret < 0)
+ {
+ ferr("ERROR: Failed to mount procfs at %s: %d\n",
+ SAMA5_PROCFS_MOUNTPOINT, ret);
+ }
+#endif
+
+#if defined(CONFIG_RNDIS)
+ /* Set up a MAC address for the RNDIS device. */
+
+ uint8_t mac[6];
+ mac[0] = 0xa0; /* TODO */
+ mac[1] = (CONFIG_NETINIT_MACADDR_2 >> (8 * 0)) & 0xff;
+ mac[2] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 3)) & 0xff;
+ mac[3] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 2)) & 0xff;
+ mac[4] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 1)) & 0xff;
+ mac[5] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 0)) & 0xff;
+ usbdev_rndis_initialize(mac);
+#endif
+
+#ifdef CONFIG_NET_CDCECM
+ ret = cdcecm_initialize(0, NULL);
+ if (ret < 0)
+ {
+ nerr("ERROR: cdcecm_initialize() failed: %d\n", ret);
+ }
+#endif
+
+ /* If we got here then perhaps not all initialization was successful, but
+ * at least enough succeeded to bring-up NSH with perhaps reduced
+ * capabilities.
+ */
+
+ UNUSED(ret);
+ return OK;
+}
diff --git a/boards/arm/sama5/giant-board/src/sam_i2schar.c b/boards/arm/sama5/giant-board/src/sam_i2schar.c
new file mode 100644
index 0000000..7ccf1b8
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_i2schar.c
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_i2schar.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/audio/i2s.h>
+
+#include "sam_ssc.h"
+#include "giant-board.h"
+
+#if defined(CONFIG_AUDIO_I2SCHAR) && \
+ (defined(CONFIG_SAMA5_SSC0) || defined(CONFIG_SAMA5_SSC1))
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_GIANT_BOARD_SSC_PORT
+# if defined(CONFIG_SAMA5_SSC0)
+# define CONFIG_GIANT_BOARD_SSC_PORT 0
+# elif defined(CONFIG_SAMA5_SSC1)
+# define CONFIG_GIANT_BOARD_SSC_PORT 1
+# endif
+#endif
+
+#ifndef CONFIG_GIANT_BOARD_I2SCHAR_MINOR
+# define CONFIG_GIANT_BOARD_I2SCHAR_MINOR 0
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: i2schar_devinit
+ *
+ * Description:
+ * All architectures must provide the following interface in order to work
+ * with apps/examples/i2schar.
+ *
+ ****************************************************************************/
+
+int i2schar_devinit(void)
+{
+ static bool initialized = false;
+ struct i2s_dev_s *i2s;
+ int ret;
+
+ /* Have we already initialized? */
+
+ if (!initialized)
+ {
+ /* Call sam_ssc_initialize() to get an instance of the SSC/I2S
+ * interface
+ */
+
+ i2s = sam_ssc_initialize(CONFIG_GIANT_BOARD_SSC_PORT);
+ if (!i2s)
+ {
+ _err("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n",
+ CONFIG_GIANT_BOARD_SSC_PORT);
+ return -ENODEV;
+ }
+
+ /* Register the I2S character driver at "/dev/i2schar0" */
+
+ ret = i2schar_register(i2s, CONFIG_GIANT_BOARD_I2SCHAR_MINOR);
+ if (ret < 0)
+ {
+ aerr("ERROR: i2schar_register failed: %d\n", ret);
+ return ret;
+ }
+
+ /* Now we are initialized */
+
+ initialized = true;
+ }
+
+ return OK;
+}
+
+#endif /* CONFIG_AUDIO_I2SCHAR && (CONFIG_SAMA5_SSC0 || CONFIG_SAMA5_SSC1) */
diff --git a/boards/arm/sama5/giant-board/src/sam_ostest.c b/boards/arm/sama5/giant-board/src/sam_ostest.c
new file mode 100644
index 0000000..35108c1
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_ostest.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_ostest.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <arch/board/board.h>
+
+#include "arm_arch.h"
+#include "arm_internal.h"
+#include "giant-board.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#undef HAVE_FPU
+#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_TESTING_OSTEST_FPUTESTDISABLE) && \
+ defined(CONFIG_TESTING_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID)
+# define HAVE_FPU 1
+#endif
+
+#ifdef HAVE_FPU
+
+#if CONFIG_TESTING_OSTEST_FPUSIZE != (4*FPU_CONTEXT_REGS)
+# error "CONFIG_TESTING_OSTEST_FPUSIZE has the wrong size"
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static uint32_t g_saveregs[XCPTCONTEXT_REGS];
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/* Given an array of size CONFIG_TESTING_OSTEST_FPUSIZE, this function will
+ * return the current FPU registers.
+ */
+
+void arch_getfpu(FAR uint32_t *fpusave)
+{
+ irqstate_t flags;
+
+ /* Take a snapshot of the thread context right now */
+
+ flags = enter_critical_section();
+ arm_saveusercontext(g_saveregs);
+
+ /* Return only the floating register values */
+
+ memcpy(fpusave, &g_saveregs[REG_S0], (4*FPU_CONTEXT_REGS));
+ leave_critical_section(flags);
+}
+
+/* Given two arrays of size CONFIG_TESTING_OSTEST_FPUSIZE this function
+ * will compare them and return true if they are identical.
+ */
+
+bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
+{
+ return memcmp(fpusave1, fpusave2, (4*FPU_CONTEXT_REGS)) == 0;
+}
+
+#endif /* HAVE_FPU */
diff --git a/boards/arm/sama5/giant-board/src/sam_pwm.c b/boards/arm/sama5/giant-board/src/sam_pwm.c
new file mode 100644
index 0000000..ba3e6e4
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_pwm.c
@@ -0,0 +1,147 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_pwm.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <nuttx/timers/pwm.h>
+
+#include <arch/board/board.h>
+
+#include "sam_pwm.h"
+#include "giant-board.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* PWM.
+ * There are no dedicated PWM output pins available to the user for PWM
+ * testing.
+ * Care must be taken because all PWM output pins conflict with some other
+ * usage of the pin by other devices:
+ *
+ * -----+---+---+----+--------------------
+ * PWM PIN PER PIO CONFLICTS
+ * -----+---+---+----+--------------------
+ * PWM0 FI B PC28 SPI1, ISI
+ * H B PB0 GMAC
+ * B PA20 LCDC, ISI
+ * L B PB1 GMAC
+ * B PA21 LCDC, ISI
+ * -----+---+---+----+--------------------
+ * PWM1 FI B PC31 HDMI
+ * H B PB4 GMAC
+ * B PA22 LCDC, ISI
+ * L B PB5 GMAC
+ * B PE31 ISI, HDMI
+ * B PA23 LCDC, ISI
+ * -----+---+---+----+--------------------
+ * PWM2 FI B PC29 UART0, ISI, HDMI
+ * H C PD5 HSMCI0
+ * B PB8 GMAC
+ * L C PD6 HSMCI0
+ * B PB9 GMAC
+ * -----+---+---+----+--------------------
+ * PWM3 FI C PD16 SPI0, Audio
+ * H C PD7 HSMCI0
+ * B PB12 GMAC
+ * L C PD8 HSMCI0
+ * B PB13 GMAC
+ * -----+---+---+----+--------------------
+ */
+
+#ifndef CONFIG_GIANT_BOARD_CHANNEL
+# if defined(CONFIG_SAMA5_PWM_CHAN0)
+# warning Assuming PWM channel 0
+# define CONFIG_GIANT_BOARD_CHANNEL 0
+# elif defined(CONFIG_SAMA5_PWM_CHAN1)
+# warning Assuming PWM channel 1
+# define CONFIG_GIANT_BOARD_CHANNEL 1
+# elif defined(CONFIG_SAMA5_PWM_CHAN2)
+# warning Assuming PWM channel 2
+# define CONFIG_GIANT_BOARD_CHANNEL 2
+# elif defined(CONFIG_SAMA5_PWM_CHAN3)
+# warning Assuming PWM channel 3
+# define CONFIG_GIANT_BOARD_CHANNEL 3
+# endif
+#endif
+
+#if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_pwm_setup
+ *
+ * Description:
+ * Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************/
+
+int sam_pwm_setup(void)
+{
+ static bool initialized = false;
+ struct pwm_lowerhalf_s *pwm;
+ int ret;
+
+ /* Have we already initialized? */
+
+ if (!initialized)
+ {
+ /* Call sam_pwminitialize() to get an instance of the PWM interface */
+
+ pwm = sam_pwminitialize(CONFIG_SAMA5D3XPLAINED_CHANNEL);
+ if (!pwm)
+ {
+ _err("ERROR: Failed to get the SAMA5 PWM lower half\n");
+ return -ENODEV;
+ }
+
+ /* Register the PWM driver at "/dev/pwm0" */
+
+ ret = pwm_register("/dev/pwm0", pwm);
+ if (ret < 0)
+ {
+ aerr("ERROR: pwm_register failed: %d\n", ret);
+ return ret;
+ }
+
+ /* Now we are initialized */
+
+ initialized = true;
+ }
+
+ return OK;
+}
+
+#endif /* CONFIG_PWM */
diff --git a/boards/arm/sama5/giant-board/src/sam_reset.c b/boards/arm/sama5/giant-board/src/sam_reset.c
new file mode 100644
index 0000000..570c0db
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_reset.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_reset.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#ifdef CONFIG_BOARDCTL_RESET
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_reset
+ *
+ * Description:
+ * Reset board. Support for this function is required by board-level
+ * logic if CONFIG_BOARDCTL_RESET is selected.
+ *
+ * Input Parameters:
+ * status - Status information provided with the reset event. This
+ * meaning of this status information is board-specific. If not
+ * used by a board, the value zero may be provided in calls to
+ * board_reset().
+ *
+ * Returned Value:
+ * If this function returns, then it was not possible to power-off the
+ * board due to some constraints. The return value int this case is a
+ * board-specific reason for the failure to shutdown.
+ *
+ ****************************************************************************/
+
+int board_reset(int status)
+{
+ up_systemreset();
+ return 0;
+}
+
+#endif /* CONFIG_BOARDCTL_RESET */
diff --git a/boards/arm/sama5/giant-board/src/sam_sdmmc.c b/boards/arm/sama5/giant-board/src/sam_sdmmc.c
new file mode 100644
index 0000000..d479c8d
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_sdmmc.c
@@ -0,0 +1,319 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_sdmmc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The Giant Board provide one Micro SD memory card slot at J6 (SDMMC1).
+ *
+ * SDMMC1: The Micro SD card slot connects via SDMMC1. The card detect
+ * discrete is available on PA21 (pulled high), shared with DAT3. The write
+ * protect discrete is tied to ground and not available to software. The
+ * slot only supports 4-bit wide transfer mode.
+ *
+ * PA18 SDMMC1_DAT0
+ * PA19 SDMMC1_DAT1
+ * PA20 SDMMC1_DAT2
+ * PA21 SDMMC1_DAT3 / CD
+ * PD22 SDMMC1_CK
+ * PA28 SDMMC1_CMD
+ *
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "chip.h"
+#include "arm_internal.h"
+#include "arm_arch.h"
+
+#include "sam_pio.h"
+#include "sam_sdmmc.h"
+
+#include "giant-board.h"
+
+#ifdef HAVE_SDMMC
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/* This structure holds static information unique to one SDMMC peripheral */
+
+struct sam_sdmmc_state_s
+{
+ struct sdio_dev_s *sdmmc; /* R/W device handle */
+ pio_pinset_t pincfg; /* Card detect PIO pin configuration */
+ uint8_t irq; /* Interrupt number (same as pid) */
+ uint8_t slotno; /* Slot number */
+ bool cd; /* TRUE: card is inserted */
+ xcpt_t handler; /* Interrupt handler */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* SDMMC device state */
+
+#ifdef CONFIG_SAMA5_SDMMC0
+static int sam_sdmmc0_cardetect(int irq, void *regs, FAR void *arg);
+
+static struct sam_sdmmc_state_s g_sdmmc0 =
+{
+ .pincfg = PIO_SDMMC0_CD,
+ .irq = -1,
+ .slotno = 0,
+ .handler = sam_sdmmc0_cardetect,
+};
+#endif
+
+#ifdef CONFIG_SAMA5_SDMMC1
+static int sam_sdmmc1_cardetect(int irq, void *regs, FAR void *arg);
+
+static struct sam_sdmmc_state_s g_sdmmc1 =
+{
+ .pincfg = PIO_SDMMC1_CD,
+ .irq = IRQ_SDMMC1_CD,
+ .slotno = 1,
+ .handler = sam_sdmmc1_cardetect,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_cardinserted_internal
+ *
+ * Description:
+ * Check if a card is inserted into the selected SDMMC slot
+ *
+ ****************************************************************************/
+
+bool sam_cardinserted_internal(struct sam_sdmmc_state_s *state)
+{
+ bool inserted;
+
+ /* Get the state of the PIO pin */
+
+ inserted = sam_pioread(state->pincfg);
+ finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
+ return !inserted;
+}
+
+/****************************************************************************
+ * Name: sam_sdmmc_cardetect, sam_sdmmc0_cardetect, and sam_sdmmc1_cardetect
+ *
+ * Description:
+ * Card detect interrupt handlers
+ *
+ ****************************************************************************/
+
+static int sam_sdmmc_cardetect(struct sam_sdmmc_state_s *state)
+{
+ /* Get the current card insertion state */
+
+ bool cd = sam_cardinserted_internal(state);
+
+ /* Has the card detect state changed? */
+
+ if (cd != state->cd)
+ {
+ /* Yes... remember that new state and inform the SDMMC driver */
+
+ state->cd = cd;
+
+ /* Report the new state to the SDIO driver */
+
+ sdio_mediachange(state->sdmmc, cd);
+ }
+
+ return OK;
+}
+
+#ifdef CONFIG_SAMA5_SDMMC0
+static int sam_sdmmc0_cardetect(int irq, void *regs, FAR void *arg)
+{
+ return sam_sdmmc_cardetect(&g_sdmmc0);
+}
+#endif
+
+#ifdef CONFIG_SAMA5_SDMMC1
+static int sam_sdmmc1_cardetect(int irq, void *regs, FAR void *arg)
+{
+ return sam_sdmmc_cardetect(&g_sdmmc1);
+}
+#endif
+
+/****************************************************************************
+ * Name: sam_sdmmc_state
+ *
+ * Description:
+ * Initialize SDMMC PIOs.
+ *
+ ****************************************************************************/
+
+static struct sam_sdmmc_state_s *sam_sdmmc_state(int slotno)
+{
+ struct sam_sdmmc_state_s *state = NULL;
+
+#ifdef CONFIG_SAMA5_SDMMC0
+#ifdef CONFIG_SAMA5_SDMMC1
+ if (slotno == 0)
+#endif
+ {
+ state = &g_sdmmc0;
+ }
+#ifdef CONFIG_SAMA5_SDMMC1
+ else
+#endif
+#endif
+
+#ifdef CONFIG_SAMA5_SDMMC1
+ {
+ state = &g_sdmmc1;
+ }
+#endif
+
+ return state;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_sdmmc_initialize
+ *
+ * Description:
+ * Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int sam_sdmmc_initialize(int slotno, int minor)
+{
+ struct sam_sdmmc_state_s *state;
+ int ret;
+
+ mcinfo("Entry.\n");
+ mcinfo("slotno: %d\n", slotno);
+
+ /* Get the static SDMMC description */
+
+ state = sam_sdmmc_state(slotno);
+ if (!state)
+ {
+ ferr("ERROR: No state for slotno %d\n", slotno);
+ return -EINVAL;
+ }
+
+ /* Initialize card-detect and write-protect PIOs */
+
+ sam_configpio(state->pincfg);
+
+ /* Mount the SDIO-based MMC/SD block driver */
+
+ /* First, get an instance of the SDIO interface */
+
+ state->sdmmc = sam_sdmmc_sdio_initialize(slotno);
+ if (!state->sdmmc)
+ {
+ ferr("ERROR: Failed to initialize SDIO slot %d\n", slotno);
+ return -ENODEV;
+ }
+
+ /* Now bind the SDIO interface to the MMC/SD driver */
+
+ ret = mmcsd_slotinitialize(minor, state->sdmmc);
+ if (ret != OK)
+ {
+ ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+ return ret;
+ }
+
+ /* Configure card detect interrupts */
+
+ sam_pioirq(state->pincfg);
+ irq_attach(state->irq, state->handler, NULL);
+
+ /* Then inform the SDMMC driver if there is or is not a card in the slot. */
+
+ state->cd = sam_cardinserted_internal(state);
+ sdio_mediachange(state->sdmmc, state->cd);
+
+ /* Enable card detect interrupts */
+
+ sam_pioirqenable(state->irq);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: sam_cardinserted
+ *
+ * Description:
+ * Check if a card is inserted into the selected SDMMC slot
+ *
+ ****************************************************************************/
+
+bool sam_cardinserted(int slotno)
+{
+ struct sam_sdmmc_state_s *state;
+
+ /* Get the SDMMC description */
+
+ state = sam_sdmmc_state(slotno);
+ if (!state)
+ {
+ ferr("ERROR: No state for slotno %d\n", slotno);
+ return false;
+ }
+
+ /* Return the state of the PIO pin */
+
+ return sam_cardinserted_internal(state);
+}
+
+/****************************************************************************
+ * Name: sam_writeprotected
+ *
+ * Description:
+ * Check if a card is inserted into the selected SDMMC slot
+ *
+ ****************************************************************************/
+
+bool sam_writeprotected(int slotno)
+{
+ /* There are no write protect pins */
+
+ return false;
+}
+
+#endif /* HAVE_SDMMC */
+
diff --git a/boards/arm/sama5/giant-board/src/sam_sdram.c b/boards/arm/sama5/giant-board/src/sam_sdram.c
new file mode 100644
index 0000000..97aa1d3
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_sdram.c
@@ -0,0 +1,572 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_sdram.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include "arm_arch.h"
+
+#include "sam_periphclks.h"
+#include "hardware/sam_memorymap.h"
+#include "hardware/sam_pmc.h"
+#include "hardware/sam_sfr.h"
+#include "hardware/sam_mpddrc.h"
+
+#include "giant-board.h"
+
+/* This file requires:
+ *
+ * CONFIG_SAMA5_DDRCS -- DRAM support is enabled, and
+ * !CONFIG_SAMA5_BOOT_SDRAM - We did not boot into SRAM.
+ */
+
+#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* SDRAM differences */
+
+#if defined(CONFIG_GIANT_BOARD_W971GG6SB)
+ /* Used for SDRAM command handshaking */
+
+# define DDR2_BA0 (1 << 26)
+# define DDR2_BA1 (1 << 27)
+
+#else
+# error Unknown SDRAM type
+#endif
+
+/* The delay loop in sam_sdram_delay requires 6 core cycles per iteration.
+ *
+ * At 492MHz:
+ *
+ * (6 cycles/iteration) / (0.492 cycles/nanosecond) =
+ * 12.1951 nanoseconds per iteration
+ */
+
+#define LOOP_GUARD 100
+# define CYCLES_TO_COUNT(cycles) (((cycles) / 6) + LOOP_GUARD)
+
+#if defined(CONFIG_GIANT_BOARD_492MHZ)
+# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 12195) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 12195) + LOOP_GUARD)
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_sdram_delay
+ *
+ * Description:
+ * Precision delay function for SDRAM configuration.
+ *
+ * This delay loop requires 6 core cycles per iteration. The actual
+ * amount of time delayed will then vary with PCK.
+ *
+ ****************************************************************************/
+
+static inline void sam_sdram_delay(unsigned int loops)
+{
+ volatile unsigned int i;
+
+ for (i = 0; i < loops; i++)
+ {
+ asm("nop");
+ }
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_sdram_config
+ *
+ * Description:
+ * Configures DDR2 (W971GG6SB)
+ *
+ * TODO: test (so far only booting into SDRAM has been tested using U-Boot)
+ *
+ * Per the SAMA5D-Xplained User guide:
+ * "Two DDR2/SDRAM (MT47H64M16HR) used as main system memory (256 MByte).
+ * The board includes 2 Gbits of on-board soldered DDR2 (double data rate)
+ * SDRAM. The footprints can also host two DDR2(MT47H128M16RT) from Micron
+ * for a total of 512 MBytes of DDR2 memory.
+ * The memory bus is 32 bits wide and operates with a frequency of up
+ * to 166 MHz."
+ *
+ * From the Atmel Code Example:
+ * MT47H64M16HR : 8 Meg x 16 x 8 banks
+ * Refresh count: 8K
+ * Row address: A[12:0] (8K)
+ * Column address A[9:0] (1K)
+ * Bank address BA[2:0] a(24,25) (8)
+ *
+ * This logic was taken from Atmel sample code for the SAMA5D3x-EK.
+ *
+ * Input Parameters:
+ * devtype - Either DDRAM_MT47H128M16RT or DDRAM_MT47H64M16HR
+ *
+ * Assumptions:
+ * The DDR memory regions is configured as strongly ordered memory. When
+ * we complete initialization of SDRAM and it is ready for use, we will
+ * make DRAM into normal memory.
+ *
+ ****************************************************************************/
+
+void sam_sdram_config(void)
+{
+ volatile uint8_t *ddr = (uint8_t *)SAM_DDRCS_VSECTION;
+ uint32_t regval;
+
+ /* Enable x2 clocking to the MPDDRC */
+
+ sam_mpddrc_enableclk();
+
+ /* Enable DDR clocking */
+
+ regval = getreg32(SAM_PMC_SCER);
+ regval |= PMC_DDRCK;
+ putreg32(regval, SAM_PMC_SCER);
+
+ /* Clear the low power register */
+
+ putreg32(0, SAM_MPDDRC_LPR);
+
+ /* Enable autofresh during calibration (undocumented) */
+
+ regval = getreg32(SAM_MPDDRC_HS);
+ regval |= MPDDRC_HS_AUTOREFRESH_CAL;
+ putreg32(regval, SAM_MPDDRC_HS);
+
+ /* Force DDR_DQ and DDR_DQS input buffer always on */
+
+ regval = getreg32(SAM_SFR_DDRCFG);
+ regval |= SFR_FDQIEN | SFR_FDQSIEN;
+ putreg32(regval, SAM_SFR_DDRCFG);
+
+ /* Configure the slave offset register */
+
+ regval = MPDDRC_DLL_SOR_S0OFF(1) | /* DLL Slave 0 Delay Line Offset */
+ MPDDRC_DLL_SOR_S1OFF(0) | /* DLL Slave 1 Delay Line Offset */
+ MPDDRC_DLL_SOR_S2OFF(1) | /* DLL Slave 2 Delay Line Offset */
+ MPDDRC_DLL_SOR_S3OFF(1); /* DLL Slave 3 Delay Line Offset */
+ putreg32(regval, SAM_MPDDRC_DLL_SOR);
+
+ /* Configure the master offset register (including upper mystery bits) */
+
+ regval = MPDDRC_DLL_MOR_MOFF(7) | /* DLL Master Delay Line Offset */
+ MPDDRC_DLL_MOR_CLK90OFF(31) | /* DLL CLK90 Delay Line Offset */
+ MPDDRC_DLL_MOR_SELOFF | /* DLL Offset Selection */
+ MPDDRC_DLL_MOR_KEY; /* Undocumented key */
+ putreg32(regval, SAM_MPDDRC_DLL_MOR);
+
+ /* Configure the I/O calibration register */
+
+ regval = getreg32(SAM_MPDDRC_IO_CALIBR);
+ regval &= ~(MPDDRC_IO_CALIBR_RDIV_MASK | MPDDRC_IO_CALIBR_TZQIO_MASK);
+ regval |= (MPDDRC_IO_CALIBR_RZQ48_40 | MPDDRC_IO_CALIBR_TZQIO(3));
+ putreg32(regval, SAM_MPDDRC_IO_CALIBR);
+
+ /* Force DDR_DQ and DDR_DQS input buffer always on */
+
+ putreg32(SFR_FDQIEN | SFR_FDQSIEN, SAM_SFR_DDRCFG);
+
+ /* Step 1: Program the memory device type
+ *
+ * DBW = 0 (32-bit bus wide)
+ * Memory Device = DDR2-SDRAM
+ */
+
+ putreg32(MPDDRC_MD_DDR2_SDRAM, SAM_MPDDRC_MD);
+
+ /* Step 2: Program the features of DDR2-SDRAM device into the Timing
+ * Register
+ */
+
+ /* SAMA5D27D1G uses Winbond W971GG6SB 1GB DDR2 RAM
+ *
+ * See datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Plus-DDR2-LPDDR2-System-in-Package-(SIP)-60001484b.pdf
+ *
+ */
+
+#if defined(CONFIG_GIANT_BOARD_W971GG6SB)
+
+ /* For W971GG6SB
+ *
+ * NC = 13 DDR column bits
+ * NR = 16 DDR row bits
+ * CAS = DDR2/LPDDR2 CAS Latency 4
+ * DLL = Disable reset (0)
+ * DIC_DS = 0
+ * DIS_DLL = Enable PLL (0)
+ * ZQ = Calibration command after initialization (0)
+ * OCD = OCD calibration mode exit, maintain setting (0)
+ * DQMS = Not shared (0)
+ * ENDRM = Disable read measure (0)
+ * NB = 8 banks
+ * NDQS = Not DQS disabled
+ * DECODE = Sequential decoding (0)
+ * UNAL = Unaliged access supported
+ */
+
+ regval = MPDDRC_CR_NC_10 | /* Number of Column Bits */
+ MPDDRC_CR_NR_13 | /* Number of Row Bits */
+ MPDDRC_CR_CAS_4 | /* CAS Latency */
+ MPDDRC_CR_OCD_EXIT | /* Off-chip Driver */
+ MPDDRC_CR_8BANKS | /* Number of Banks */
+ MPDDRC_CR_NDQS | /* Not DQS */
+ MPDDRC_CR_UNAL; /* upport Unaligned Access */
+
+#else
+# error Unknown SDRAM type
+#endif
+
+ putreg32(regval, SAM_MPDDRC_CR);
+
+ /* Configure the Timing Parameter 0 Register */
+
+ regval = MPDDRC_TPR0_TRAS(6) | /* Active to Precharge Delay: 6 * 7.5 = 45 ns */
+ MPDDRC_TPR0_TRCD(2) | /* Row to Column Delay: 2 * 7.5 = 15 ns */
+ MPDDRC_TPR0_TWR(2) | /* Write Recovery Delay: 3 * 7.5 = 22.5 ns */
+ MPDDRC_TPR0_TRC(8) | /* Row Cycle Delay: 8 * 7.5 = 60 ns */
+ MPDDRC_TPR0_TRP(2) | /* Row Precharge Delay: 2 * 7.5 = 15 ns */
+ MPDDRC_TPR0_TRRD(1) | /* Active BankA to Active BankB: 2 * 7.5 = 15 ns */
+ MPDDRC_TPR0_TWTR(2) | /* Internal Write to Read Delay: 2 clock cycle */
+ MPDDRC_TPR0_TMRD(2); /* Load Mode Register Command to
+ * Activate or Refresh Command: 2 clock
+ * cycles
+ */
+ putreg32(regval, SAM_MPDDRC_TPR0);
+
+ /* Configure the Timing Parameter 1 Register */
+
+ regval = MPDDRC_TPR1_TRFC(14) | /* Row Cycle Delay:
+ * 18 * 7.5 = 135 ns
+ * (min 127.5 ns for 1Gb DDR)
+ */
+ MPDDRC_TPR1_TXSNR(16) | /* Exit Self Refresh Delay to Non Read
+ * Command:
+ * 20 * 7.5 > 142.5ns TXSNR: Exit self
+ * refresh delay to Non Read command
+ */
+ MPDDRC_TPR1_TXSRD(208) | /* Exit Self Refresh Delay to Read
+ * Command:
+ * min 200 clock cycles, TXSRD: Exit
+ * self refresh delay to Read command
+ */
+ MPDDRC_TPR1_TXP(2); /* Exit Power-down Delay to First
+ * Command:
+ * 2 * 7.5 = 15 ns
+ */
+ putreg32(regval, SAM_MPDDRC_TPR1);
+
+ /* Configure the Timing Parameter 2 Register */
+
+ regval = MPDDRC_TPR2_TXARD(7) | /* Exit Active Power Down Delay to
+ * Read Command in Mode 'Fast Exit':
+ * min 2 clock cycles
+ */
+ MPDDRC_TPR2_TXARDS(7) | /* Exit Active Power Down Delay to
+ * Read Command in Mode 'Slow Exit':
+ * min 7 clock cycles
+ */
+ MPDDRC_TPR2_TRPA(2) | /* Row Precharge All Delay:
+ * min 18ns
+ */
+ MPDDRC_TPR2_TRTP(2) | /* Four Active Windows:
+ * 2 * 7.5 = 15 ns
+ * (min 7.5ns)
+ */
+ MPDDRC_TPR2_TFAW(10);
+ putreg32(regval, SAM_MPDDRC_TPR2);
+
+ /* DDRSDRC Low-power Register */
+
+ sam_sdram_delay(USEC_TO_COUNT(200));
+
+ regval = MPDDRC_LPR_LPCB_DISABLED | /* Low-power Feature is inhibited */
+ MPDDRC_LPR_TIMEOUT_0CLKS | /* Activates low-power mode after the end of transfer */
+ MPDDRC_LPR_APDE_FAST; /* Active Power Down Exit Time */
+ putreg32(regval, SAM_MPDDRC_LPR);
+
+ /* Step 3: An NOP command is issued to the DDR2-SDRAM. Program the NOP
+ * command into the Mode Register, the application must set MODE to 1 in
+ * the Mode Register.
+ */
+
+ putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR);
+
+ /* Perform a write access to any DDR2-SDRAM address to acknowledge this
+ * command.
+ */
+
+ *ddr = 0;
+
+ /* Now clocks which drive DDR2-SDRAM device are enabled.
+ *
+ * A minimum pause of 200 usec is provided to precede any signal toggle.
+ * (6 core cycles per iteration, core is at 396MHz: min 13200 loops)
+ */
+
+ sam_sdram_delay(USEC_TO_COUNT(200));
+
+ /* Step 4: An NOP command is issued to the DDR2-SDRAM */
+
+ putreg32(MPDDRC_MR_MODE_NOP, SAM_MPDDRC_MR);
+
+ /* Perform a write access to any DDR2-SDRAM address to
+ * acknowledge this command.
+ */
+
+ *ddr = 0;
+
+ /* Now CKE is driven high. */
+
+ /* Wait 400 ns min */
+
+ sam_sdram_delay(NSEC_TO_COUNT(400));
+
+ /* Step 5: An all banks precharge command is issued to the DDR2-SDRAM. */
+
+ putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR);
+
+ /* Perform a write access to any DDR2-SDRAM address to
+ * acknowledge this command.
+ */
+
+ *ddr = 0;
+
+ /* Wait 400 ns min */
+
+ sam_sdram_delay(NSEC_TO_COUNT(400));
+
+ /* Step 6: An Extended Mode Register set (EMRS2) cycle is issued to chose
+ * between commercialor high temperature operations.
+ *
+ * The write address must be chosen so that BA[1] is set to 1 and BA[0] is
+ * set to 0.
+ */
+
+ putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR);
+ *((volatile uint8_t *)(ddr + DDR2_BA1)) = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 7: An Extended Mode Register set (EMRS3) cycle is issued to set
+ * all registers to 0.
+ *
+ * The write address must be chosen so that BA[1] is set to 1 and BA[0] is
+ * set to 1.
+ */
+
+ putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR);
+ *((volatile uint8_t *)(ddr + DDR2_BA1 + DDR2_BA0)) = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 8: An Extended Mode Register set (EMRS1) cycle
+ * is issued to enable DLL.
+ *
+ * The write address must be chosen so that BA[1] is set to
+ * 0 and BA[0] is set to 1.
+ */
+
+ putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR);
+ *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0;
+
+ /* An additional 200 cycles of clock are required for locking DLL */
+
+ sam_sdram_delay(10000); /* CYCLES_TO_COUNT(200) */
+
+ /* Step 9: Program DLL field into the Configuration Register. */
+
+ regval = getreg32(SAM_MPDDRC_CR);
+ regval |= MPDDRC_CR_DLL;
+ putreg32(regval, SAM_MPDDRC_CR);
+
+ /* Step 10: A Mode Register set (MRS) cycle is issued to reset DLL.
+ *
+ * The write address must be chosen so that BA[1:0] bits are set to 0.
+ */
+
+ putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR);
+ *ddr = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 11: An all banks precharge command is issued to the DDR2-SDRAM.
+ *
+ * Perform a write access to any DDR2-SDRAM address to acknowledge this
+ * command
+ */
+
+ putreg32(MPDDRC_MR_MODE_PRCGALL, SAM_MPDDRC_MR);
+ *ddr = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 12: Two auto-refresh (CBR) cycles are provided. Program the auto
+ * refresh command (CBR) into the Mode Register.
+ *
+ * Perform a write access to any DDR2-SDRAM address to acknowledge this
+ * command.
+ */
+
+ putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR);
+ *ddr = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Configure 2nd CBR.
+ *
+ * Perform a write access to any DDR2-SDRAM address to
+ * acknowledge this command.
+ */
+
+ putreg32(MPDDRC_MR_MODE_RFSH, SAM_MPDDRC_MR);
+ *ddr = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 13: Program DLL field into the Configuration Register to low
+ * (Disable DLL reset).
+ */
+
+ regval = getreg32(SAM_MPDDRC_CR);
+ regval &= ~MPDDRC_CR_DLL;
+ putreg32(regval, SAM_MPDDRC_CR);
+
+ /* Step 14: A Mode Register set (MRS) cycle is issued to program the
+ * parameters of the DDR2-SDRAM devices.
+ *
+ * The write address must be chosen so that BA[1:0] are set to 0.
+ */
+
+ putreg32(MPDDRC_MR_MODE_LMR, SAM_MPDDRC_MR);
+ *ddr = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 15: Program OCD field into the Configuration Register to high (OCD
+ * calibration default).
+ */
+
+ regval = getreg32(SAM_MPDDRC_CR);
+ regval |= MPDDRC_CR_OCD_DEFAULT;
+ putreg32(regval, SAM_MPDDRC_CR);
+
+ /* Step 16: An Extended Mode Register set (EMRS1) cycle is issued to OCD
+ * default value.
+ *
+ * The write address must be chosen so that BA[1] is set to 0 and BA[0] is
+ * set to 1.
+ */
+
+ putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR);
+ *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 17: Program OCD field into the Configuration Register to low (OCD
+ * calibration mode exit).
+ */
+
+#if 0
+ regval = getreg32(SAM_MPDDRC_CR);
+ regval &= ~MPDDRC_CR_OCD_MASK;
+ putreg32(regval, SAM_MPDDRC_CR);
+#endif
+
+ /* Step 18: An Extended Mode Register set (EMRS1) cycle is issued to
+ * enable OCD exit.
+ *
+ * The write address must be chosen so that BA[1] is set to 0 and BA[0] is
+ * set to 1.
+ */
+
+ putreg32(MPDDRC_MR_MODE_EXTLMR, SAM_MPDDRC_MR);
+ *((volatile uint8_t *)(ddr + DDR2_BA0)) = 0;
+
+ /* Wait 2 cycles min */
+
+ sam_sdram_delay(100); /* CYCLES_TO_COUNT(2) */
+
+ /* Step 19,20: A mode Normal command is provided. Program the Normal mode
+ * into Mode Register.
+ */
+
+ putreg32(MPDDRC_MR_MODE_NORMAL, SAM_MPDDRC_MR);
+ *ddr = 0;
+
+ /* Step 21: Write the refresh rate into the count field in the Refresh
+ * Timer register. The DDR2-SDRAM device requires a refresh every 15.625
+ * usec or 7.81 usec.
+ *
+ * With a 100MHz frequency, the refresh timer count register must to be
+ * set with (15.625 /100 MHz) = 1562 i.e. 0x061A or (7.81 /100MHz) = 781
+ * i.e. 0x030d.
+ */
+
+ /* For W971GG6SB, The refresh period is 64ms (commercial), This equates
+ * to an average refresh rate of 7.8125usec (commercial), To ensure all
+ * rows of all banks are properly refreshed, 8192 REFRESH commands must be
+ * issued every 64ms (commercial)
+ */
+
+ /* ((64 x 10(^-3))/8192) x133 x (10^6) */
+
+ /* Set Refresh timer 7.8125 us */
+
+ putreg32(MPDDRC_RTR_COUNT(300), SAM_MPDDRC_RTR);
+
+ /* OK now we are ready to work on the DDRSDR */
+
+ /* Wait for end of calibration */
+
+ sam_sdram_delay(500);
+}
+
+#endif /* CONFIG_SAMA5_DDRCS && !CONFIG_SAMA5_BOOT_SDRAM */
diff --git a/boards/arm/sama5/giant-board/src/sam_spi.c b/boards/arm/sama5/giant-board/src/sam_spi.c
new file mode 100644
index 0000000..a16b369
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_spi.c
@@ -0,0 +1,166 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_spi.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/spi/spi.h>
+#include <arch/board/board.h>
+
+#include "arm_arch.h"
+#include "chip.h"
+#include "sam_pio.h"
+#include "sam_spi.h"
+#include "giant-board.h"
+
+#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_spidev_initialize
+ *
+ * Description:
+ * Called to configure SPI chip select PIO pins for the SAMA5D3-Xplained
+ * board.
+ *
+ ****************************************************************************/
+
+void weak_function sam_spidev_initialize(void)
+{
+#ifdef CONFIG_SAMA5_SPI0
+#endif
+
+#ifdef CONFIG_SAMA5_SPI1
+#endif
+}
+
+/****************************************************************************
+ * Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata
+ *
+ * Description:
+ * These external functions must be provided by board-specific logic.
+ * They include:
+ *
+ * o sam_spi[0|1]select is a functions tomanage the board-specific chip
+ * selects
+ * o sam_spi[0|1]status and sam_spi[0|1]cmddata:
+ * Implementations of the status and cmddata methods of the SPI interface
+ * defined by struct spi_ops_(see include/nuttx/spi/spi.h).
+ * All other methods including sam_spibus_initialize()) are provided by
+ * common SAM3/4 logic.
+ *
+ * To use this common SPI logic on your board:
+ *
+ * 1. Provide logic in sam_boardinitialize() to configure SPI chip select
+ * pins.
+ * 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in
+ * your board-specific logic.
+ * These functions will perform chip selection and status operations
+ * using PIOs in the way your board is configured.
+ * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
+ * sam_spi[0|1]cmddata() functions in your board-specific logic. This
+ * function will perform cmd/data selection operations using PIOs in
+ * the way your board is configured.
+ * 3. Add a call to sam_spibus_initialize() in your low level application
+ * initialization logic
+ * 4. The handle returned by sam_spibus_initialize() may then be used to
+ * bind the SPI driver to higher level logic (e.g., calling
+ * mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ * the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_spi[0|1]select
+ *
+ * Description:
+ * PIO chip select pins may be programmed by the board specific logic in
+ * one of two different ways. First, the pins may be programmed as SPI
+ * peripherals. In that case, the pins are completely controlled by the
+ * SPI driver. This method still needs to be provided, but it may be only
+ * a stub.
+ *
+ * An alternative way to program the PIO chip select pins is as a normal
+ * PIO output. In that case, the automatic control of the CS pins is
+ * bypassed and this function must provide control of the chip select.
+ * NOTE: In this case, the PIO output pin does *not* have to be the
+ * same as the NPCS pin normal associated with the chip select number.
+ *
+ * Input Parameters:
+ * devid - Identifies the (logical) device
+ * selected - TRUE:Select the device, FALSE:De-select the device
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMA5_SPI0
+void sam_spi0select(uint32_t devid, bool selected)
+{
+}
+#endif
+
+#ifdef CONFIG_SAMA5_SPI1
+void sam_spi1select(uint32_t devid, bool selected)
+{
+}
+#endif
+
+/****************************************************************************
+ * Name: sam_spi[0|1]status
+ *
+ * Description:
+ * Return status information associated with the SPI device.
+ *
+ * Input Parameters:
+ * devid - Identifies the (logical) device
+ *
+ * Returned Value:
+ * Bit-encoded SPI status (see include/nuttx/spi/spi.h.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMA5_SPI0
+uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_SAMA5_SPI0
+uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#endif /* CONFIG_SAMA5_SPI0 || CONFIG_SAMA5_SPI1 */
diff --git a/boards/arm/sama5/giant-board/src/sam_usb.c b/boards/arm/sama5/giant-board/src/sam_usb.c
new file mode 100644
index 0000000..7f726b5
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_usb.c
@@ -0,0 +1,479 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_usb.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <sched.h>
+#include <errno.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/kthread.h>
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbhost.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include "arm_arch.h"
+#include "sam_pio.h"
+#include "sam_usbhost.h"
+#include "hardware/sam_ohci.h"
+#include "giant-board.h"
+
+#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_SAMA5D3XPLAINED_USBHOST_PRIO
+# define CONFIG_SAMA5D3XPLAINED_USBHOST_PRIO 50
+#endif
+
+#ifndef CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE
+# define CONFIG_SAMA5D3XPLAINED_USBHOST_STACKSIZE 1024
+#endif
+
+#ifdef HAVE_USBDEV
+# undef CONFIG_SAMA5_UHPHS_RHPORT1
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Retained device driver handles */
+
+#ifdef CONFIG_SAMA5_OHCI
+static struct usbhost_connection_s *g_ohciconn;
+#endif
+#ifdef CONFIG_SAMA5_EHCI
+static struct usbhost_connection_s *g_ehciconn;
+#endif
+
+/* Overcurrent interrupt handler */
+
+#if defined(HAVE_USBHOST) && defined(CONFIG_SAMA5_PIOD_IRQ)
+static xcpt_t g_ochandler;
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ * Wait for USB devices to be connected to either the OHCI or EHCI hub.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_USBHOST
+#ifdef CONFIG_DEBUG_USB
+static int usbhost_waiter(struct usbhost_connection_s *dev,
+ const char *hcistr)
+#else
+static int usbhost_waiter(struct usbhost_connection_s *dev)
+#endif
+{
+ struct usbhost_hubport_s *hport;
+
+ uinfo("Running\n");
+ for (; ; )
+ {
+ /* Wait for the device to change state */
+
+ DEBUGVERIFY(CONN_WAIT(dev, &hport));
+ uinfo("%s\n", hport->connected ? "connected" : "disconnected");
+
+ /* Did we just become connected? */
+
+ if (hport->connected)
+ {
+ /* Yes.. enumerate the newly connected device */
+
+ CONN_ENUMERATE(dev, hport);
+ }
+ }
+
+ /* Keep the compiler from complaining */
+
+ return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: ohci_waiter
+ *
+ * Description:
+ * Wait for USB devices to be connected to the OHCI hub.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMA5_OHCI
+static int ohci_waiter(int argc, char *argv[])
+{
+#ifdef CONFIG_DEBUG_USB
+ return usbhost_waiter(g_ohciconn, "OHCI");
+#else
+ return usbhost_waiter(g_ohciconn);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Name: ehci_waiter
+ *
+ * Description:
+ * Wait for USB devices to be connected to the EHCI hub.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAMA5_EHCI
+static int ehci_waiter(int argc, char *argv[])
+{
+#ifdef CONFIG_DEBUG_USB
+ return usbhost_waiter(g_ehciconn, "EHCI");
+#else
+ return usbhost_waiter(g_ehciconn);
+#endif
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sam_usbinitialize
+ *
+ * Description:
+ * Called from sam_usbinitialize very early in inialization to setup
+ * USB-related GPIO pins for the SAMA5D3-Xplained board.
+ *
+ * USB Ports
+ * The SAMA5D2 series-MB features three USB communication ports:
+ *
+ * 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed
+ * with USB Device High Speed Micro AB connector, J20
+ *
+ * 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A
+ * connector, J19 upper port
+ *
+ * 3. Port C Host Full Speed (OHCI) only standard type A connector, J19
+ * lower port
+ *
+ * The two USB host ports (only) are equipped with 500-mA high-side power
+ * switch for self-powered and bus-powered applications.
+ *
+ * That offers a lot of flexibility. However, here we enable the ports only
+ * as follows:
+ *
+ * Port A -- USB device
+ * Port B -- EHCI host
+ * Port C -- OHCI host
+ *
+ ****************************************************************************/
+
+void weak_function sam_usbinitialize(void)
+{
+#ifdef HAVE_USBDEV
+ /* Configure Port A to support the USB device function */
+
+#endif
+
+#ifdef HAVE_USBHOST
+# ifdef CONFIG_SAMA5_UHPHS_RHPORT1
+# endif
+
+# ifdef CONFIG_SAMA5_UHPHS_RHPORT2
+# endif
+#endif /* HAVE_USBHOST */
+}
+
+/****************************************************************************
+ * Name: sam_usbhost_initialize
+ *
+ * Description:
+ * Called at application startup time to initialize the USB host
+ * functionality.
+ * This function will start a thread that will monitor for device
+ * connection/disconnection events.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_USBHOST
+int sam_usbhost_initialize(void)
+{
+ pid_t pid;
+ int ret;
+
+ /* First, register all of the class drivers needed to support the drivers
+ * that we care about
+ */
+
+#ifdef CONFIG_USBHOST_HUB
+ /* Initialize USB hub class support */
+
+ ret = usbhost_hub_initialize();
+ if (ret < 0)
+ {
+ uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+ /* Register theUSB host Mass Storage Class */
+
+ ret = usbhost_msc_initialize();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+ /* Register the CDC/ACM serial class */
+
+ ret = usbhost_cdcacm_initialize();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+ /* Register the USB host HID keyboard class driver */
+
+ ret = usbhost_kbdinit();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the KBD class\n");
+ }
+#endif
+
+ /* Then get an instance of the USB host interface. */
+
+#ifdef CONFIG_SAMA5_OHCI
+ /* Get an instance of the USB OHCI interface */
+
+ g_ohciconn = sam_ohci_initialize(0);
+ if (!g_ohciconn)
+ {
+ uerr("ERROR: sam_ohci_initialize failed\n");
+ return -ENODEV;
+ }
+
+ /* Start a thread to handle device connection. */
+
+ pid = kthread_create("OHCI Monitor",
+ CONFIG_SAMA5D27_GIANT_BOARD_USBHOST_PRIO,
+ CONFIG_SAMA5D27_GIANT_BOARD_USBHOST_STACKSIZE,
+ (main_t)ohci_waiter, (FAR char * const *)NULL);
+ if (pid < 0)
+ {
+ uerr("ERROR: Failed to create ohci_waiter task: %d\n", ret);
+ return -ENODEV;
+ }
+#endif
+
+#ifdef CONFIG_SAMA5_EHCI
+ /* Get an instance of the USB EHCI interface */
+
+ g_ehciconn = sam_ehci_initialize(0);
+ if (!g_ehciconn)
+ {
+ uerr("ERROR: sam_ehci_initialize failed\n");
+ return -ENODEV;
+ }
+
+ /* Start a thread to handle device connection. */
+
+ pid = kthread_create("EHCI Monitor",
+ CONFIG_SAMA5D27_GIANT_BOARD_USBHOST_PRIO,
+ CONFIG_SAMA5D27_GIANT_BOARD_USBHOST_STACKSIZE,
+ (main_t)ehci_waiter, (FAR char * const *)NULL);
+ if (pid < 0)
+ {
+ uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+ return -ENODEV;
+ }
+#endif
+
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: sam_usbhost_vbusdrive
+ *
+ * Description:
+ * Enable/disable driving of VBUS 5V output.
+ * This function must be provided by each platform that implements the
+ * OHCI or EHCI host interface
+ *
+ * Input Parameters:
+ * rhport - Selects root hub port to be powered host interface.
+ * See SAM_RHPORT_* definitions above.
+ * enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_USBHOST
+void sam_usbhost_vbusdrive(int rhport, bool enable)
+{
+ pio_pinset_t pinset = 0;
+
+ uinfo("RHPort%d: enable=%d\n", rhport + 1, enable);
+
+ /* Pick the PIO configuration associated with the selected root hub port */
+
+ switch (rhport)
+ {
+ case SAM_RHPORT1:
+#if !defined(CONFIG_SAMA5_UHPHS_RHPORT1)
+ uerr("ERROR: RHPort1 is not available in this configuration\n");
+ return;
+
+#elif !defined(PIO_USBA_VBUS_ENABLE)
+ /* SAMA5D2-XULT has no port A VBUS enable */
+
+ uerr("ERROR: RHPort1 has no VBUS enable\n");
+ return;
+#else
+ break;
+#endif
+
+ case SAM_RHPORT2:
+#ifndef CONFIG_SAMA5_UHPHS_RHPORT2
+ uerr("ERROR: RHPort2 is not available in this configuration\n");
+ return;
+#else
+ break;
+#endif
+
+ default:
+ uerr("ERROR: RHPort%d is not supported\n", rhport + 1);
+ return;
+ }
+
+ /* Then enable or disable VBUS power (active high) */
+
+ if (enable)
+ {
+ /* Enable the Power Switch by driving the enable pin high */
+
+ sam_piowrite(pinset, true);
+ }
+ else
+ {
+ /* Disable the Power Switch by driving the enable pin low */
+
+ sam_piowrite(pinset, false);
+ }
+}
+#endif
+
+/****************************************************************************
+ * Name: sam_setup_overcurrent
+ *
+ * Description:
+ * Setup to receive an interrupt-level callback if an overcurrent condition
+ * is detected on port B or C.
+ *
+ * REVISIT: Since this is a common signal, we will need to come up with
+ * some way to inform both EHCI and OHCI drivers when this error occurs.
+ *
+ * Input Parameters:
+ * handler - New overcurrent interrupt handler
+ *
+ * Returned Value:
+ * Old overcurrent interrupt handler
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_USBHOST
+xcpt_t sam_setup_overcurrent(xcpt_t handler)
+{
+#if defined(CONFIG_SAMA5_PIOD_IRQ) && (defined(CONFIG_SAMA5_UHPHS_RHPORT2) || \
+ defined(CONFIG_SAMA5_UHPHS_RHPORT3))
+
+ xcpt_t oldhandler;
+ irqstate_t flags;
+
+ /* Disable interrupts until we are done. This guarantees that the
+ * following operations are atomic.
+ */
+
+ flags = enter_critical_section();
+
+ /* Get the old interrupt handler and save the new one */
+
+ oldhandler = g_ochandler;
+ g_ochandler = handler;
+
+ /* Configure the interrupt */
+
+ sam_pioirq(PIO_USBBC_VBUS_OVERCURRENT);
+ irq_attach(IRQ_USBBC_VBUS_OVERCURRENT, handler, NULL);
+ sam_pioirqenable(IRQ_USBBC_VBUS_OVERCURRENT);
+
+ /* Return the old handler (so that it can be restored) */
+
+ leave_critical_section(flags);
+ return oldhandler;
+
+#else
+ return NULL;
+
+#endif
+}
+#endif /* CONFIG_SAMA5_PIOD_IRQ ... */
+
+/****************************************************************************
+ * Name: sam_usbsuspend
+ *
+ * Description:
+ * Board logic must provide the sam_usbsuspend logic if the USBDEV driver
+ * is used.
+ * This function is called whenever the USB enters or leaves suspend mode.
+ * This is an opportunity for the board logic to shutdown clocks, power,
+ * etc. while the USB is suspended.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+ uinfo("resume: %d\n", resume);
+}
+#endif
+#endif /* CONFIG_SAMA5_UHPHS || CONFIG_SAMA5_UDPHS */
diff --git a/boards/arm/sama5/giant-board/src/sam_usbmsc.c b/boards/arm/sama5/giant-board/src/sam_usbmsc.c
new file mode 100644
index 0000000..61211c8
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_usbmsc.c
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_usbmsc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <nuttx/board.h>
+
+#include "giant-board.h"
+
+#ifdef CONFIG_USBMSC
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef HAVE_AT25
+# error AT25 Serial FLASH not supported
+#endif
+
+#ifndef CONFIG_SAMA5D3XPLAINED_AT25_FTL
+# error AT25 FTL support required (CONFIG_SAMA5D3XPLAINED_AT25_FTL)
+# undef HAVE_AT25
+#endif
+
+#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1
+# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0
+#endif
+
+#if CONFIG_SYSTEM_USBMSC_DEVMINOR1 != AT25_MINOR
+# error Confusion in the assignment of minor device numbers
+# undef HAVE_AT25
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_usbmsc_initialize
+ *
+ * Description:
+ * Perform architecture specific initialization as needed to establish
+ * the mass storage device that will be exported by the USB MSC device.
+ *
+ ****************************************************************************/
+
+int board_usbmsc_initialize(int port)
+{
+ /* Initialize the AT25 MTD driver */
+
+#ifdef HAVE_AT25
+ int ret = sam_at25_automount(AT25_MINOR);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret);
+ }
+
+ return ret;
+#else
+ return -ENODEV;
+#endif
+}
+
+#endif /* CONFIG_USBMSC */
diff --git a/boards/arm/sama5/giant-board/src/sam_userleds.c b/boards/arm/sama5/giant-board/src/sam_userleds.c
new file mode 100644
index 0000000..7552953
--- /dev/null
+++ b/boards/arm/sama5/giant-board/src/sam_userleds.c
@@ -0,0 +1,98 @@
+/****************************************************************************
+ * boards/arm/sama5/giant-board/src/sam_userleds.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* There is an orange status LED on board the Giant Board
+ * driven by pin (PA6).
+ *
+ * ------------------------------ ------------------- ---------------------
+ * SAMA5D27 PIO SIGNAL USAGE
+ * ------------------------------ ------------------- ---------------------
+ * PA6 STATUS_LED Orange LED
+ * ------------------------------ ------------------- ---------------------
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "sam_pio.h"
+#include "giant-board.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ ****************************************************************************/
+
+uint32_t board_userled_initialize(void)
+{
+ /* Configure LED PIOs for output */
+
+#ifndef CONFIG_ARCH_LEDS
+ sam_configpio(PIO_LED_ORANGE);
+#endif
+ return BOARD_NLEDS;
+}
+
+/****************************************************************************
+ * Name: board_userled
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+ uint32_t ledcfg;
+
+ if (led == BOARD_ORANGE)
+ {
+ ledcfg = PIO_LED_ORANGE;
+ }
+ else
+ {
+ return;
+ }
+
+ /* High illuminates */
+
+ sam_piowrite(ledcfg, ledon);
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ ****************************************************************************/
+
+void board_userled_all(uint32_t ledset)
+{
+ bool ledon;
+
+ /* High illuminates */
+
+ ledon = ((ledset & BOARD_ORANGE_BIT) != 0);
+ sam_piowrite(PIO_LED_ORANGE, ledon);
+}