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Posted to commits@mynewt.apache.org by ja...@apache.org on 2022/03/16 08:24:33 UTC
[mynewt-core] 01/02: AmbiqSuite SDK Integration
This is an automated email from the ASF dual-hosted git repository.
janc pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 81ba3ecd15a2c2703a1d1c9623c914649ffd4e8e
Author: Tian Zeng <ti...@proxy.com>
AuthorDate: Mon Mar 14 15:41:05 2022 -0400
AmbiqSuite SDK Integration
---
hw/mcu/ambiq/apollo2/pkg.yml | 6 +
.../{ => apollo2}/src/ext/AmbiqSuite/mcu/Makefile | 0
.../src/ext/AmbiqSuite/mcu/apollo2/Makefile | 0
.../src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h | 0
.../src/ext/AmbiqSuite/mcu/apollo2/hal/Makefile | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.h | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.c | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.h | 0
.../mcu/apollo2/hal/am_hal_i2c_bit_bang.c | 0
.../mcu/apollo2/hal/am_hal_i2c_bit_bang.h | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.c | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.h | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.c | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pin.h | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.c | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.h | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.c | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.h | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_systick.c | 0
.../AmbiqSuite/mcu/apollo2/hal/am_hal_systick.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.h | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.c | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.h | 0
.../mcu/apollo2/hal/atollic_gcc/.cproject | 0
.../mcu/apollo2/hal/atollic_gcc/.project | 0
....atollic.truestudio.debug.hardware_device.prefs | 0
.../.settings/com.atollic.truestudio.tsp.prefs | 0
.../atollic_gcc/.settings/language.settings.xml | 0
.../org.eclipse.cdt.managedbuilder.core.prefs | 0
.../mcu/apollo2/hal/atollic_gcc/Makefile | 0
.../apollo2/hal/atollic_gcc/libam_hal_gcc.errlog | 0
.../mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.log | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/gcc/Makefile | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/iar/Makefile | 0
.../AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewd | 0
.../AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewp | 0
.../AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.eww | 0
.../ext/AmbiqSuite/mcu/apollo2/hal/keil/Makefile | 0
.../mcu/apollo2/hal/keil/libam_hal.uvoptx | 0
.../mcu/apollo2/hal/keil/libam_hal.uvprojx | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_adc.h | 0
.../mcu/apollo2/regs/am_reg_base_addresses.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_cachectrl.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_clkgen.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_ctimer.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_flashctrl.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_gpio.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_iomstr.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_ioslave.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_itm.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_jedec.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_macros.h | 0
.../mcu/apollo2/regs/am_reg_macros_asm.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_mcuctrl.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_nvic.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pdm.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_pwrctrl.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_rstgen.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rtc.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_sysctrl.h | 0
.../AmbiqSuite/mcu/apollo2/regs/am_reg_systick.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_tpiu.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_uart.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_vcomp.h | 0
.../ext/AmbiqSuite/mcu/apollo2/regs/am_reg_wdt.h | 0
.../src/ext/AmbiqSuite/utils/am_util.h | 0
.../src/ext/AmbiqSuite/utils/am_util_cmdline.c | 0
.../src/ext/AmbiqSuite/utils/am_util_cmdline.h | 0
.../src/ext/AmbiqSuite/utils/am_util_debug.c | 0
.../src/ext/AmbiqSuite/utils/am_util_debug.h | 0
.../src/ext/AmbiqSuite/utils/am_util_delay.c | 0
.../src/ext/AmbiqSuite/utils/am_util_delay.h | 0
.../src/ext/AmbiqSuite/utils/am_util_faultisr.c | 0
.../src/ext/AmbiqSuite/utils/am_util_id.c | 0
.../src/ext/AmbiqSuite/utils/am_util_id.h | 0
.../src/ext/AmbiqSuite/utils/am_util_math.c | 0
.../src/ext/AmbiqSuite/utils/am_util_math.h | 0
.../src/ext/AmbiqSuite/utils/am_util_plot.c | 0
.../src/ext/AmbiqSuite/utils/am_util_plot.h | 0
.../src/ext/AmbiqSuite/utils/am_util_regdump.c | 0
.../src/ext/AmbiqSuite/utils/am_util_regdump.h | 0
.../src/ext/AmbiqSuite/utils/am_util_ring_buffer.c | 0
.../src/ext/AmbiqSuite/utils/am_util_ring_buffer.h | 0
.../src/ext/AmbiqSuite/utils/am_util_stdio.c | 0
.../src/ext/AmbiqSuite/utils/am_util_stdio.h | 0
.../src/ext/AmbiqSuite/utils/am_util_stopwatch.c | 0
.../src/ext/AmbiqSuite/utils/am_util_stopwatch.h | 0
.../src/ext/AmbiqSuite/utils/am_util_string.c | 0
.../src/ext/AmbiqSuite/utils/am_util_string.h | 0
.../src/ext/AmbiqSuite/utils/am_util_stxetx.c | 0
.../src/ext/AmbiqSuite/utils/am_util_stxetx.h | 0
.../src/ext/AmbiqSuite/utils/am_util_tap_detect.c | 0
.../src/ext/AmbiqSuite/utils/am_util_tap_detect.h | 0
.../src/ext/AmbiqSuite/utils/am_util_time.c | 0
.../src/ext/AmbiqSuite/utils/am_util_time.h | 0
.../{ => apollo3}/src/ext/AmbiqSuite/mcu/Makefile | 17 +-
.../src/ext/AmbiqSuite/mcu/am_sdk_version.h} | 52 +-
.../src/ext/AmbiqSuite/mcu/apollo3}/Makefile | 44 +-
.../ext/AmbiqSuite/mcu/apollo3}/am_mcu_apollo.h | 91 +-
.../src/ext/AmbiqSuite/mcu/apollo3/hal}/Makefile | 43 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.c | 1273 +++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.h | 678 ++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.c | 3132 ++++++++++++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.h | 990 +++++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.c | 704 ++++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.h} | 99 +-
.../mcu/apollo3/hal/am_hal_ble_patch_b0.c | 778 ++++
.../mcu/apollo3/hal/am_hal_ble_patch_b0.h} | 99 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.c | 272 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.h} | 149 +-
.../AmbiqSuite/mcu/apollo3/hal/am_hal_cachectrl.c | 459 +++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_cachectrl.h | 289 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_clkgen.c | 410 +++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_clkgen.h | 366 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_cmdq.c | 847 +++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_cmdq.h | 292 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ctimer.c | 2203 +++++++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ctimer.h | 554 +++
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_debug.c | 30 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_debug.h | 79 +-
.../AmbiqSuite/mcu/apollo3/hal/am_hal_entropy.c | 349 ++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_entropy.h} | 110 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_flash.c | 890 +++--
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_flash.h | 227 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_global.c | 167 +
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_global.h | 183 +
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_gpio.c | 1330 +++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_gpio.h | 911 +++++
.../AmbiqSuite/mcu/apollo3}/hal/am_hal_interrupt.c | 295 +-
.../AmbiqSuite/mcu/apollo3/hal/am_hal_interrupt.h} | 45 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_iom.c | 3831 ++++++++++++++++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_iom.h | 843 +++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ios.c | 1148 ++++++
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_ios.h | 215 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_itm.c | 139 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_itm.h | 32 +-
.../AmbiqSuite/mcu/apollo3/hal/am_hal_mcuctrl.c | 563 +++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_mcuctrl.h | 367 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_mspi.c | 3305 +++++++++++++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_mspi.h | 763 ++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_pdm.c | 650 ++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_pdm.h | 317 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_pin.h | 493 +++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_pwrctrl.c | 702 ++++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_pwrctrl.h | 260 ++
.../mcu/apollo3/hal/am_hal_pwrctrl_internal.h | 339 ++
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_queue.c | 53 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_queue.h | 59 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_reset.c | 313 ++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_reset.h | 302 ++
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_rtc.c | 218 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_rtc.h | 37 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_scard.c | 1574 ++++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_scard.h | 659 ++++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_secure_ota.c | 245 ++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_secure_ota.h | 227 ++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_security.c | 672 ++++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_security.h | 210 ++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_status.h} | 54 +-
.../AmbiqSuite/mcu/apollo3}/hal/am_hal_stimer.c | 236 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_stimer.h | 217 ++
.../AmbiqSuite/mcu/apollo3/hal/am_hal_sysctrl.c | 339 ++
.../AmbiqSuite/mcu/apollo3}/hal/am_hal_sysctrl.h | 87 +-
.../AmbiqSuite/mcu/apollo3}/hal/am_hal_systick.c | 243 +-
.../AmbiqSuite/mcu/apollo3}/hal/am_hal_systick.h | 25 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_tpiu.c | 84 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_tpiu.h | 40 +-
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_uart.c | 1502 ++++++++
.../ext/AmbiqSuite/mcu/apollo3/hal/am_hal_uart.h | 760 ++++
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_wdt.c | 176 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/am_hal_wdt.h | 49 +-
.../ext/AmbiqSuite/mcu/apollo3}/hal/gcc/Makefile | 124 +-
.../mcu/apollo3/hal/iar/Debug/.ninja_deps | Bin 0 -> 21928 bytes
.../mcu/apollo3/hal/iar/Debug/.ninja_log | 36 +
.../ext/AmbiqSuite/mcu/apollo3}/hal/iar/Makefile | 78 +-
.../AmbiqSuite/mcu/apollo3}/hal/iar/libam_hal.ewd | 6 +-
.../AmbiqSuite/mcu/apollo3}/hal/iar/libam_hal.ewp | 77 +-
.../AmbiqSuite/mcu/apollo3}/hal/iar/libam_hal.eww | 0
.../ext/AmbiqSuite/mcu/apollo3}/hal/keil/Makefile | 89 +-
.../mcu/apollo3}/hal/keil/libam_hal.uvoptx | 200 +-
.../mcu/apollo3}/hal/keil/libam_hal.uvprojx | 104 +-
.../mcu/apollo3/regs/am_mcu_apollo3_info0.h | 1376 +++++++
.../src/ext/AmbiqSuite/mcu/apollo3/regs/am_reg.h | 281 ++
.../mcu/apollo3/regs/am_reg_base_addresses.h | 98 +
.../mcu/apollo3/regs/am_reg_iomstr_cmd.h} | 64 +-
.../ext/AmbiqSuite/mcu/apollo3/regs/am_reg_jedec.h | 369 ++
.../ext/AmbiqSuite/mcu/apollo3/regs/am_reg_m4.h} | 60 +-
.../AmbiqSuite/mcu/apollo3/regs/am_reg_macros.h} | 111 +-
.../mcu/apollo3/regs/am_reg_macros_asm.h} | 36 +-
hw/mcu/ambiq/pkg.yml | 10 +-
229 files changed, 41822 insertions(+), 2108 deletions(-)
diff --git a/hw/mcu/ambiq/apollo2/pkg.yml b/hw/mcu/ambiq/apollo2/pkg.yml
index 48425f9..7414842 100644
--- a/hw/mcu/ambiq/apollo2/pkg.yml
+++ b/hw/mcu/ambiq/apollo2/pkg.yml
@@ -25,6 +25,12 @@ pkg.keywords:
- ambiq
- apollo2
+pkg.type: sdk
+
+pkg.cflags:
+ - '-DAM_PART_APOLLO2'
+ - '-Wno-enum-compare'
+
pkg.deps:
- "@apache-mynewt-core/hw/hal"
- "@apache-mynewt-core/hw/mcu/ambiq"
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/Makefile
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/Makefile
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/Makefile
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/Makefile
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/Makefile
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_adc.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_cachectrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_clkgen.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ctimer.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_debug.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_flash.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_global.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_gpio.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_i2c_bit_bang.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_interrupt.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_iom.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ios.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_itm.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_mcuctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_otp.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pdm.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pin.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pin.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pin.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pin.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_pwrctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_queue.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_reset.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_rtc.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_stimer.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_sysctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_systick.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_tpiu.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_uart.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_vcomp.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.c
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.c
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_wdt.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.cproject b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.cproject
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.cproject
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.cproject
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.project b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.project
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.project
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.project
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.debug.hardware_device.prefs
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.debug.hardware_device.prefs
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.debug.hardware_device.prefs
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.tsp.prefs b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.tsp.prefs
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.tsp.prefs
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/com.atollic.truestudio.tsp.prefs
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/language.settings.xml b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/language.settings.xml
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/language.settings.xml
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/language.settings.xml
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/org.eclipse.cdt.managedbuilder.core.prefs
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/org.eclipse.cdt.managedbuilder.core.prefs
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/.settings/org.eclipse.cdt.managedbuilder.core.prefs
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/Makefile
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/Makefile
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.errlog b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.errlog
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.errlog
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.errlog
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.log b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.log
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.log
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/atollic_gcc/libam_hal_gcc.log
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/gcc/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/gcc/Makefile
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/gcc/Makefile
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/gcc/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/Makefile
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/Makefile
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewd b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewd
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewd
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewd
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewp b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewp
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewp
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.ewp
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.eww b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.eww
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.eww
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/iar/libam_hal.eww
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/Makefile b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/Makefile
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/Makefile
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/Makefile
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvoptx b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvoptx
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvoptx
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvoptx
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvprojx b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvprojx
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvprojx
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/hal/keil/libam_hal.uvprojx
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_adc.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_adc.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_adc.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_adc.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_base_addresses.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_base_addresses.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_base_addresses.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_base_addresses.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_cachectrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_cachectrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_cachectrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_cachectrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_clkgen.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_clkgen.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_clkgen.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_clkgen.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ctimer.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ctimer.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ctimer.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ctimer.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_flashctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_flashctrl.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_flashctrl.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_flashctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_gpio.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_gpio.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_gpio.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_gpio.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_iomstr.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_iomstr.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_iomstr.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_iomstr.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ioslave.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ioslave.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ioslave.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_ioslave.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_itm.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_itm.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_itm.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_itm.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_jedec.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_jedec.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_jedec.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_jedec.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros_asm.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros_asm.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros_asm.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_macros_asm.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_mcuctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_mcuctrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_mcuctrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_mcuctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_nvic.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_nvic.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_nvic.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_nvic.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pdm.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pdm.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pdm.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pdm.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pwrctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pwrctrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pwrctrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_pwrctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rstgen.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rstgen.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rstgen.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rstgen.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rtc.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rtc.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rtc.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_rtc.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_sysctrl.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_sysctrl.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_sysctrl.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_sysctrl.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_systick.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_systick.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_systick.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_systick.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_tpiu.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_tpiu.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_tpiu.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_tpiu.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_uart.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_uart.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_uart.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_uart.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_vcomp.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_vcomp.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_vcomp.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_vcomp.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_wdt.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_wdt.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_wdt.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/mcu/apollo2/regs/am_reg_wdt.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_cmdline.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_cmdline.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_cmdline.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_cmdline.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_debug.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_debug.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_debug.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_debug.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_debug.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_debug.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_debug.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_debug.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_delay.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_delay.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_delay.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_delay.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_delay.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_delay.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_delay.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_delay.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_faultisr.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_faultisr.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_faultisr.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_faultisr.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_id.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_id.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_id.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_id.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_math.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_math.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_math.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_math.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_math.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_math.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_math.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_math.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_plot.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_plot.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_plot.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_plot.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_plot.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_plot.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_plot.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_plot.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_regdump.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_regdump.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_regdump.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_regdump.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_regdump.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_regdump.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_regdump.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_regdump.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_ring_buffer.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_ring_buffer.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_ring_buffer.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_ring_buffer.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_ring_buffer.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_ring_buffer.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_ring_buffer.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_ring_buffer.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stdio.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stdio.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stdio.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stdio.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stdio.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stdio.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stdio.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stdio.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stopwatch.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stopwatch.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stopwatch.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stopwatch.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stopwatch.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stopwatch.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stopwatch.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stopwatch.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_string.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_string.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_string.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_string.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_string.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_string.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_string.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_string.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stxetx.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stxetx.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stxetx.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stxetx.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stxetx.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stxetx.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_stxetx.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_stxetx.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_tap_detect.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_tap_detect.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_tap_detect.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_tap_detect.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_tap_detect.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_tap_detect.h
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_tap_detect.h
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_tap_detect.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_time.c b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_time.c
similarity index 100%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_time.c
rename to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_time.c
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_time.h b/hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_time.h
similarity index 100%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_time.h
copy to hw/mcu/ambiq/apollo2/src/ext/AmbiqSuite/utils/am_util_time.h
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/Makefile
similarity index 88%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
copy to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/Makefile
index adc6122..bc6ec17 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/Makefile
@@ -2,23 +2,26 @@
#
# Makefile - Rules for building the libraries, examples and docs.
#
-# Copyright (c) 2017, Ambiq Micro
+# Copyright (c) 2021, Ambiq Micro, Inc.
# All rights reserved.
-#
+#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
-#
+#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
-#
+#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
-#
+#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
-#
+#
+# Third party software included in this distribution is subject to the
+# additional license terms as defined in the /docs/licenses directory.
+#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -31,7 +34,7 @@
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
-# This is part of revision 1.2.8 of the AmbiqSuite Development Package.
+# This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
#
#******************************************************************************
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/am_sdk_version.h
similarity index 72%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h
copy to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/am_sdk_version.h
index 98b2acd..8262d12 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/hal/am_hal_ttp.h
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/am_sdk_version.h
@@ -1,32 +1,35 @@
//*****************************************************************************
//
-// am_hal_ttp.h
+// am_sdk_version.h
//! @file
//!
-//! @brief Functions for handling the "two time program" interface.
+//! @brief Defines SDK version.
//!
//
//*****************************************************************************
//*****************************************************************************
//
-// Copyright (c) 2017, Ambiq Micro
+// Copyright (c) 2021, Ambiq Micro, Inc.
// All rights reserved.
-//
+//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
-//
+//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
-//
+//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
-//
+//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
-//
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -39,11 +42,11 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
-// This is part of revision v1.2.10-2-gea660ad-hotfix2 of the AmbiqSuite Development Package.
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
//
//*****************************************************************************
-#ifndef AM_HAL_TTP_H
-#define AM_HAL_TTP_H
+#ifndef AM_SDK_VERSION_H
+#define AM_SDK_VERSION_H
#ifdef __cplusplus
extern "C"
@@ -52,21 +55,26 @@ extern "C"
//*****************************************************************************
//
-// Function prototypes
+// Macros to define HAL SDK version.
//
//*****************************************************************************
-extern int am_hal_ttp_unlock(uint32_t ui32Keyval, uint8_t *pui8_1024Bytes);
+//
+// Define the current HAL version.
+//
+#ifndef AM_HAL_VERSION_MAJ
+#if 0
+#define AM_HAL_VERSION_MAJ 4
+#define AM_HAL_VERSION_MIN 0
+#define AM_HAL_VERSION_REV 3
+#else
+#define AM_HAL_VERSION_MAJ 3
+#define AM_HAL_VERSION_MIN 0
+#define AM_HAL_VERSION_REV 0
+#endif
+#endif // AM_HAL_VERSION_MAJ
#ifdef __cplusplus
}
#endif
-#endif // AM_HAL_TTP_H
-
-//*****************************************************************************
-//
-// End Doxygen group.
-//! @}
-//
-//*****************************************************************************
-
+#endif // AM_SDK_VERSION_H
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/Makefile
similarity index 76%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
copy to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/Makefile
index adc6122..d1c09b1 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/Makefile
@@ -2,23 +2,26 @@
#
# Makefile - Rules for building the libraries, examples and docs.
#
-# Copyright (c) 2017, Ambiq Micro
+# Copyright (c) 2021, Ambiq Micro, Inc.
# All rights reserved.
-#
+#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
-#
+#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
-#
+#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
-#
+#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
-#
+#
+# Third party software included in this distribution is subject to the
+# additional license terms as defined in the /docs/licenses directory.
+#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -30,26 +33,23 @@
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
-#
-# This is part of revision 1.2.8 of the AmbiqSuite Development Package.
+#
+# This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
#
#******************************************************************************
-SUBDIRS=${wildcard */}
-all:
- @for i in ${SUBDIRS}; \
- do \
- if [ -f $${i}/Makefile ]; then \
- $(MAKE) -C $${i} || exit $$?; fi; \
- done
+SUBDIRS=$(dir $(wildcard */Makefile))
+
+$(SUBDIRS)::
+ +$(MAKE) -C $@ $(MAKECMDGOALS)
-clean:
- @for i in ${SUBDIRS}; \
- do \
- if [ -f $${i}/Makefile ]; then \
- $(MAKE) -C $${i} clean; fi; \
- done
+.PHONY: subdirs all clean
+all subdirs clean: $(SUBDIRS)
+ifneq ($(SUBDIRSBUILD),)
+.DEFAULT_GOAL := subdirs
+else
+.DEFAULT_GOAL := all
+endif
-
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/am_mcu_apollo.h
similarity index 66%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h
rename to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/am_mcu_apollo.h
index 204e30d..b0f4d96 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/apollo2/am_mcu_apollo.h
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/am_mcu_apollo.h
@@ -1,37 +1,41 @@
//*****************************************************************************
//
+// am_mcu_apollo.h
//! @file
//!
-//! @brief Top Include for Apollo2 class devices.
+//! @brief Top Include for Apollo class devices.
//!
//! This file provides all the includes necessary for an apollo device.
//!
//! @addtogroup hal Hardware Abstraction Layer (HAL)
//
-//! @defgroup apollo2hal HAL for Apollo2
+//! @defgroup apollo3hal HAL for Apollo3
//! @ingroup hal
//
//*****************************************************************************
//*****************************************************************************
//
-// Copyright (c) 2017, Ambiq Micro
+// Copyright (c) 2021, Ambiq Micro, Inc.
// All rights reserved.
-//
+//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
-//
+//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
-//
+//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
-//
+//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
-//
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -44,7 +48,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
-// This is part of revision v1.2.10-2-gea660ad-hotfix2 of the AmbiqSuite Development Package.
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
//
//*****************************************************************************
#ifndef AM_MCU_APOLLO_H
@@ -52,6 +56,13 @@
//*****************************************************************************
//
+// Define AM_CMSIS_REGS to indicate that CMSIS registers are supported.
+//
+//*****************************************************************************
+#define AM_CMSIS_REGS 1
+
+//*****************************************************************************
+//
// C99
//
//*****************************************************************************
@@ -59,12 +70,35 @@
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
+#if AM_CMSIS_REGS
+#include "mcu/apollo3.h"
+#else // AM_CMSIS_REGS
#ifdef __IAR_SYSTEMS_ICC__
#include "intrinsics.h" // __CLZ() and other intrinsics
+#endif // AM_CMSIS_REGS
#endif
//*****************************************************************************
//
+// Global HAL
+//
+//*****************************************************************************
+//
+// Define the following macro to disable API parameter validation.
+// Defining this macro will result in smaller, more efficient HAL code, but
+// will disable parameter checking/validation throughout the HAL.
+//
+//#define AM_HAL_DISABLE_API_VALIDATION
+
+//
+// Define the following macro to disable assert messaging.
+// Defining this macro will result in smaller, more efficient HAL code, but
+// will eliminate debug messaging.
+//
+//#define AM_HAL_DEBUG_NO_ASSERT
+
+//*****************************************************************************
+//
// Registers
//
//*****************************************************************************
@@ -72,60 +106,51 @@
#include "regs/am_reg_macros.h"
-#include "regs/am_reg_adc.h"
-#include "regs/am_reg_cachectrl.h"
-#include "regs/am_reg_clkgen.h"
-#include "regs/am_reg_ctimer.h"
-#include "regs/am_reg_gpio.h"
-#include "regs/am_reg_iomstr.h"
-#include "regs/am_reg_ioslave.h"
-#include "regs/am_reg_itm.h"
+#include "regs/am_reg.h"
+#include "regs/am_reg_m4.h"
#include "regs/am_reg_jedec.h"
-#include "regs/am_reg_mcuctrl.h"
-#include "regs/am_reg_nvic.h"
-#include "regs/am_reg_pdm.h"
-#include "regs/am_reg_pwrctrl.h"
-#include "regs/am_reg_rstgen.h"
-#include "regs/am_reg_rtc.h"
-#include "regs/am_reg_sysctrl.h"
-#include "regs/am_reg_systick.h"
-#include "regs/am_reg_tpiu.h"
-#include "regs/am_reg_uart.h"
-#include "regs/am_reg_vcomp.h"
-#include "regs/am_reg_wdt.h"
+#include "regs/am_mcu_apollo3_info0.h"
//*****************************************************************************
//
// HAL
//
//*****************************************************************************
+#include "hal/am_hal_status.h"
+#include "hal/am_hal_sysctrl.h"
#include "hal/am_hal_adc.h"
+#include "hal/am_hal_ble.h"
+#include "hal/am_hal_ble_patch.h"
+#include "hal/am_hal_burst.h"
#include "hal/am_hal_cachectrl.h"
#include "hal/am_hal_clkgen.h"
+#include "hal/am_hal_cmdq.h"
#include "hal/am_hal_ctimer.h"
+#include "hal/am_hal_entropy.h"
#include "hal/am_hal_debug.h"
#include "hal/am_hal_flash.h"
#include "hal/am_hal_global.h"
#include "hal/am_hal_gpio.h"
-#include "hal/am_hal_i2c_bit_bang.h"
#include "hal/am_hal_interrupt.h"
#include "hal/am_hal_iom.h"
#include "hal/am_hal_ios.h"
#include "hal/am_hal_itm.h"
#include "hal/am_hal_mcuctrl.h"
-#include "hal/am_hal_otp.h"
+#include "hal/am_hal_mspi.h"
#include "hal/am_hal_pdm.h"
#include "hal/am_hal_pin.h"
#include "hal/am_hal_pwrctrl.h"
+#include "hal/am_hal_pwrctrl_internal.h"
#include "hal/am_hal_queue.h"
#include "hal/am_hal_reset.h"
#include "hal/am_hal_rtc.h"
+#include "hal/am_hal_scard.h"
+#include "hal/am_hal_secure_ota.h"
#include "hal/am_hal_stimer.h"
-#include "hal/am_hal_sysctrl.h"
+#include "hal/am_hal_security.h"
#include "hal/am_hal_systick.h"
#include "hal/am_hal_tpiu.h"
#include "hal/am_hal_uart.h"
-#include "hal/am_hal_vcomp.h"
#include "hal/am_hal_wdt.h"
#endif // AM_MCU_APOLLO_H
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/Makefile
similarity index 73%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
rename to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/Makefile
index adc6122..d0e2192 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/mcu/Makefile
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/Makefile
@@ -1,24 +1,27 @@
#******************************************************************************
#
-# Makefile - Rules for building the libraries, examples and docs.
+# Makefile - Rules for compiling
#
-# Copyright (c) 2017, Ambiq Micro
+# Copyright (c) 2021, Ambiq Micro, Inc.
# All rights reserved.
-#
+#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
-#
+#
# 1. Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
-#
+#
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
-#
+#
# 3. Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived from this
# software without specific prior written permission.
-#
+#
+# Third party software included in this distribution is subject to the
+# additional license terms as defined in the /docs/licenses directory.
+#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -30,26 +33,16 @@
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
-#
-# This is part of revision 1.2.8 of the AmbiqSuite Development Package.
+#
+# This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
#
#******************************************************************************
-SUBDIRS=${wildcard */}
-
-all:
- @for i in ${SUBDIRS}; \
- do \
- if [ -f $${i}/Makefile ]; then \
- $(MAKE) -C $${i} || exit $$?; fi; \
- done
-
-clean:
- @for i in ${SUBDIRS}; \
- do \
- if [ -f $${i}/Makefile ]; then \
- $(MAKE) -C $${i} clean; fi; \
- done
+# All makefiles use this to find the top level directory.
+SWROOT?=../../..
+# Include rules for building the HAL.
+include $(SWROOT)/makedefs/am_hal.mk
-
+# Generate pin definitions for apollo3.
+CHIP_GENERATION = 3
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.c b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.c
new file mode 100644
index 0000000..efb8b81
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.c
@@ -0,0 +1,1273 @@
+//*****************************************************************************
+//
+// am_hal_adc.c
+//! @file
+//!
+//! @brief Functions for interfacing with the Analog to Digital Converter.
+//!
+//! @addtogroup adc3 Analog-to-Digital Converter (ADC)
+//! @ingroup apollo3hal
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "am_mcu_apollo.h"
+
+//*****************************************************************************
+//
+// Private Types.
+//
+//*****************************************************************************
+
+#define AM_HAL_MAGIC_ADC 0xAFAFAF
+#define AM_HAL_ADC_CHK_HANDLE(h) ((h) && ((am_hal_handle_prefix_t *)(h))->s.bInit && (((am_hal_handle_prefix_t *)(h))->s.magic == AM_HAL_MAGIC_ADC))
+
+// ****************************************************************************
+//
+// Apollo3 Temperature Trim Value Locations and default coefficients.
+//
+// ****************************************************************************
+#define AM_HAL_ADC_CALIB_TEMP_ADDR (0x50023840)
+#define AM_HAL_ADC_CALIB_AMBIENT_ADDR (0x50023844)
+#define AM_HAL_ADC_CALIB_ADC_OFFSET_ADDR (0x50023848)
+
+// ****************************************************************************
+//
+// Default coefficients (used when trims not provided):
+// TEMP_DEFAULT = Temperature in deg K (e.g. 299.5 - 273.15 = 26.35)
+// AMBIENT_DEFAULT = Voltage measurement at default temperature.
+// OFFSET_DEFAULT = Default ADC offset at 1v.
+//
+// ****************************************************************************
+#define AM_HAL_ADC_CALIB_TEMP_DEFAULT (299.5F)
+#define AM_HAL_ADC_CALIB_AMBIENT_DEFAULT (1.02809F)
+#define AM_HAL_ADC_CALIB_ADC_OFFSET_DEFAULT (-0.004281F)
+
+
+//
+// ADC Power save register state.
+//
+typedef struct
+{
+ bool bValid;
+ uint32_t regCFG;
+ uint32_t regSL0CFG;
+ uint32_t regSL1CFG;
+ uint32_t regSL2CFG;
+ uint32_t regSL3CFG;
+ uint32_t regSL4CFG;
+ uint32_t regSL5CFG;
+ uint32_t regSL6CFG;
+ uint32_t regSL7CFG;
+ uint32_t regWULIM;
+ uint32_t regWLLIM;
+ uint32_t regINTEN;
+} am_hal_adc_register_state_t;
+
+//
+// ADC State structure.
+//
+typedef struct
+{
+ //
+ // Handle validation prefix.
+ //
+ am_hal_handle_prefix_t prefix;
+
+ //
+ // Physical module number.
+ //
+ uint32_t ui32Module;
+
+ //
+ // ADC Capabilities.
+ //
+ am_hal_adc_capabilities_t capabilities;
+
+ // Power Save-Restore register state
+ am_hal_adc_register_state_t registerState;
+
+} am_hal_adc_state_t;
+
+//*****************************************************************************
+//
+//! @brief Private SRAM view of temperature trims.
+//!
+//! This static SRAM union is private to the ADC HAL functions.
+//
+//*****************************************************************************
+static union
+{
+ //! These trim values are loaded as uint32_t values.
+ struct
+ {
+ //! Temperature of the package test head (in degrees Kelvin)
+ uint32_t ui32CalibrationTemperature;
+
+ //! Voltage corresponding to temperature measured on test head.
+ uint32_t ui32CalibrationVoltage;
+
+ //! ADC offset voltage measured on the package test head.
+ uint32_t ui32CalibrationOffset;
+
+ //! Flag if default (guess) or measured.
+ bool bMeasured;
+ } ui32;
+ //! These trim values are accessed as floats when used in temp calculations.
+ struct
+ {
+ //! Temperature of the package test head in degrees Kelvin
+ float fCalibrationTemperature;
+
+ //! Voltage corresponding to temperature measured on test head.
+ float fCalibrationVoltage;
+
+ //! ADC offset voltage measured on the package test head.
+ float fCalibrationOffset;
+
+ //! Flag if default (guess) or measured.
+ float fMeasuredFlag;
+ } flt;
+} priv_temp_trims;
+
+//*****************************************************************************
+//
+// Global Variables.
+//
+//*****************************************************************************
+am_hal_adc_state_t g_ADCState[AM_REG_ADC_NUM_MODULES];
+
+uint32_t g_ADCSlotsConfigured;
+
+//*****************************************************************************
+//
+//! @brief ADC initialization function
+//!
+//! @param ui32Module - module instance.
+//! @param handle - returns the handle for the module instance.
+//!
+//! This function accepts a module instance, allocates the interface and then
+//! returns a handle to be used by the remaining interface functions.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_initialize(uint32_t ui32Module, void **ppHandle)
+{
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Validate the module number
+ //
+ if ( ui32Module >= AM_REG_ADC_NUM_MODULES )
+ {
+ return AM_HAL_STATUS_OUT_OF_RANGE;
+ }
+
+ //
+ // Check for valid arguements.
+ //
+ if ( !ppHandle )
+ {
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+
+ //
+ // Check if the handle is unallocated.
+ //
+ if ( g_ADCState[ui32Module].prefix.s.bInit )
+ {
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Initialize the handle.
+ //
+ g_ADCState[ui32Module].prefix.s.bInit = true;
+ g_ADCState[ui32Module].prefix.s.magic = AM_HAL_MAGIC_ADC;
+ g_ADCState[ui32Module].ui32Module = ui32Module;
+
+ //
+ // Initialize the number of slots configured.
+ //
+ g_ADCSlotsConfigured = 0;
+
+ //
+ // Return the handle.
+ //
+ *ppHandle = (void *)&g_ADCState[ui32Module];
+
+ //
+ // Before returning, grab the temperature trims.
+ //
+ priv_temp_trims.ui32.ui32CalibrationTemperature =
+ am_hal_flash_load_ui32((uint32_t*)AM_HAL_ADC_CALIB_TEMP_ADDR);
+ priv_temp_trims.ui32.ui32CalibrationVoltage =
+ am_hal_flash_load_ui32((uint32_t*)AM_HAL_ADC_CALIB_AMBIENT_ADDR);
+ priv_temp_trims.ui32.ui32CalibrationOffset =
+ am_hal_flash_load_ui32((uint32_t*)AM_HAL_ADC_CALIB_ADC_OFFSET_ADDR);
+
+ if ( (priv_temp_trims.ui32.ui32CalibrationTemperature == 0xffffffff) ||
+ (priv_temp_trims.ui32.ui32CalibrationVoltage == 0xffffffff) ||
+ (priv_temp_trims.ui32.ui32CalibrationOffset == 0xffffffff) )
+ {
+ //
+ // Since the device has not been calibrated on the tester, we'll load
+ // default calibration values. These default values should result
+ // in worst-case temperature measurements of +-6 degress C.
+ //
+ priv_temp_trims.flt.fCalibrationTemperature = AM_HAL_ADC_CALIB_TEMP_DEFAULT;
+ priv_temp_trims.flt.fCalibrationVoltage = AM_HAL_ADC_CALIB_AMBIENT_DEFAULT;
+ priv_temp_trims.flt.fCalibrationOffset = AM_HAL_ADC_CALIB_ADC_OFFSET_DEFAULT;
+ priv_temp_trims.ui32.bMeasured = false;
+ }
+ else
+ {
+ priv_temp_trims.ui32.bMeasured = true;
+ }
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief MSPI deinitialization function
+//!
+//! @param handle - returns the handle for the module instance.
+//!
+//! This function accepts a handle to an instance and de-initializes the
+//! interface.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_deinitialize(void *pHandle)
+{
+ uint32_t status = AM_HAL_STATUS_SUCCESS;
+ am_hal_adc_state_t *pADCState = (am_hal_adc_state_t *)pHandle;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ if ( pADCState->prefix.s.bEnable )
+ {
+ status = am_hal_adc_disable(pHandle);
+ }
+
+ pADCState->prefix.s.bInit = false;
+
+ //
+ // Return the status.
+ //
+ return status;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC configuration function
+//!
+//! @param handle - handle for the module instance.
+//! @param pConfig - pointer to the configuration structure.
+//!
+//! This function configures the ADC for operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_configure(void *pHandle,
+ am_hal_adc_config_t *psConfig)
+{
+ uint32_t ui32Config;
+ am_hal_adc_state_t *pADCState = (am_hal_adc_state_t *)pHandle;
+ uint32_t ui32Module = pADCState->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ ui32Config = 0;
+
+ //
+ // Set the ADC clock source.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_CLKSEL, psConfig->eClock);
+
+ //
+ // Set the ADC trigger polarity.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_TRIGPOL, psConfig->ePolarity);
+
+ //
+ // Set the ADC trigger.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_TRIGSEL, psConfig->eTrigger);
+
+ //
+ // Set the ADC reference voltage.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_REFSEL, psConfig->eReference);
+
+ //
+ // Set the Destructive FIFO read.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_DFIFORDEN, 1);
+
+ //
+ // Set the ADC clock mode.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_CKMODE, psConfig->eClockMode);
+
+ //
+ // Set the ADC low power mode.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_LPMODE, psConfig->ePowerMode);
+
+ //
+ // Set the ADC repetition mode.
+ //
+ ui32Config |= _VAL2FLD(ADC_CFG_RPTEN, psConfig->eRepeat);
+
+ //
+ // Set the configuration in the ADC peripheral.
+ //
+ ADCn(ui32Module)->CFG = ui32Config;
+
+ //
+ // Return status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC slot configuration function
+//!
+//! @param handle - handle for the module instance.
+//! @param pConfig - pointer to the configuration structure.
+//!
+//! This function configures the ADC slot for operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_configure_slot(void *pHandle,
+ uint32_t ui32SlotNumber,
+ am_hal_adc_slot_config_t *pSlotConfig)
+{
+ uint32_t ui32Config;
+ uint32_t ui32RegOffset;
+ am_hal_adc_state_t *pADCState = (am_hal_adc_state_t *)pHandle;
+ uint32_t ui32Module = pADCState->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Check the slot number.
+ //
+ if ( ui32SlotNumber >= AM_HAL_ADC_MAX_SLOTS )
+ {
+ return AM_HAL_STATUS_OUT_OF_RANGE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ ui32Config = 0;
+
+ //
+ // Set the measurements to average
+ //
+ ui32Config |= _VAL2FLD(ADC_SL0CFG_ADSEL0, pSlotConfig->eMeasToAvg);
+
+ //
+ // Set the precision mode.
+ //
+ ui32Config |= _VAL2FLD(ADC_SL0CFG_PRMODE0, pSlotConfig->ePrecisionMode);
+
+ //
+ // Set the channel.
+ //
+ ui32Config |= _VAL2FLD(ADC_SL0CFG_CHSEL0, pSlotConfig->eChannel);
+
+ //
+ // Enable window comparison if configured.
+ //
+ ui32Config |= _VAL2FLD(ADC_SL0CFG_WCEN0, pSlotConfig->bWindowCompare);
+
+ //
+ // Enable the slot if configured.
+ //
+ ui32Config |= _VAL2FLD(ADC_SL0CFG_SLEN0, pSlotConfig->bEnabled);
+
+ //
+ // Locate the correct register for this ADC slot.
+ //
+ ui32RegOffset = ((uint32_t)&ADCn(ui32Module)->SL0CFG) + (4 * ui32SlotNumber);
+
+ //
+ // Write the register with the caller's configuration value.
+ //
+ AM_REGVAL(ui32RegOffset) = ui32Config;
+
+ //
+ // Update the nubmer of slots configured.
+ //
+ g_ADCSlotsConfigured++;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC DMA configuration function
+//!
+//! @param handle - handle for the module instance.
+//! @param pConfig - pointer to the configuration structure.
+//!
+//! This function configures the ADC DMA for operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_configure_dma(void *pHandle,
+ am_hal_adc_dma_config_t *pDMAConfig)
+{
+ uint32_t ui32Config;
+ uint32_t ui32Module = ((am_hal_adc_state_t *)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ ui32Config = 0;
+
+ //
+ // Configure the DMA complete power-off.
+ //
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DPWROFF, 0); // DPWROFF not supported!
+
+ //
+ // Configure the data to be transferred.
+ //
+ if ( g_ADCSlotsConfigured > 1 )
+ {
+ // Need slot number to distinguish between slot results.
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DMAMSK, ADC_DMACFG_DMAMSK_DIS);
+ }
+ else
+ {
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DMAMSK, ADC_DMACFG_DMAMSK_EN);
+ }
+
+ //
+ // Enable DMA Halt on Status (DMAERR or DMACPL) by default.
+ //
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DMAHONSTAT, ADC_DMACFG_DMAHONSTAT_EN);
+
+ //
+ // Configure the DMA dynamic priority handling.
+ //
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DMADYNPRI, pDMAConfig->bDynamicPriority);
+
+ //
+ // Configure the DMA static priority.
+ //
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DMAPRI, pDMAConfig->ePriority);
+
+ //
+ // Enable the DMA (does not start until ADC is enabled and triggered).
+ //
+ ui32Config |= _VAL2FLD(ADC_DMACFG_DMAEN, ADC_DMACFG_DMAEN_EN);
+
+ //
+ // Set the DMA configuration.
+ //
+ ADCn(ui32Module)->DMACFG = ui32Config;
+
+ //
+ // Set the DMA transfer count.
+ //
+ ADCn(ui32Module)->DMATOTCOUNT_b.TOTCOUNT = pDMAConfig->ui32SampleCount;
+
+ //
+ // Set the DMA target address.
+ //
+ ADCn(ui32Module)->DMATARGADDR = pDMAConfig->ui32TargetAddress;
+
+ //
+ // Set the DMA trigger on FIFO 75% full.
+ //
+ ADCn(ui32Module)->DMATRIGEN = ADC_DMATRIGEN_DFIFO75_Msk;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC device specific control function.
+//!
+//! @param handle - handle for the module instance.
+//!
+//! This function provides for special control functions for the ADC operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t am_hal_adc_control(void *pHandle,
+ am_hal_adc_request_e eRequest,
+ void *pArgs)
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t *)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ switch ( eRequest )
+ {
+ case AM_HAL_ADC_REQ_WINDOW_CONFIG:
+ {
+ am_hal_adc_window_config_t *pWindowConfig = (am_hal_adc_window_config_t *)pArgs;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the window limits.
+ //
+ if ( (pWindowConfig->ui32Upper > ADC_WULIM_ULIM_Msk) ||
+ (pWindowConfig->ui32Lower > ADC_WLLIM_LLIM_Msk) )
+ {
+ return AM_HAL_STATUS_OUT_OF_RANGE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Set the window comparison upper and lower limits.
+ //
+ ADCn(ui32Module)->WULIM = _VAL2FLD(ADC_WULIM_ULIM, pWindowConfig->ui32Upper);
+ ADCn(ui32Module)->WLLIM = _VAL2FLD(ADC_WLLIM_LLIM, pWindowConfig->ui32Lower);
+
+ //
+ // Set the window scale per precision mode if indicated.
+ //
+ ADCn(ui32Module)->SCWLIM = _VAL2FLD(ADC_SCWLIM_SCWLIMEN,
+ pWindowConfig->bScaleLimits);
+ }
+ break;
+
+ case AM_HAL_ADC_REQ_TEMP_CELSIUS_GET:
+ //
+ // pArgs must point to an array of 3 floats. To assure that the
+ // array is valid, upon calling the 3rd float (pArgs[2]) must be
+ // set to the value -123.456F.
+ //
+ if ( pArgs != NULL )
+ {
+ float *pfArray = (float*)pArgs;
+ float fTemp, fCalibration_temp, fCalibration_voltage, fCalibration_offset, fVoltage;
+
+ if ( pfArray[2] == -123.456F )
+ {
+ //
+ // Get the scaled voltage obtained from the ADC sample.
+ // The ADC sample value is scaled up by the reference voltage
+ // (e.g. 1.5F), then divided by 65536.0F.
+ //
+ fVoltage = pfArray[0];
+
+ //
+ // Get calibration temperature from trimmed values & convert to degrees K.
+ //
+ fCalibration_temp = priv_temp_trims.flt.fCalibrationTemperature;
+ fCalibration_voltage = priv_temp_trims.flt.fCalibrationVoltage;
+ fCalibration_offset = priv_temp_trims.flt.fCalibrationOffset;
+
+ //
+ // Compute the temperature.
+ //
+ fTemp = fCalibration_temp / fCalibration_voltage ;
+ fTemp *= (fVoltage - fCalibration_offset);
+
+ //
+ // Give it back to the caller in Celsius.
+ //
+ pfArray[1] = fTemp - 273.15f;
+ }
+ else
+ {
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+ }
+ else
+ {
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+ break;
+
+ case AM_HAL_ADC_REQ_TEMP_TRIMS_GET:
+ //
+ // pArgs must point to an array of 4 floats. To assure that the
+ // array is valid, upon calling the 4th float (pArgs[3]) must be
+ // set to the value -123.456.
+ // On return, pArgs[3] is set to 1 if the returned values are
+ // calibrated, or 0 if default calibration values.
+ //
+ if ( pArgs != NULL )
+ {
+ float *pfArray = (float*)pArgs;
+ if ( pfArray[3] == -123.456F )
+ {
+ //
+ // Return trim temperature as a float.
+ //
+ pfArray[0] = priv_temp_trims.flt.fCalibrationTemperature;
+
+ //
+ // Return trim voltage as a float.
+ //
+ pfArray[1] = priv_temp_trims.flt.fCalibrationVoltage;
+
+ //
+ // Return trim ADC offset voltage as a float.
+ //
+ pfArray[2] = priv_temp_trims.flt.fCalibrationOffset;
+
+ //
+ // Set the calibrated or uncalibrated flag
+ //
+ ((uint32_t*)pArgs)[3] = priv_temp_trims.ui32.bMeasured;
+ }
+ else
+ {
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+ }
+ else
+ {
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+ break;
+
+ default:
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+
+ //
+ // Return status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC enable function
+//!
+//! @param handle - handle for the module instance.
+//!
+//! This function enables the ADC operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_enable(void *pHandle)
+{
+ am_hal_adc_state_t *pADCState = (am_hal_adc_state_t *)pHandle;
+ uint32_t ui32Module = pADCState->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ if ( pADCState->prefix.s.bEnable )
+ {
+ return AM_HAL_STATUS_SUCCESS;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Enable the ADC.
+ //
+ ADCn(ui32Module)->CFG_b.ADCEN = 0x1;
+
+ //
+ // Set flag to indicate module is enabled.
+ //
+ pADCState->prefix.s.bEnable = true;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC disable function
+//!
+//! @param handle - handle for the module instance.
+//!
+//! This function disables the ADC operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_disable(void *pHandle)
+{
+ am_hal_adc_state_t *pADCState = (am_hal_adc_state_t *)pHandle;
+ uint32_t ui32Module = pADCState->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Disable the ADC.
+ //
+ ADCn(ui32Module)->CFG_b.ADCEN = 0x0;
+
+ //
+ // Set flag to indicate module is disabled.
+ //
+ pADCState->prefix.s.bEnable = false;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC status function
+//!
+//! @param handle - handle for the interface.
+//!
+//! This function returns the current status of the DMA operation.
+//!
+//! @return status - DMA status flags.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_status_get(void *pHandle, am_hal_adc_status_t *pStatus )
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t *)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Get the power status.
+ //
+ pStatus->bPoweredOn = (ADCn(ui32Module)->STAT & ADC_STAT_PWDSTAT_Msk) ==
+ _VAL2FLD(ADC_STAT_PWDSTAT, ADC_STAT_PWDSTAT_ON);
+
+ //
+ // Get the low power mode 1 status.
+ //
+ pStatus->bLPMode1 = (ADCn(ui32Module)->STAT & ADC_STAT_PWDSTAT_Msk) ==
+ _VAL2FLD(ADC_STAT_PWDSTAT, ADC_STAT_PWDSTAT_POWERED_DOWN);
+
+ //
+ // Get the DMA status.
+ //
+ pStatus->bErr = ((ADCn(ui32Module)->DMASTAT & ADC_DMASTAT_DMAERR_Msk) > 0);
+ pStatus->bCmp = ((ADCn(ui32Module)->DMASTAT & ADC_DMASTAT_DMACPL_Msk) > 0);
+ pStatus->bTIP = ((ADCn(ui32Module)->DMASTAT & ADC_DMASTAT_DMATIP_Msk) > 0);
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC enable interrupts function
+//!
+//! @param handle - handle for the interface.
+//! @param ui32IntMask - ADC interrupt mask.
+//!
+//! This function enables the specific indicated interrupts.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_interrupt_enable(void *pHandle, uint32_t ui32IntMask)
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t*)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Enable the interrupts.
+ //
+ ADCn(ui32Module)->INTEN |= ui32IntMask;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC disable interrupts function
+//!
+//! @param handle - handle for the interface.
+//! @param ui32IntMask - ADC interrupt mask.
+//!
+//! This function disable the specific indicated interrupts.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_interrupt_disable(void *pHandle, uint32_t ui32IntMask)
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t*)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Disable the interrupts.
+ //
+ ADCn(ui32Module)->INTEN &= ~ui32IntMask;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC interrupt status function
+//!
+//! @param handle - handle for the interface.
+//!
+//! This function returns the specific indicated interrupt status.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_interrupt_status(void *pHandle,
+ uint32_t *pui32Status,
+ bool bEnabledOnly)
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t*)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // if requested, only return the interrupts that are enabled.
+ //
+ if ( bEnabledOnly )
+ {
+ uint32_t ui32RetVal = ADCn(ui32Module)->INTSTAT;
+ *pui32Status = ADCn(ui32Module)->INTEN & ui32RetVal;
+ }
+ else
+ {
+ *pui32Status = ADCn(ui32Module)->INTSTAT;
+ }
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+
+//*****************************************************************************
+//
+//! @brief ADC interrupt clear
+//!
+//! @param handle - handle for the interface.
+//! @param ui32IntMask - uint32_t for interrupts to clear
+//!
+//! This function clears the interrupts for the given peripheral.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_interrupt_clear(void *pHandle, uint32_t ui32IntMask)
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t*)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Clear the interrupts.
+ //
+ ADCn(ui32Module)->INTCLR = ui32IntMask;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+// ADC sample read function
+//
+// This function reads samples from the ADC FIFO or an SRAM sample buffer
+// returned by a DMA operation.
+//
+//*****************************************************************************
+uint32_t am_hal_adc_samples_read(void *pHandle, bool bFullSample,
+ uint32_t *pui32InSampleBuffer,
+ uint32_t *pui32InOutNumberSamples,
+ am_hal_adc_sample_t *pui32OutBuffer)
+{
+ uint32_t ui32Sample;
+ uint32_t ui32RequestedSamples = *pui32InOutNumberSamples;
+
+ uint32_t ui32Module = ((am_hal_adc_state_t*)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Check the output sample buffer pointer.
+ //
+ if ( NULL == pui32OutBuffer )
+ {
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+
+ *pui32InOutNumberSamples = 0;
+
+ //
+ // Check if we are reading directly from FIFO or DMA SRAM buffer.
+ //
+ if ( NULL == pui32InSampleBuffer )
+ {
+ //
+ // Grab a value from the ADC FIFO
+ //
+ do
+ {
+ ui32Sample = ADCn(ui32Module)->FIFOPR;
+ pui32OutBuffer->ui32Slot = AM_HAL_ADC_FIFO_SLOT(ui32Sample);
+ pui32OutBuffer->ui32Sample = bFullSample ?
+ AM_HAL_ADC_FIFO_FULL_SAMPLE(ui32Sample) :
+ AM_HAL_ADC_FIFO_SAMPLE(ui32Sample);
+ pui32OutBuffer++;
+ (*pui32InOutNumberSamples)++;
+ } while ((AM_HAL_ADC_FIFO_COUNT(ui32Sample) > 0) &&
+ (*pui32InOutNumberSamples < ui32RequestedSamples));
+ }
+ else
+ {
+ //
+ // Process the samples from the provided sample buffer
+ //
+ do
+ {
+ pui32OutBuffer->ui32Slot = AM_HAL_ADC_FIFO_SLOT(*pui32InSampleBuffer);
+ pui32OutBuffer->ui32Sample = AM_HAL_ADC_FIFO_SAMPLE(*pui32InSampleBuffer);
+ pui32InSampleBuffer++;
+ pui32OutBuffer++;
+ (*pui32InOutNumberSamples)++;
+ } while (*pui32InOutNumberSamples < ui32RequestedSamples);
+ }
+
+ //
+ // Return FIFO valid bits.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief Issue Software Trigger to the ADC.
+//!
+//! @param handle - handle for the module instance.
+//!
+//! This function triggers the ADC operation.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_sw_trigger(void *pHandle)
+{
+ uint32_t ui32Module = ((am_hal_adc_state_t*)pHandle)->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Write to the Software trigger register in the ADC.
+ //
+ ADCn(ui32Module)->SWT = 0x37;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+//! @brief ADC power control function
+//!
+//! @param handle - handle for the interface.
+//! @param ePowerState - the desired power state to move the peripheral to.
+//! @param bRetainState - flag (if true) to save/restore peripheral state upon
+//! power state change.
+//!
+//! This function updates the peripheral to a given power state.
+//!
+//! @return status - generic or interface specific status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_adc_power_control(void *pHandle,
+ am_hal_sysctrl_power_state_e ePowerState,
+ bool bRetainState)
+{
+ am_hal_adc_state_t *pADCState = (am_hal_adc_state_t *)pHandle;
+ uint32_t ui32Module = pADCState->ui32Module;
+
+#ifndef AM_HAL_DISABLE_API_VALIDATION
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_ADC_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+#endif // AM_HAL_DISABLE_API_VALIDATION
+
+ //
+ // Decode the requested power state and update MSPI operation accordingly.
+ //
+ switch (ePowerState)
+ {
+ case AM_HAL_SYSCTRL_WAKE:
+ if ( bRetainState && !pADCState->registerState.bValid )
+ {
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Enable the ADC power domain.
+ //
+ am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_PERIPH_ADC);
+
+ if ( bRetainState )
+ {
+ ADCn(ui32Module)->SL0CFG = pADCState->registerState.regSL0CFG;
+ ADCn(ui32Module)->SL1CFG = pADCState->registerState.regSL1CFG;
+ ADCn(ui32Module)->SL2CFG = pADCState->registerState.regSL2CFG;
+ ADCn(ui32Module)->SL3CFG = pADCState->registerState.regSL3CFG;
+ ADCn(ui32Module)->SL4CFG = pADCState->registerState.regSL4CFG;
+ ADCn(ui32Module)->SL5CFG = pADCState->registerState.regSL5CFG;
+ ADCn(ui32Module)->SL6CFG = pADCState->registerState.regSL6CFG;
+ ADCn(ui32Module)->SL7CFG = pADCState->registerState.regSL7CFG;
+ ADCn(ui32Module)->WULIM = pADCState->registerState.regWULIM;
+ ADCn(ui32Module)->WLLIM = pADCState->registerState.regWLLIM;
+ ADCn(ui32Module)->INTEN = pADCState->registerState.regINTEN;
+ ADCn(ui32Module)->CFG = pADCState->registerState.regCFG;
+
+ pADCState->registerState.bValid = false;
+ }
+ break;
+
+ case AM_HAL_SYSCTRL_NORMALSLEEP:
+ case AM_HAL_SYSCTRL_DEEPSLEEP:
+ if ( bRetainState )
+ {
+ pADCState->registerState.regSL0CFG = ADCn(ui32Module)->SL0CFG;
+ pADCState->registerState.regSL1CFG = ADCn(ui32Module)->SL1CFG;
+ pADCState->registerState.regSL2CFG = ADCn(ui32Module)->SL2CFG;
+ pADCState->registerState.regSL3CFG = ADCn(ui32Module)->SL3CFG;
+ pADCState->registerState.regSL4CFG = ADCn(ui32Module)->SL4CFG;
+ pADCState->registerState.regSL5CFG = ADCn(ui32Module)->SL5CFG;
+ pADCState->registerState.regSL6CFG = ADCn(ui32Module)->SL6CFG;
+ pADCState->registerState.regSL7CFG = ADCn(ui32Module)->SL7CFG;
+ pADCState->registerState.regWULIM = ADCn(ui32Module)->WULIM;
+ pADCState->registerState.regWLLIM = ADCn(ui32Module)->WLLIM;
+ pADCState->registerState.regINTEN = ADCn(ui32Module)->INTEN;
+ pADCState->registerState.regCFG = ADCn(ui32Module)->CFG;
+
+ pADCState->registerState.bValid = true;
+ }
+
+ //
+ // Disable the ADC power domain.
+ //
+ am_hal_pwrctrl_periph_disable(AM_HAL_PWRCTRL_PERIPH_ADC);
+ break;
+
+ default:
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.h
new file mode 100644
index 0000000..cb60e70
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_adc.h
@@ -0,0 +1,678 @@
+//*****************************************************************************
+//
+// am_hal_adc.h
+//! @file
+//!
+//! @brief Functions for interfacing with the Analog to Digital Converter
+//!
+//! @addtogroup adc3 Analog-to-Digital Converter (ADC)
+//! @ingroup apollo3hal
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+#ifndef AM_HAL_ADC_H
+#define AM_HAL_ADC_H
+
+//*****************************************************************************
+//
+// CMSIS-style macro for handling a variable IOM module number.
+//
+#define ADCn(n) ((ADC_Type*)(ADC_BASE + (n * (ADC_BASE - ADC_BASE))))
+//*****************************************************************************
+
+//
+// Maximum number of slots.
+//
+#define AM_HAL_ADC_MAX_SLOTS 8
+
+//
+// ADC clock selection.
+//
+typedef enum
+{
+ AM_HAL_ADC_CLKSEL_OFF,
+ AM_HAL_ADC_CLKSEL_HFRC,
+ AM_HAL_ADC_CLKSEL_HFRC_DIV2
+} am_hal_adc_clksel_e;
+
+//
+// ADC trigger polarity
+//
+typedef enum
+{
+ AM_HAL_ADC_TRIGPOL_RISING,
+ AM_HAL_ADC_TRIGPOL_FALLING
+} am_hal_adc_trigpol_e;
+
+//
+// ADC trigger selection
+//
+typedef enum
+{
+ AM_HAL_ADC_TRIGSEL_EXT0,
+ AM_HAL_ADC_TRIGSEL_EXT1,
+ AM_HAL_ADC_TRIGSEL_EXT2,
+ AM_HAL_ADC_TRIGSEL_EXT3,
+ AM_HAL_ADC_TRIGSEL_VCOMP,
+ AM_HAL_ADC_TRIGSEL_SOFTWARE = 7
+} am_hal_adc_trigsel_e;
+
+//
+// ADC reference selection.
+//
+typedef enum
+{
+ AM_HAL_ADC_REFSEL_INT_2P0,
+ AM_HAL_ADC_REFSEL_INT_1P5,
+ AM_HAL_ADC_REFSEL_EXT_2P0,
+ AM_HAL_ADC_REFSEL_EXT_1P5
+} am_hal_adc_refsel_e;
+
+//
+// ADC clock mode selection.
+//
+typedef enum
+{
+ AM_HAL_ADC_CLKMODE_LOW_POWER, // Disable the clock between scans for LPMODE0.
+ // Set LPCKMODE to 0x1 while configuring the ADC.
+ AM_HAL_ADC_CLKMODE_LOW_LATENCY // Low Latency Clock Mode. When set, HFRC and the
+ // adc_clk will remain on while in functioning in LPMODE0.
+} am_hal_adc_clkmode_e;
+
+//
+// ADC low-power mode selection.
+//
+typedef enum
+{
+ AM_HAL_ADC_LPMODE0, // Low Latency Clock Mode. When set, HFRC and the adc_clk
+ // will remain on while in functioning in LPMODE0.
+ AM_HAL_ADC_LPMODE1 // Powers down all circuity and clocks associated with the
+ // ADC until the next trigger event. Between scans, the reference
+ // buffer requires up to 50us of delay from a scan trigger event
+ // before the conversion will commence while operating in this mode.
+} am_hal_adc_lpmode_e;
+
+//
+// ADC repetition selection.
+//
+typedef enum
+{
+ AM_HAL_ADC_SINGLE_SCAN,
+ AM_HAL_ADC_REPEATING_SCAN
+} am_hal_adc_repeat_e;
+
+//
+// ADC measurement averaging configuration.
+//
+typedef enum
+{
+ AM_HAL_ADC_SLOT_AVG_1,
+ AM_HAL_ADC_SLOT_AVG_2,
+ AM_HAL_ADC_SLOT_AVG_4,
+ AM_HAL_ADC_SLOT_AVG_8,
+ AM_HAL_ADC_SLOT_AVG_16,
+ AM_HAL_ADC_SLOT_AVG_32,
+ AM_HAL_ADC_SLOT_AVG_64,
+ AM_HAL_ADC_SLOT_AVG_128
+} am_hal_adc_meas_avg_e;
+
+//
+// ADC slot precision mode.
+//
+typedef enum
+{
+ AM_HAL_ADC_SLOT_14BIT,
+ AM_HAL_ADC_SLOT_12BIT,
+ AM_HAL_ADC_SLOT_10BIT,
+ AM_HAL_ADC_SLOT_8BIT
+} am_hal_adc_slot_prec_e;
+
+//
+// ADC slot channel selection.
+//
+typedef enum
+{
+ // Single-ended channels
+ AM_HAL_ADC_SLOT_CHSEL_SE0,
+ AM_HAL_ADC_SLOT_CHSEL_SE1,
+ AM_HAL_ADC_SLOT_CHSEL_SE2,
+ AM_HAL_ADC_SLOT_CHSEL_SE3,
+ AM_HAL_ADC_SLOT_CHSEL_SE4,
+ AM_HAL_ADC_SLOT_CHSEL_SE5,
+ AM_HAL_ADC_SLOT_CHSEL_SE6,
+ AM_HAL_ADC_SLOT_CHSEL_SE7,
+ AM_HAL_ADC_SLOT_CHSEL_SE8,
+ AM_HAL_ADC_SLOT_CHSEL_SE9,
+ // Differential channels.
+ AM_HAL_ADC_SLOT_CHSEL_DF0,
+ AM_HAL_ADC_SLOT_CHSEL_DF1,
+ // Miscellaneous other signals.
+ AM_HAL_ADC_SLOT_CHSEL_TEMP,
+ AM_HAL_ADC_SLOT_CHSEL_BATT,
+ AM_HAL_ADC_SLOT_CHSEL_VSS
+} am_hal_adc_slot_chan_e;
+
+//
+// DMA priority.
+//
+typedef enum
+{
+ AM_HAL_ADC_PRIOR_BEST_EFFORT,
+ AM_HAL_ADC_PRIOR_SERVICE_IMMED
+} am_hal_adc_dma_prior_e;
+
+//!
+//! ADC control function request types for am_hal_adc_control().
+//!
+//! AM_HAL_ADC_REQ_TEMP_CELSIUS_GET:
+//! pArgs must point to an array of 3 floats. To assure that the
+//! array is valid, upon calling the 3rd float (pArgs[2]) must be
+//! set to the value -123.456F.
+//! AM_HAL_ADC_REQ_TEMP_TRIMS_GET:
+//! pArgs must point to an array of 4 floats. To assure that the
+//! array is valid, upon calling the 4th float (pArgs[3]) must be
+//! set to the to the value -123.456F.
+//! On return, pArgs[3] is set to 1 if the returned values are
+//! calibrated, or 0 if default calibration values.
+//!
+typedef enum
+{
+ AM_HAL_ADC_REQ_WINDOW_CONFIG,
+ AM_HAL_ADC_REQ_TEMP_CELSIUS_GET,
+ AM_HAL_ADC_REQ_TEMP_TRIMS_GET,
+} am_hal_adc_request_e;
+
+//
+// ADC Sample structure.
+//
+typedef struct
+{
+ uint32_t ui32Sample;
+ uint32_t ui32Slot;
+} am_hal_adc_sample_t;
+
+
+//*****************************************************************************
+//
+//! @brief Configuration structure for the ADC.
+//
+//*****************************************************************************
+typedef struct
+{
+ //! Select the ADC clock source.
+ am_hal_adc_clksel_e eClock;
+
+ //! Select the ADC trigger polarity.
+ am_hal_adc_trigpol_e ePolarity;
+
+ //! Select the ADC trigger source.
+ am_hal_adc_trigsel_e eTrigger;
+
+ //! Select the ADC reference voltage.
+ am_hal_adc_refsel_e eReference;
+
+ //! Whether to disable clocks between samples.
+ am_hal_adc_clkmode_e eClockMode;
+
+ //! Select the ADC power mode.
+ am_hal_adc_lpmode_e ePowerMode;
+
+ //! Select whether the ADC will re-trigger based on a signal from timer 3.
+ am_hal_adc_repeat_e eRepeat;
+
+} am_hal_adc_config_t;
+
+//*****************************************************************************
+//
+//! @brief Configuration structure for the ADC slot.
+//
+//*****************************************************************************
+typedef struct
+{
+ //! Select the number of measurements to average
+ am_hal_adc_meas_avg_e eMeasToAvg;
+
+ //! Select the precision mode
+ am_hal_adc_slot_prec_e ePrecisionMode;
+
+ //! Select the channel
+ am_hal_adc_slot_chan_e eChannel;
+
+ //! Select window comparison mode
+ bool bWindowCompare;
+
+ //! Enable the slot
+ bool bEnabled;
+
+} am_hal_adc_slot_config_t;
+
+//*****************************************************************************
+//
+//! @brief Configuration structure for the ADC DMA
+//
+//*****************************************************************************
+typedef struct
+{
+ //! ADC DMA dynamic priority enabled.
+ bool bDynamicPriority;
+
+ //! ADC DMA static priority.
+ am_hal_adc_dma_prior_e ePriority;
+
+ //! Enable DMA for ADC
+ bool bDMAEnable;
+
+ //! Transfer count in samples
+ uint32_t ui32SampleCount;
+
+ //! Target address
+ uint32_t ui32TargetAddress;
+
+} am_hal_adc_dma_config_t;
+
+//*****************************************************************************
+//
+//! @brief Window configuration structure for the ADC.
+//
+//*****************************************************************************
+typedef struct
+{
+ //! Scale window comparison
+ bool bScaleLimits;
+
+ //! Window limits
+ uint32_t ui32Upper;
+ uint32_t ui32Lower;
+
+} am_hal_adc_window_config_t;
+
+//*****************************************************************************
+//
+//! @brief Capabilities structure for the ADC.
+//
+//*****************************************************************************
+typedef struct
+{
+ uint32_t dummy;
+
+} am_hal_adc_capabilities_t;
+
+
+//*****************************************************************************
+//
+//! @brief Status structure for the ADC.
+//
+//*****************************************************************************
+typedef struct
+{
+ //
+ // ADC power status.
+ //
+ bool bPoweredOn;
+ bool bLPMode1;
+
+ //
+ // DMA status.
+ //
+ bool bErr;
+ bool bCmp;
+ bool bTIP;
+
+} am_hal_adc_status_t;
+
+//
+// Transfer callback function prototype
+//
+typedef void (*am_hal_adc_callback_t)(void *pCallbackCtxt, uint32_t status);
+
+//*****************************************************************************
+//
+//! @name ADC Interrupts
+//! @brief Interrupt Status Bits for enable/disble use
+//!
+//! These macros may be used to enable an individual ADC interrupt cause.
+//! @{
+//
+//*****************************************************************************
+#define AM_HAL_ADC_INT_DERR (_VAL2FLD(ADC_INTEN_DERR, 1))
+#define AM_HAL_ADC_INT_DCMP (_VAL2FLD(ADC_INTEN_DCMP, 1))
+#define AM_HAL_ADC_INT_WCINC (_VAL2FLD(ADC_INTEN_WCINC, 1))
+#define AM_HAL_ADC_INT_WCEXC (_VAL2FLD(ADC_INTEN_WCEXC, 1))
+#define AM_HAL_ADC_INT_FIFOOVR2 (_VAL2FLD(ADC_INTEN_FIFOOVR2, 1))
+#define AM_HAL_ADC_INT_FIFOOVR1 (_VAL2FLD(ADC_INTEN_FIFOOVR1, 1))
+#define AM_HAL_ADC_INT_SCNCMP (_VAL2FLD(ADC_INTEN_SCNCMP, 1))
+#define AM_HAL_ADC_INT_CNVCMP (_VAL2FLD(ADC_INTEN_CNVCMP, 1))
+//! @}
+
+//*****************************************************************************
+//
+//! @brief ADC Fifo Read macros
+//!
+//! These are helper macros for interpreting FIFO data. Each ADC FIFO entry
+//! contains information about the slot number and the FIFO depth alongside the
+//! current sample. These macros perform the correct masking and shifting to
+//! read those values.
+//!
+//! The SAMPLE and FULL_SAMPLE options refer to the fractional part of averaged
+//! samples. If you are not using hardware averaging or don't need the
+//! fractional part of the ADC sample, you should just use
+//! AM_HAL_ADC_FIFO_SAMPLE.
+//!
+//! If you do need the fractional part, use AM_HAL_ADC_FIFO_FULL_SAMPLE. This
+//! macro will keep six bits of precision past the decimal point. Depending on
+//! the number of averaged samples, anywhere between 1 and 6 of these bits will
+//! be valid. Please consult the datasheet to find out how many bits of data
+//! are valid for your chosen averaging settings.
+//!
+//! @{
+//
+//*****************************************************************************
+#define AM_HAL_ADC_FIFO_SAMPLE(value) (_FLD2VAL(ADC_FIFO_DATA, value) >> 6)
+#define AM_HAL_ADC_FIFO_FULL_SAMPLE(value) (_FLD2VAL(ADC_FIFO_DATA, value))
+#define AM_HAL_ADC_FIFO_SLOT(value) (_FLD2VAL(ADC_FIFO_SLOTNUM, value))
+#define AM_HAL_ADC_FIFO_COUNT(value) (_FLD2VAL(ADC_FIFO_COUNT, value))
+//! @}
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+ //*****************************************************************************
+ //
+ //! @brief ADC initialization function
+ //!
+ //! @param ui32Module - module instance.
+ //! @param handle - returns the handle for the module instance.
+ //!
+ //! This function accepts a module instance, allocates the interface and then
+ //! returns a handle to be used by the remaining interface functions.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_initialize(uint32_t ui32Module, void **ppHandle);
+
+ //*****************************************************************************
+ //
+ //! @brief MSPI deinitialization function
+ //!
+ //! @param handle - returns the handle for the module instance.
+ //!
+ //! This function accepts a handle to an instance and de-initializes the
+ //! interface.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_deinitialize(void *pHandle);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC configuration function
+ //!
+ //! @param handle - handle for the module instance.
+ //! @param pConfig - pointer to the configuration structure.
+ //!
+ //! This function configures the ADC for operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_configure(void *pHandle,
+ am_hal_adc_config_t *psConfig);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC slot configuration function
+ //!
+ //! @param handle - handle for the module instance.
+ //! @param pConfig - pointer to the configuration structure.
+ //!
+ //! This function configures the ADC slot for operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_configure_slot(void *pHandle,
+ uint32_t ui32SlotNumber,
+ am_hal_adc_slot_config_t *pSlotConfig);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC DMA configuration function
+ //!
+ //! @param handle - handle for the module instance.
+ //! @param pConfig - pointer to the configuration structure.
+ //!
+ //! This function configures the ADC DMA for operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_configure_dma(void *pHandle,
+ am_hal_adc_dma_config_t *pDMAConfig);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC device specific control function.
+ //!
+ //! @param handle - handle for the module instance.
+ //! @eRequest - One of:
+ //! AM_HAL_ADC_REQ_WINDOW_CONFIG
+ //! AM_HAL_ADC_REQ_TEMP_CELSIUS_GET (pArgs is required, see enums).
+ //! AM_HAL_ADC_REQ_TEMP_TRIMS_GET (pArgs is required, see enums).
+ //!
+ //! This function provides for special control functions for the ADC operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_control(void *pHandle,
+ am_hal_adc_request_e eRequest,
+ void *pArgs);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC enable function
+ //!
+ //! @param handle - handle for the module instance.
+ //!
+ //! This function enables the ADC operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_enable(void *pHandle);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC disable function
+ //!
+ //! @param handle - handle for the module instance.
+ //!
+ //! This function disables the ADC operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_disable(void *pHandle);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC status function
+ //!
+ //! @param handle - handle for the interface.
+ //!
+ //! This function returns the current status of the DMA operation.
+ //!
+ //! @return status - DMA status flags.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_status_get(void *pHandle,
+ am_hal_adc_status_t *pStatus );
+
+ //*****************************************************************************
+ //
+ //! @brief ADC enable interrupts function
+ //!
+ //! @param handle - handle for the interface.
+ //! @param ui32IntMask - ADC interrupt mask.
+ //!
+ //! This function enables the specific indicated interrupts.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_interrupt_enable(void *pHandle, uint32_t ui32IntMask);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC disable interrupts function
+ //!
+ //! @param handle - handle for the interface.
+ //! @param ui32IntMask - ADC interrupt mask.
+ //!
+ //! This function disable the specific indicated interrupts.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_interrupt_disable(void *pHandle, uint32_t ui32IntMask);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC interrupt status function
+ //!
+ //! @param handle - handle for the interface.
+ //!
+ //! This function returns the specific indicated interrupt status.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_interrupt_status(void *pHandle,
+ uint32_t *pui32Status,
+ bool bEnabledOnly);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC interrupt clear
+ //!
+ //! @param handle - handle for the interface.
+ //! @param ui32IntMask - uint32_t for interrupts to clear
+ //!
+ //! This function clears the interrupts for the given peripheral.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_interrupt_clear(void *pHandle, uint32_t ui32IntMask);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC sample read function
+ //!
+ //! @param pHandle - handle for the module instance.
+ //! @param bFullSample - true to get a full sample including
+ //! the fractional part.
+ //! @param pui32InSampleBuffer - Ptr to the input sample buffer.
+ //! If NULL then samples will be read directly
+ //! from the FIFO.
+ //! @param pui32InOutNumberSamples - Ptr to variable containing the number of
+ //! samples.
+ //! @param pui32OutSampleBuffer - Ptr to the required output sample buffer.
+ //!
+ //! This function reads samples from the ADC FIFO or an SRAM sample buffer
+ //! returned by a DMA operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_samples_read(void *pHandle, bool bFullSample,
+ uint32_t *pui32InSampleBuffer,
+ uint32_t *pui32InOutNumberSamples,
+ am_hal_adc_sample_t *pui32OutBuffer);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC FIFO trigger function
+ //!
+ //! @param handle - handle for the module instance.
+ //!
+ //! This function triggers the ADC operation.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_sw_trigger(void *pHandle);
+
+ //*****************************************************************************
+ //
+ //! @brief ADC power control function
+ //!
+ //! @param handle - handle for the interface.
+ //! @param ePowerState - the desired power state to move the peripheral to.
+ //! @param bRetainState - flag (if true) to save/restore peripheral state upon
+ //! power state change.
+ //!
+ //! This function updates the peripheral to a given power state.
+ //!
+ //! @return status - generic or interface specific status.
+ //
+ //*****************************************************************************
+ extern uint32_t am_hal_adc_power_control(void *pHandle,
+ am_hal_sysctrl_power_state_e ePowerState,
+ bool bRetainState);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // AM_HAL_ADC_H
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
+
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.c b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.c
new file mode 100644
index 0000000..8e4e839
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.c
@@ -0,0 +1,3132 @@
+//*****************************************************************************
+//
+//! @file am_hal_ble.c
+//!
+//! @brief HAL functions for the BLE interface.
+//!
+//! @addtogroup
+//! @ingroup
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include "am_mcu_apollo.h"
+#include "am_hal_ble_patch.h"
+#include "am_hal_ble_patch_b0.h"
+
+//*****************************************************************************
+//
+// Globals
+//
+//*****************************************************************************
+am_hal_ble_state_t g_sBLEState[AM_REG_BLEIF_NUM_MODULES];
+
+//*****************************************************************************
+//
+// Helper macros for rev B0 parts.
+//
+//*****************************************************************************
+#define BLEIF_INTSTAT_BLECSSTATN_Msk BLEIF_INTSTAT_B2MSHUTDN_Msk
+#define BLEIF_INTSTAT_BLECIRQN_Msk BLEIF_INTSTAT_B2MACTIVE_Msk
+
+#define SKIP_FALLING_EDGES 0
+
+//*****************************************************************************
+//
+// SPI "options"
+//
+// These values affect the behavior of the BLE HAL in regards to the SPI bus,
+// but end users aren't likely to need to modify them. They are collected here
+// for testing and debugging purposes.
+//
+//*****************************************************************************
+// The amount of extra delay to add between successive SPI TX packets (in
+// microseconds).
+#define AM_BLE_TX_PACKET_SPACING_US 1
+
+// The BLE core takes a little while to wake up from a fresh boot, which means
+// that the patch_apply function might time-out on the first few tries. Set
+// this variable to let it try again for a finite number of trials.
+#define AM_BLE_NUM_PATCH_TRIALS 5000
+
+// Patch complete can also take some time.
+#define AM_BLE_NUM_PATCH_CMP_TRIALS 5000
+
+// How long the MCU should wait for SPI_STATUS before assuming the BLE core is
+// busy (measured in 10 us increments).
+#define AM_BLE_STATUS_TIMEOUT 300
+
+//*****************************************************************************
+//
+// Private types.
+//
+//*****************************************************************************
+#define AM_HAL_MAGIC_BLE 0x775230
+
+#define AM_HAL_BLE_CHK_HANDLE(h) \
+ ((h) && ((am_hal_handle_prefix_t *)(h))->s.bInit \
+ && (((am_hal_handle_prefix_t *)(h))->s.magic == AM_HAL_MAGIC_BLE))
+
+//*****************************************************************************
+//
+// BLE Core maximum patch packet size.
+//
+// Specified as part of the protocol.
+//
+//*****************************************************************************
+#define MAX_PATCH_PACKET_LEN 0x80
+
+//*****************************************************************************
+//
+// Some of the NationZ register addresses are different between A1/A2 and B0.
+//
+//*****************************************************************************
+
+#define AM_HAL_BLE_IP_RAM_32K_CLOCK_ADDR_A1 0x20006054
+#define AM_HAL_BLE_IP_RAM_MODEX_TRIM_ADDR_A1 0x20006070
+#define AM_HAL_BLE_IP_RAM_POWER_LEVEL_ADDR_A1 0x20006038
+#define AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_A1 (0x200067b8 + 0x0c)
+
+#define AM_HAL_BLE_IP_RAM_32K_CLOCK_ADDR_B0 0x20006858
+#define AM_HAL_BLE_IP_RAM_MODEX_TRIM_ADDR_B0 0x20006874
+#define AM_HAL_BLE_IP_RAM_POWER_LEVEL_ADDR_B0 0x20006838
+#define AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_B0 (0x20006e0c + 0x0c)
+
+//*****************************************************************************
+//
+// Static function prototypes.
+//
+//*****************************************************************************
+static bool am_hal_ble_bus_lock(am_hal_ble_state_t *pBle);
+static void am_hal_ble_bus_release(am_hal_ble_state_t *pBle);
+static uint32_t am_hal_ble_fifo_drain(void *pHandle);
+static void am_hal_ble_fifo_read(void *pHandle, uint32_t *pui32Data, uint32_t ui32NumBytes);
+static bool am_hal_ble_check_status(am_hal_ble_state_t *pBle);
+static bool am_hal_ble_check_irq(am_hal_ble_state_t *pBle);
+static uint32_t am_hal_ble_cmd_write(void *pHandle, am_hal_ble_transfer_t *psTransfer);
+static uint32_t am_hal_ble_load_modex_trim_set(void *pHandle);
+static uint32_t nonblocking_write(am_hal_ble_state_t *pBle, am_hal_ble_transfer_t *psTransfer);
+static uint32_t nonblocking_read(am_hal_ble_state_t *pBle, am_hal_ble_transfer_t *psTransfer);
+static uint8_t am_hal_ble_read_trimdata_from_info1(void);
+
+//*****************************************************************************
+//
+// Look up Table for NZ CRC16 generation
+//
+//*****************************************************************************
+static const uint16_t ccitt_table[] =
+{
+ 0x0000, 0x8005, 0x800F, 0x000A, 0x801B, 0x001E, 0x0014, 0x8011,
+ 0x8033, 0x0036, 0x003C, 0x8039, 0x0028, 0x802D, 0x8027, 0x0022,
+ 0x8063, 0x0066, 0x006C, 0x8069, 0x0078, 0x807D, 0x8077, 0x0072,
+ 0x0050, 0x8055, 0x805F, 0x005A, 0x804B, 0x004E, 0x0044, 0x8041,
+ 0x80C3, 0x00C6, 0x00CC, 0x80C9, 0x00D8, 0x80DD, 0x80D7, 0x00D2,
+ 0x00F0, 0x80F5, 0x80FF, 0x00FA, 0x80EB, 0x00EE, 0x00E4, 0x80E1,
+ 0x00A0, 0x80A5, 0x80AF, 0x00AA, 0x80BB, 0x00BE, 0x00B4, 0x80B1,
+ 0x8093, 0x0096, 0x009C, 0x8099, 0x0088, 0x808D, 0x8087, 0x0082,
+ 0x8183, 0x0186, 0x018C, 0x8189, 0x0198, 0x819D, 0x8197, 0x0192,
+ 0x01B0, 0x81B5, 0x81BF, 0x01BA, 0x81AB, 0x01AE, 0x01A4, 0x81A1,
+ 0x01E0, 0x81E5, 0x81EF, 0x01EA, 0x81FB, 0x01FE, 0x01F4, 0x81F1,
+ 0x81D3, 0x01D6, 0x01DC, 0x81D9, 0x01C8, 0x81CD, 0x81C7, 0x01C2,
+ 0x0140, 0x8145, 0x814F, 0x014A, 0x815B, 0x015E, 0x0154, 0x8151,
+ 0x8173, 0x0176, 0x017C, 0x8179, 0x0168, 0x816D, 0x8167, 0x0162,
+ 0x8123, 0x0126, 0x012C, 0x8129, 0x0138, 0x813D, 0x8137, 0x0132,
+ 0x0110, 0x8115, 0x811F, 0x011A, 0x810B, 0x010E, 0x0104, 0x8101,
+ 0x8303, 0x0306, 0x030C, 0x8309, 0x0318, 0x831D, 0x8317, 0x0312,
+ 0x0330, 0x8335, 0x833F, 0x033A, 0x832B, 0x032E, 0x0324, 0x8321,
+ 0x0360, 0x8365, 0x836F, 0x036A, 0x837B, 0x037E, 0x0374, 0x8371,
+ 0x8353, 0x0356, 0x035C, 0x8359, 0x0348, 0x834D, 0x8347, 0x0342,
+ 0x03C0, 0x83C5, 0x83CF, 0x03CA, 0x83DB, 0x03DE, 0x03D4, 0x83D1,
+ 0x83F3, 0x03F6, 0x03FC, 0x83F9, 0x03E8, 0x83ED, 0x83E7, 0x03E2,
+ 0x83A3, 0x03A6, 0x03AC, 0x83A9, 0x03B8, 0x83BD, 0x83B7, 0x03B2,
+ 0x0390, 0x8395, 0x839F, 0x039A, 0x838B, 0x038E, 0x0384, 0x8381,
+ 0x0280, 0x8285, 0x828F, 0x028A, 0x829B, 0x029E, 0x0294, 0x8291,
+ 0x82B3, 0x02B6, 0x02BC, 0x82B9, 0x02A8, 0x82AD, 0x82A7, 0x02A2,
+ 0x82E3, 0x02E6, 0x02EC, 0x82E9, 0x02F8, 0x82FD, 0x82F7, 0x02F2,
+ 0x02D0, 0x82D5, 0x82DF, 0x02DA, 0x82CB, 0x02CE, 0x02C4, 0x82C1,
+ 0x8243, 0x0246, 0x024C, 0x8249, 0x0258, 0x825D, 0x8257, 0x0252,
+ 0x0270, 0x8275, 0x827F, 0x027A, 0x826B, 0x026E, 0x0264, 0x8261,
+ 0x0220, 0x8225, 0x822F, 0x022A, 0x823B, 0x023E, 0x0234, 0x8231,
+ 0x8213, 0x0216, 0x021C, 0x8219, 0x0208, 0x820D, 0x8207, 0x0202
+};
+
+//*****************************************************************************
+//
+// Helper macros for delays.
+//
+//*****************************************************************************
+#define delay_ms(ms) am_hal_flash_delay(FLASH_CYCLES_US(1000 * (ms)))
+#define delay_us(us) am_hal_flash_delay(FLASH_CYCLES_US(us))
+
+#define WHILE_TIMEOUT_MS(expr, timeout, error) \
+ { \
+ uint32_t ui32Timeout = 0; \
+ while (expr) \
+ { \
+ if (ui32Timeout >= (timeout * 1000)) \
+ { \
+ return error; \
+ } \
+ \
+ delay_us(1); \
+ ui32Timeout++; \
+ } \
+ }
+
+#define WHILE_TIMEOUT_MS_BREAK(expr, timeout, error) \
+ { \
+ uint32_t ui32Timeout = 0; \
+ while (expr) \
+ { \
+ if (ui32Timeout >= (timeout * 1000)) \
+ { \
+ break; \
+ } \
+ \
+ delay_us(1); \
+ ui32Timeout++; \
+ } \
+ }
+//*****************************************************************************
+//
+// Helper function for checking BLE data.
+//
+//*****************************************************************************
+static bool
+buffer_compare(void *b1, void *b2, uint32_t len)
+{
+ uint8_t *p1 = b1;
+ uint8_t *p2 = b2;
+
+ for (uint32_t i = 0; i < len; i++)
+ {
+ if (p1[i] != p2[i])
+ {
+ return false;
+ }
+ }
+
+ return true;
+}
+
+//*****************************************************************************
+//
+// Helper function for CRC caculation of BLE patch.
+//
+//*****************************************************************************
+static uint16_t
+am_hal_ble_crc_nz(uint8_t *pui8Data, uint32_t len)
+{
+ uint16_t ui16CurValue = 0;
+ uint32_t i;
+
+ for (i = 0; i < len; i++)
+ {
+ ui16CurValue = ccitt_table[(((uint8_t)(ui16CurValue >> 8)) ^ pui8Data[i]) & 0xFF] ^ (ui16CurValue << 8);
+ }
+
+ return ((ui16CurValue ^ 0) & ((1 << 16) - 1));
+}
+
+//*****************************************************************************
+//
+// Default options for the BLE module.
+//
+//*****************************************************************************
+const am_hal_ble_config_t am_hal_ble_default_config =
+{
+ // Configure the HCI interface clock for 6 MHz
+ .ui32SpiClkCfg = AM_HAL_BLE_HCI_CLK_DIV8,
+
+ // Set HCI read and write thresholds to 32 bytes each.
+ .ui32ReadThreshold = 32,
+ .ui32WriteThreshold = 32,
+
+ // The MCU will supply the clock to the BLE core.
+ .ui32BleClockConfig = AM_HAL_BLE_CORE_MCU_CLK,
+
+ // Default settings for expected BLE clock drift.
+ .ui32ClockDrift = 0,
+ .ui32SleepClockDrift = 50,
+
+ // Default setting - AGC Enabled
+ .bAgcEnabled = true,
+
+ // Default setting - Sleep Algo enabled
+ .bSleepEnabled = true,
+
+ // Apply the default patches when am_hal_ble_boot() is called.
+ .bUseDefaultPatches = true,
+};
+
+//*****************************************************************************
+//
+// Function for controlling the WAKE signal.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_wakeup_set(void *pHandle, uint32_t ui32Mode)
+{
+ am_hal_ble_state_t *pBle = pHandle;
+
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_BLE_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+// am_hal_debug_gpio_set(BLE_DEBUG_TRACE_08);
+
+ if ( ui32Mode )
+ {
+ BLEIFn(pBle->ui32Module)->BLECFG_b.WAKEUPCTL = BLEIF_BLECFG_WAKEUPCTL_ON;
+ am_hal_debug_gpio_set(BLE_DEBUG_TRACE_08);
+ }
+ else
+ {
+#ifndef AM_DISABLE_BLE_SLEEP
+ BLEIFn(pBle->ui32Module)->BLECFG_b.WAKEUPCTL = BLEIF_BLECFG_WAKEUPCTL_OFF;
+ am_hal_debug_gpio_clear(BLE_DEBUG_TRACE_08);
+#endif
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+
+// am_hal_debug_gpio_clear(BLE_DEBUG_TRACE_08);
+}
+
+//*****************************************************************************
+//
+// Buffer for patch data.
+//
+//*****************************************************************************
+am_hal_ble_buffer(128 + 4) g_psPatchBuffer;
+
+//*****************************************************************************
+//
+// Initialize the global variables associated with a BLE module, and return its
+// handle.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_initialize(uint32_t ui32Module, void **ppHandle)
+{
+ //
+ // Check the arguments.
+ //
+ if (ui32Module >= AM_REG_BLEIF_NUM_MODULES)
+ {
+ return AM_HAL_STATUS_OUT_OF_RANGE;
+ }
+
+ if (!ppHandle)
+ {
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+
+ //
+ // Check if the handle is unallocated.
+ //
+ if (g_sBLEState[ui32Module].prefix.s.bInit)
+ {
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Initialize the handle.
+ //
+ memset(&g_sBLEState[ui32Module].sCurrentTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ memset(&g_sBLEState[ui32Module].sSavedTransfer, 0, sizeof(am_hal_ble_transfer_t));
+
+ g_sBLEState[ui32Module].prefix.s.bInit = true;
+ g_sBLEState[ui32Module].prefix.s.magic = AM_HAL_MAGIC_BLE;
+ g_sBLEState[ui32Module].ui32Module = ui32Module;
+ g_sBLEState[ui32Module].ui32TransferIndex = 0;
+ g_sBLEState[ui32Module].bPatchComplete = 0;
+ g_sBLEState[ui32Module].bContinuePacket = 0;
+ g_sBLEState[ui32Module].bSavedPacket = 0;
+ g_sBLEState[ui32Module].bBusy = 0;
+ g_sBLEState[ui32Module].bCmdComplete = 0;
+ g_sBLEState[ui32Module].bDmaComplete = 0;
+ g_sBLEState[ui32Module].bFlowControlComplete = 0;
+ g_sBLEState[ui32Module].bUseDefaultPatches = false;
+
+ //
+ // Pass the handle back to the caller.
+ //
+ *ppHandle = &g_sBLEState[ui32Module];
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_initialize()
+
+//*****************************************************************************
+//
+// Initialize the global variables associated with a BLE module, and return its
+// handle.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_deinitialize(void *pHandle)
+{
+ am_hal_ble_state_t *pBLE = (am_hal_ble_state_t *)pHandle;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Initialize the handle.
+ //
+ memset(&(pBLE->sCurrentTransfer), 0, sizeof(am_hal_ble_transfer_t));
+
+ pBLE->prefix.s.bInit = false;
+ pBLE->prefix.s.magic = 0;
+ pBLE->ui32Module = 0;
+ pBLE->ui32TransferIndex = 0;
+ pBLE->bPatchComplete = 0;
+ pBLE->bContinuePacket = 0;
+ pBLE->bSavedPacket = 0;
+ pBLE->bBusy = 0;
+ pBLE->bCmdComplete = 0;
+ pBLE->bDmaComplete = 0;
+ pBLE->bFlowControlComplete = 0;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_deinitialize()
+
+//*****************************************************************************
+//
+// Configuration function.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_config(void *pHandle, const am_hal_ble_config_t *psConfig)
+{
+ uint32_t ui32Module;
+ uint32_t ui32BleClkConfig;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ //
+ // Configure the SPI.
+ //
+ BLEIFn(ui32Module)->MSPICFG = 0x3;
+ BLEIFn(ui32Module)->MSPICFG_b.RDFC = 0;
+ BLEIFn(ui32Module)->MSPICFG_b.WTFC = 0;
+ BLEIFn(ui32Module)->MSPICFG_b.WTFCPOL = 1;
+ BLEIFn(ui32Module)->FIFOTHR_b.FIFOWTHR = psConfig->ui32WriteThreshold;
+ BLEIFn(ui32Module)->FIFOTHR_b.FIFORTHR = psConfig->ui32ReadThreshold;
+ BLEIFn(ui32Module)->FIFOCTRL |= BLEIF_FIFOCTRL_POPWR_Msk;
+
+ //
+ // Clock configuration register writes need to be combined to a single
+ // operation.
+ //
+ ui32BleClkConfig = _VAL2FLD(BLEIF_CLKCFG_FSEL, psConfig->ui32SpiClkCfg);
+ ui32BleClkConfig |= _VAL2FLD(BLEIF_CLKCFG_IOCLKEN, 1);
+
+ if (psConfig->ui32BleClockConfig == AM_HAL_BLE_CORE_MCU_CLK)
+ {
+ ui32BleClkConfig |= _VAL2FLD(BLEIF_CLKCFG_CLK32KEN, 1);
+ }
+
+ BLEIFn(ui32Module)->CLKCFG = ui32BleClkConfig;
+
+ if (APOLLO3_A1)
+ {
+ //
+ // Modify the BLE core's NVDS settings to match our configuration.
+ //
+ uint8_t *pui8NVDSData = (uint8_t *) am_ble_nvds_patch.pui32Data;
+
+ //
+ // Set the clock source.
+ //
+ pui8NVDSData[AM_HAL_BLE_NVDS_CLOCKSOURCE_OFFSET + 3] =
+ (psConfig->ui32BleClockConfig & 0xFF);
+
+ //
+ // Set the expected BLE clock drift PPM
+ //
+ pui8NVDSData[AM_HAL_BLE_NVDS_CLOCKDRIFT_OFFSET + 3] =
+ (psConfig->ui32ClockDrift & 0x00FF);
+
+ pui8NVDSData[AM_HAL_BLE_NVDS_CLOCKDRIFT_OFFSET + 4] =
+ (psConfig->ui32ClockDrift & 0xFF00) >> 8;
+
+ //
+ // Set the sleep clock drift PPM.
+ //
+ pui8NVDSData[AM_HAL_BLE_NVDS_SLEEPCLOCKDRIFT_OFFSET + 3] =
+ (psConfig->ui32SleepClockDrift & 0x00FF);
+
+ pui8NVDSData[AM_HAL_BLE_NVDS_SLEEPCLOCKDRIFT_OFFSET + 4] =
+ (psConfig->ui32SleepClockDrift & 0xFF00) >> 8;
+
+ //
+ // Configure Sleep mode.
+ //
+ pui8NVDSData[AM_HAL_BLE_NVDS_SLEEPENABLE_OFFSET + 3] = (psConfig->bSleepEnabled == true) ? 1 : 0;
+ //
+ // Configure AGC.
+ //
+ pui8NVDSData[AM_HAL_BLE_NVDS_AGC_OFFSET + 3] = (psConfig->bAgcEnabled == true) ? 1 : 0;
+
+ //
+ // Update the CRC.
+ //
+ am_ble_nvds_patch.ui32CRC = am_hal_ble_crc_nz(pui8NVDSData,
+ am_ble_nvds_patch.ui32Length);
+ }
+
+ //
+ // Save the addresses to the patches we intend to use.
+ //
+ g_sBLEState[ui32Module].bUseDefaultPatches = psConfig->bUseDefaultPatches;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_config()
+
+//*****************************************************************************
+//
+// Enable BLE
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_power_control(void *pHandle, uint32_t ui32PowerState)
+{
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_BLE_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ if (ui32PowerState == AM_HAL_BLE_POWER_ACTIVE)
+ {
+ //
+ // Don't run this initialization if the BLE is already enabled.
+ //
+ if ( PWRCTRL->DEVPWRSTATUS_b.BLEL == 0)
+ {
+ MCUCTRL->FEATUREENABLE |= 1;
+ WHILE_TIMEOUT_MS ( ((MCUCTRL->FEATUREENABLE & 0x7) != 0x7), 100,
+ AM_HAL_BLE_FEATURE_DISABLED );
+
+ //
+ // Enable the BLE module.
+ //
+ if (am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_PERIPH_BLEL) !=
+ AM_HAL_STATUS_SUCCESS)
+ {
+ return AM_HAL_BLE_REGULATOR_FAILED;
+ }
+
+ //
+ // Release the BLE module RESET, start the "power state machine", and
+ // enable the clocks.
+ //
+ BLEIFn(ui32Module)->CLKCFG = _VAL2FLD(BLEIF_CLKCFG_CLK32KEN, 1);
+ BLEIFn(ui32Module)->BLEDBG_b.DBGDATA = 1 << 14;
+
+ //
+ // The reset bit is different between A0 and subsequent revisions.
+ //
+ if ( APOLLO3_GE_A1 )
+ {
+ MCUCTRL->MISCCTRL_b.BLE_RESETN = 1;
+ }
+ else
+ {
+ AM_REGVAL(0x40020198) = 0x1 << 2;
+ }
+
+ delay_ms(5);
+ BLEIFn(ui32Module)->BLECFG_b.PWRSMEN = 1;
+
+ //
+ // Wait for indication that the power is on.
+ //
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->BSTATUS_b.PWRST != 3, 1000,
+ AM_HAL_BLE_POWERUP_INCOMPLETE );
+ }
+ }
+ else if (ui32PowerState == AM_HAL_BLE_POWER_OFF)
+ {
+ //
+ // Reverse of power-up. Disable clocks, set reset, then disable power.
+ //
+ BLEIFn(ui32Module)->CLKCFG = 0;
+ BLEIF->BLEDBG_b.DBGDATA = 0;
+
+ if ( APOLLO3_GE_A1 )
+ {
+ MCUCTRL->MISCCTRL_b.BLE_RESETN = 0;
+ }
+ else
+ {
+ AM_REGVAL(0x40020198) &= ~(0x1 << 2);
+ }
+
+ BLEIF->BLECFG_b.PWRSMEN = 0;
+
+ if (am_hal_pwrctrl_periph_disable(AM_HAL_PWRCTRL_PERIPH_BLEL) !=
+ AM_HAL_STATUS_SUCCESS)
+ {
+ return AM_HAL_BLE_SHUTDOWN_FAILED;
+ }
+
+ delay_us(100);
+ }
+ else
+ {
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_power_control()
+
+//*****************************************************************************
+//
+// Perform all of the operations necessary to prepare the BLE controller for
+// HCI operation.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_boot(void *pHandle)
+{
+ uint32_t ui32Status;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // The handle is good, so we can access it as a structure.
+ //
+ am_hal_ble_state_t *pBLE = pHandle;
+
+ if (pBLE->bUseDefaultPatches)
+ {
+ //
+ // The B0 silicon patching method is slightly different from A1. B0 silicon
+ // does not require the Copy Patch method introduced for A1 silicon.
+ //
+ if (APOLLO3_A0 || APOLLO3_A1)
+ {
+ ui32Status = am_hal_ble_default_copy_patch_apply(pHandle);
+ if (ui32Status != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32Status;
+ }
+ }
+
+ //
+ // Apply the BLE trim value
+ //
+ ui32Status = am_hal_ble_default_trim_set_ramcode(pHandle);
+ if (ui32Status != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32Status;
+ }
+
+ //
+ // Apply the NVDS patch.
+ //
+ ui32Status = am_hal_ble_default_patch_apply(pHandle);
+ if (ui32Status != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32Status;
+ }
+
+ //
+ // Complete the patching step
+ //
+ ui32Status = am_hal_ble_patch_complete(pHandle);
+ if (ui32Status != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32Status;
+ }
+ }
+
+ if (am_hal_ble_check_32k_clock(pBLE) == AM_HAL_STATUS_FAIL)
+ {
+ return AM_HAL_BLE_32K_CLOCK_UNSTABLE;
+ }
+ else
+ {
+ return AM_HAL_STATUS_SUCCESS;
+ }
+} // am_hal_ble_boot()
+
+//*****************************************************************************
+//
+// Apply a patch.
+//
+// Returns 0 for success or a numerical error code for failures.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_patch_apply(void *pHandle, am_hal_ble_patch_t *psPatch)
+{
+ uint8_t pui8ExpectedResponse[32];
+ uint32_t ui32ErrorStatus;
+ uint32_t ui32Trial;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ uint32_t ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+ am_hal_ble_transfer_t sTransfer;
+ am_hal_ble_buffer(16) psPatchBuffer;
+
+ //
+ // Send a header packet.
+ //
+ psPatchBuffer.bytes[0] = 0x01;
+ psPatchBuffer.bytes[1] = psPatch->ui32Type;
+ psPatchBuffer.bytes[2] = 0xF1;
+ psPatchBuffer.bytes[3] = 0x02;
+ psPatchBuffer.bytes[4] = (psPatch->ui32Length & 0xFF);
+ psPatchBuffer.bytes[5] = ((psPatch->ui32Length >> 8) & 0xFF);
+
+ //
+ // This first packet might take a few tries.
+ //
+ for ( ui32Trial = 0; ui32Trial < AM_BLE_NUM_PATCH_TRIALS; ui32Trial++)
+ {
+ ui32ErrorStatus = am_hal_ble_blocking_hci_write(pHandle,
+ AM_HAL_BLE_RAW,
+ psPatchBuffer.words,
+ 6);
+
+ if ( ui32ErrorStatus == AM_HAL_STATUS_SUCCESS )
+ {
+ break;
+ }
+ }
+
+ if (ui32ErrorStatus != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Wait for the header response. It should be 5 bytes long.
+ //
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 1000,
+ AM_HAL_BLE_NO_HCI_RESPONSE );
+
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_READ;
+ sTransfer.pui32Data = psPatchBuffer.words;
+ sTransfer.ui16Length = 5;
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ pui8ExpectedResponse[0] = 0x04;
+ pui8ExpectedResponse[1] = psPatch->ui32Type;
+ pui8ExpectedResponse[2] = 0xF1;
+ pui8ExpectedResponse[3] = 0x01;
+ pui8ExpectedResponse[4] = 0x00;
+
+ if (!buffer_compare(psPatchBuffer.words, pui8ExpectedResponse, 5))
+ {
+ return AM_HAL_STATUS_FAIL;
+ }
+
+ //
+ // Send all of the data, including the acknowledgements.
+ //
+ uint32_t ui32RemainingBytes = psPatch->ui32Length;
+ uint32_t ui32Index = 0;
+
+ while (ui32RemainingBytes)
+ {
+ //
+ // Figure out how many bytes to send in the next packet.
+ //
+ uint32_t ui32TransferSize = (ui32RemainingBytes > MAX_PATCH_PACKET_LEN ?
+ MAX_PATCH_PACKET_LEN : ui32RemainingBytes);
+
+ //
+ // Send a data header.
+ //
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_WRITE;
+ sTransfer.pui32Data = g_psPatchBuffer.words;
+ sTransfer.ui16Length = ui32TransferSize + 4;
+ sTransfer.bContinue = false;
+
+ g_psPatchBuffer.bytes[0] = 0x01;
+ g_psPatchBuffer.bytes[1] = psPatch->ui32Type;
+ g_psPatchBuffer.bytes[2] = 0xF2;
+ g_psPatchBuffer.bytes[3] = ui32TransferSize;
+
+ // copy data into buffer
+ memcpy(&g_psPatchBuffer.bytes[4], (uint8_t *)&(psPatch->pui32Data[ui32Index / 4]), ui32TransferSize);
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Read the acknowledgement.
+ //
+ WHILE_TIMEOUT_MS( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 1000,
+ AM_HAL_BLE_NO_HCI_RESPONSE);
+
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_READ;
+ sTransfer.pui32Data = psPatchBuffer.words;
+ sTransfer.ui16Length = 5;
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ pui8ExpectedResponse[0] = 0x04;
+ pui8ExpectedResponse[1] = psPatch->ui32Type;
+ pui8ExpectedResponse[2] = 0xF2;
+ pui8ExpectedResponse[3] = 0x01;
+ pui8ExpectedResponse[4] = 0x00;
+
+ if (!buffer_compare(psPatchBuffer.words, pui8ExpectedResponse, 5))
+ {
+ return AM_HAL_STATUS_FAIL;
+ }
+
+ //
+ // Update the tracking variables
+ //
+ ui32RemainingBytes -= ui32TransferSize;
+ ui32Index += ui32TransferSize;
+ }
+
+ //
+ // Send the CRC, and make sure we got it right.
+ //
+ psPatchBuffer.bytes[0] = 0x01;
+ psPatchBuffer.bytes[1] = psPatch->ui32Type;
+ psPatchBuffer.bytes[2] = 0xF3;
+ psPatchBuffer.bytes[3] = 0x02;
+ psPatchBuffer.bytes[4] = (psPatch->ui32CRC & 0xFF);
+ psPatchBuffer.bytes[5] = ((psPatch->ui32CRC >> 8) & 0xFF);
+
+ if (am_hal_ble_blocking_hci_write(pHandle, AM_HAL_BLE_RAW, psPatchBuffer.words, 6) !=
+ AM_HAL_STATUS_SUCCESS)
+ {
+ return AM_HAL_STATUS_FAIL;
+ }
+
+ //
+ // Wait for the header response. It should be 5 bytes long.
+ //
+ WHILE_TIMEOUT_MS( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 1000,
+ AM_HAL_BLE_NO_HCI_RESPONSE );
+
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_READ;
+ sTransfer.pui32Data = psPatchBuffer.words;
+ sTransfer.ui16Length = 5;
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ pui8ExpectedResponse[0] = 0x04;
+ pui8ExpectedResponse[1] = psPatch->ui32Type;
+ pui8ExpectedResponse[2] = 0xF3;
+ pui8ExpectedResponse[3] = 0x01;
+ pui8ExpectedResponse[4] = 0x00;
+
+ if (!buffer_compare(psPatchBuffer.words, pui8ExpectedResponse, 5))
+ {
+ return AM_HAL_STATUS_FAIL;
+ }
+ else
+ {
+ return AM_HAL_STATUS_SUCCESS;
+ }
+} // am_hal_ble_patch_apply()
+
+uint32_t
+am_hal_ble_patch_copy_end_apply(void *pHandle)
+{
+ uint8_t pui8ExpectedResponse[32];
+ uint32_t ui32ErrorStatus;
+ uint32_t ui32Trial;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ uint32_t ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+ am_hal_ble_transfer_t sTransfer;
+ am_hal_ble_buffer(16) psPatchBuffer;
+
+ //
+ // Send a header packet.
+ //
+ psPatchBuffer.bytes[0] = 0x01;
+ psPatchBuffer.bytes[1] = 0xEE;
+ psPatchBuffer.bytes[2] = 0xF1;
+ psPatchBuffer.bytes[3] = 0x02;
+ psPatchBuffer.bytes[4] = 0x00;
+ psPatchBuffer.bytes[5] = 0x00;
+
+ //
+ // This first packet might take a few tries.
+ //
+ for ( ui32Trial = 0; ui32Trial < AM_BLE_NUM_PATCH_TRIALS; ui32Trial++)
+ {
+ ui32ErrorStatus = am_hal_ble_blocking_hci_write(pHandle,
+ AM_HAL_BLE_RAW,
+ psPatchBuffer.words,
+ 6);
+
+ if ( ui32ErrorStatus == AM_HAL_STATUS_SUCCESS )
+ {
+
+ break;
+ }
+ }
+
+ if (ui32ErrorStatus != AM_HAL_STATUS_SUCCESS)
+ {
+
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Wait for the header response. It should be 5 bytes long.
+ //
+ WHILE_TIMEOUT_MS( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 1000, AM_HAL_BLE_NO_HCI_RESPONSE);
+
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_READ;
+ sTransfer.pui32Data = psPatchBuffer.words;
+ sTransfer.ui16Length = 5;
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+
+ return ui32ErrorStatus;
+ }
+
+ pui8ExpectedResponse[0] = 0x04;
+ pui8ExpectedResponse[1] = 0xEE;
+ pui8ExpectedResponse[2] = 0xF1;
+ pui8ExpectedResponse[3] = 0x01;
+ pui8ExpectedResponse[4] = 0x00;
+
+ if (!buffer_compare(psPatchBuffer.words, pui8ExpectedResponse, 5))
+ {
+
+ return AM_HAL_STATUS_FAIL;
+ }
+ return 0;
+} // am_hal_ble_patch_copy_end_apply()
+
+//*****************************************************************************
+//
+// Apply the default copy patch.
+//
+// Returns 0 for success or a numerical error code for failures.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_default_copy_patch_apply(void *pHandle)
+{
+ uint32_t ui32Status;
+ uint16_t ui16Crc;
+
+ am_hal_ble_patch_t **psCopyPatch;
+
+ psCopyPatch = am_hal_ble_default_copy_patches;
+
+ ui16Crc = am_hal_ble_crc_nz((uint8_t*)(psCopyPatch[0]->pui32Data), psCopyPatch[0]->ui32Length);
+ psCopyPatch[0]->ui32CRC = ui16Crc;
+ ui32Status = am_hal_ble_patch_apply(pHandle, psCopyPatch[0]);
+ if (ui32Status != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32Status;
+ }
+
+ ui32Status = am_hal_ble_patch_copy_end_apply(pHandle);
+ if ( ui32Status != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32Status;
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+// Apply the default patch.
+//
+// Returns 0 for success or a numerical error code for failures.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_default_patch_apply(void *pHandle)
+{
+ uint32_t ui32Status, i = 0;
+ uint16_t ui16Crc;
+ uint32_t ui32NumPatches;
+ am_hal_ble_patch_t **psDefaultPatches;
+
+ if (APOLLO3_A0 || APOLLO3_A1)
+ {
+ ui32NumPatches = am_hal_ble_num_default_patches;
+ psDefaultPatches = am_hal_ble_default_patches;
+ }
+ else
+ {
+ ui32NumPatches = am_hal_ble_num_default_patches_b0;
+ psDefaultPatches = am_hal_ble_default_patches_b0;
+ }
+
+ for ( i = 0; i < ui32NumPatches; i++ )
+ {
+ ui16Crc = am_hal_ble_crc_nz((uint8_t*)(psDefaultPatches[i]->pui32Data), psDefaultPatches[i]->ui32Length);
+ psDefaultPatches[i]->ui32CRC = ui16Crc;
+ ui32Status = am_hal_ble_patch_apply(pHandle, psDefaultPatches[i]);
+ if (ui32Status != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32Status;
+ }
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_default_patch_apply()
+
+//*****************************************************************************
+//
+// Complete the patching process
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_patch_complete(void *pHandle)
+{
+ uint32_t ui32ErrorStatus;
+ am_hal_ble_transfer_t sTransfer;
+ am_hal_ble_buffer(12) sTxBuffer;
+ am_hal_ble_buffer(12) sRxBuffer;
+ uint32_t ui32Trial;
+
+ am_hal_ble_state_t *pBLE = pHandle;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ uint32_t ui32Module = pBLE->ui32Module;
+
+ //
+ // Write the "patch complete" command.
+ //
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_WRITE;
+ sTransfer.pui32Data = sTxBuffer.words;
+ sTransfer.ui16Length = 6;
+
+ sTxBuffer.bytes[0] = 0x01;
+ sTxBuffer.bytes[1] = 0xEE;
+ sTxBuffer.bytes[2] = 0xF1;
+ sTxBuffer.bytes[3] = 0x02;
+ sTxBuffer.bytes[4] = 0x00;
+ sTxBuffer.bytes[5] = 0x00;
+
+ for ( ui32Trial = 0; ui32Trial < AM_BLE_NUM_PATCH_CMP_TRIALS; ui32Trial++)
+ {
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus == AM_HAL_STATUS_SUCCESS )
+ {
+ break;
+ }
+ }
+
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 100,
+ AM_HAL_BLE_NO_HCI_RESPONSE );
+
+ //
+ // Read back the response.
+ //
+ sTransfer.ui8Command = AM_HAL_BLE_READ;
+ sTransfer.pui32Data = sRxBuffer.words;
+ sTransfer.ui16Length = 2;
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Check to see which format the response came back in. If it doesn't have
+ // a 2-byte length header, we need to manually override the length, and
+ // continue on to adjust the HCI format in the next packet. Otherwise, we
+ // can just return from here.
+ //
+ if ( sRxBuffer.bytes[1] == 0xEE )
+ {
+ sTransfer.ui16Length = 3;
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+ }
+ else
+ {
+ sTransfer.ui16Length = (sRxBuffer.bytes[0] + (sRxBuffer.bytes[1] << 8));
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Make sure to remember that we've sent the "patch complete" packet.
+ //
+ pBLE->bPatchComplete = true;
+
+ return AM_HAL_STATUS_SUCCESS;
+ }
+
+ //
+ // If we made it here, we need to tell the radio that we need two-byte
+ // headers prepended to each HCI packet it sends us.
+ //
+ memset(&sTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ sTransfer.ui8Command = AM_HAL_BLE_WRITE;
+ sTransfer.pui32Data = sTxBuffer.words;
+ sTransfer.ui16Length = 5;
+
+ sTxBuffer.bytes[0] = 0x01;
+ sTxBuffer.bytes[1] = 0x04;
+ sTxBuffer.bytes[2] = 0xFD;
+ sTxBuffer.bytes[3] = 0x01;
+ sTxBuffer.bytes[4] = 0x01;
+
+ for ( ui32Trial = 0; ui32Trial < AM_BLE_NUM_PATCH_CMP_TRIALS; ui32Trial++)
+ {
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus == AM_HAL_STATUS_SUCCESS )
+ {
+ break;
+ }
+ }
+
+ if (ui32ErrorStatus != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32ErrorStatus;
+ }
+
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 100,
+ AM_HAL_BLE_NO_HCI_RESPONSE );
+
+ sTransfer.ui8Command = AM_HAL_BLE_READ;
+ sTransfer.pui32Data = sRxBuffer.words;
+ sTransfer.ui16Length = 9;
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &sTransfer);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Now that we're done patching, we can let the radio sleep.
+ //
+ am_hal_ble_wakeup_set(pBLE, 0);
+
+ //
+ // Make sure to remember that we've sent the "patch complete" packet.
+ //
+ pBLE->bPatchComplete = true;
+
+ //
+ // Delay to give the BLE core time to take the patch (assuming a patch was sent).
+ //
+ delay_ms(500);
+
+ //
+ // Load the modex trim data to the BLE controller.
+ //
+ am_hal_ble_load_modex_trim_set(pBLE);
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_patch_complete()
+
+//*****************************************************************************
+//
+// Set one of the trim values for the BLE core.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_trim_set(void *pHandle, uint32_t ui32BleCoreAddress, uint32_t ui32TrimValue, uint32_t ui32TrimMask)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint32_t ui32TrimValueSwapped, ui32LockValue, ui32ReadVal, ui32WriteVal;
+
+ ui32TrimValueSwapped = (((ui32TrimValue & 0x000000FF) << 24) |
+ ((ui32TrimValue & 0x0000FF00) << 8) |
+ ((ui32TrimValue & 0x00FF0000) >> 8) |
+ ((ui32TrimValue & 0xFF000000) >> 24));
+
+ if (ui32TrimValue != 0xFFFFFFFF)
+ {
+ //
+ // Unlock the BLE registers and save the "lock register" value.
+ //
+ am_hal_ble_plf_reg_read(pBLE, 0x43000004, &ui32LockValue);
+ am_hal_ble_plf_reg_write(pBLE, 0x43000004, 0xFFFFFFFF);
+
+ //
+ // Check to see if we need a bitfield mask. If not, we can just write
+ // directly.
+ //
+ if (ui32TrimMask == 0xFFFFFFFF)
+ {
+ am_hal_ble_plf_reg_write(pBLE, ui32BleCoreAddress, ui32TrimValueSwapped);
+ }
+ else
+ {
+ //
+ // If we do need a mask, read the register, mask out the old bits,
+ // OR in the new, and write the new value back.
+ //
+ am_hal_ble_plf_reg_read(pBLE, ui32BleCoreAddress, &ui32ReadVal);
+ ui32WriteVal = ((ui32ReadVal & (~ui32TrimMask)) | ui32TrimValueSwapped);
+
+ am_hal_ble_plf_reg_write(pBLE, ui32BleCoreAddress, ui32WriteVal);
+ }
+
+ //
+ // Unlock the BLE register.
+ //
+ am_hal_ble_plf_reg_write(pBLE, 0x43000004, ui32LockValue);
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_trim_set()
+
+//*****************************************************************************
+//
+// Set the bandgap voltage, bandgap current, and retention LDO output values
+// based on the tested values stored in non-volatile memory.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_default_trim_set_ramcode(void *pHandle)
+{
+ uint32_t ui32TrimValue;
+ uint32_t ui32TrimValueSwapped;
+ uint32_t *pRamCode;
+
+ if (APOLLO3_B0)
+ {
+ pRamCode = (uint32_t *) (am_ble_performance_patch_b0.pui32Data);
+ }
+ else
+ {
+ pRamCode = (uint32_t *) (am_ble_performance_patch.pui32Data);
+ }
+
+ //
+ // Set the bandgap voltage and current.
+ //
+ //ui32TrimValue = (AM_REGVAL(0x50023800) | (0x0F000000)) & (0xEFFFFFFF);
+ ui32TrimValue = AM_REGVAL(0x50023800);
+ ui32TrimValueSwapped = (((ui32TrimValue & 0x000000FF) << 24) |
+ ((ui32TrimValue & 0x0000FF00) << 8) |
+ ((ui32TrimValue & 0x00FF0000) >> 8) |
+ ((ui32TrimValue & 0xFF000000) >> 24));
+
+ if (ui32TrimValueSwapped != 0xFFFFFFFF)
+ {
+ pRamCode[2] = ui32TrimValueSwapped;
+ }
+
+ //
+ // Set the retention LDO voltage.
+ //
+ ui32TrimValue = AM_REGVAL(0x50023804);
+ if (ui32TrimValue != 0xFFFFFFFF)
+ {
+ // 0xFFFFFFFF means the part has not been trimed.
+ ui32TrimValue += 0x40000000; // Increase the retention voltage to > 0.75v
+ }
+ ui32TrimValueSwapped = (((ui32TrimValue & 0x000000FF) << 24) |
+ ((ui32TrimValue & 0x0000FF00) << 8) |
+ ((ui32TrimValue & 0x00FF0000) >> 8) |
+ ((ui32TrimValue & 0xFF000000) >> 24));
+
+ if ( ui32TrimValueSwapped != 0xFFFFFFFF )
+ {
+ pRamCode[3] = ((pRamCode[3] & (~0x1F0)) | ui32TrimValueSwapped);
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_default_trim_set_ramcode()
+
+//*****************************************************************************
+//
+// Builds a vendor-specific BLE command.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_vs_command_build(uint32_t *pui32Command, uint32_t ui32OpCode,
+ uint32_t ui32TotalLength, uint8_t *pui8Parameters)
+{
+ uint8_t *pui8Dest = (uint8_t *) pui32Command;
+
+ //
+ // Build the header portion of the command from the given argments.
+ //
+ pui8Dest[0] = 0x01;
+ pui8Dest[1] = ui32OpCode & 0xFF;
+ pui8Dest[2] = (ui32OpCode >> 8) & 0xFF;
+ pui8Dest[3] = (ui32TotalLength - 4) & 0xFF;
+
+ //
+ // Finish filling the array with any parameters that may be required.
+ //
+ for (uint32_t i = 4; i < ui32TotalLength; i++)
+ {
+ pui8Dest[i] = pui8Parameters[i - 4];
+ }
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_vs_command_build()
+
+//*****************************************************************************
+//
+// Returns the number of bytes written.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_blocking_hci_write(void *pHandle, uint8_t ui8Type,
+ uint32_t *pui32Data, uint32_t ui32NumBytes)
+{
+ uint32_t ui32ErrorStatus;
+
+ am_hal_ble_transfer_t HciWrite =
+ {
+ .pui32Data = pui32Data,
+ .pui8Offset = {ui8Type, 0x0, 0x0},
+ .ui8OffsetLen = 0,
+ .ui16Length = ui32NumBytes,
+ .ui8Command = AM_HAL_BLE_WRITE,
+ .ui8RepeatCount = 0,
+ .bContinue = false,
+ .pfnTransferCompleteCB = 0x0,
+ .pvContext = 0x0,
+ };
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return 0;
+ }
+
+ //
+ // Fix up the offset length based on the packet type, and send the bytes.
+ //
+ if (ui8Type != AM_HAL_BLE_RAW)
+ {
+ HciWrite.ui8OffsetLen = 1;
+ }
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &HciWrite);
+ if (ui32ErrorStatus != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32ErrorStatus;
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_blocking_hci_write()
+
+//*****************************************************************************
+//
+// Returns the number of bytes received.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_blocking_hci_read(void *pHandle, uint32_t *pui32Data, uint32_t *pui32BytesReceived)
+{
+ uint32_t ui32Module, ui32NumBytes, ui32ErrorStatus;
+
+ am_hal_ble_buffer(2) sLengthBytes;
+
+ am_hal_ble_transfer_t HciRead =
+ {
+ .pui32Data = sLengthBytes.words,
+ .pui8Offset = {0x0, 0x0, 0x0},
+ .ui8OffsetLen = 0,
+ .ui16Length = 2,
+ .ui8Command = AM_HAL_BLE_READ,
+ .ui8RepeatCount = 0,
+ .bContinue = false,
+ .pfnTransferCompleteCB = 0x0,
+ .pvContext = 0x0,
+ };
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return 0;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ //
+ // Make sure the IRQ signal is set.
+ //
+ if ( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ )
+ {
+ //
+ // Read the length bytes.
+ //
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &HciRead);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32ErrorStatus;
+ }
+
+ //
+ // Read the rest of the packet.
+ //
+ HciRead.pui32Data = pui32Data;
+ HciRead.ui16Length = (sLengthBytes.bytes[0] +
+ (sLengthBytes.bytes[1] << 8));
+
+ //
+ // Check if the length is not out of the boundary
+ //
+ if ( (HciRead.ui16Length == 0) || (HciRead.ui16Length > 256) )
+ {
+ return AM_HAL_STATUS_OUT_OF_RANGE;
+ }
+
+ ui32ErrorStatus = am_hal_ble_blocking_transfer(pHandle, &HciRead);
+ if ( ui32ErrorStatus != AM_HAL_STATUS_SUCCESS)
+ {
+ return ui32ErrorStatus;
+ }
+
+ ui32NumBytes = HciRead.ui16Length;
+ }
+ else
+ {
+ ui32NumBytes = 0;
+ }
+
+ if (pui32BytesReceived)
+ {
+ *pui32BytesReceived = ui32NumBytes;
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_blocking_hci_read()
+
+//*****************************************************************************
+//
+// Returns the number of bytes written.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_nonblocking_hci_write(void *pHandle, uint8_t ui8Type,
+ uint32_t *pui32Data, uint32_t ui32NumBytes,
+ am_hal_ble_transfer_complete_cb_t pfnCallback,
+ void *pvContext)
+{
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return 0;
+ }
+
+ am_hal_ble_transfer_t HciWrite =
+ {
+ .pui32Data = pui32Data,
+ .pui8Offset = {ui8Type, 0x0, 0x0},
+ .ui8OffsetLen = 0,
+ .ui16Length = ui32NumBytes,
+ .ui8Command = AM_HAL_BLE_WRITE,
+ .ui8RepeatCount = 0,
+ .bContinue = false,
+ .pfnTransferCompleteCB = pfnCallback,
+ .pvContext = pvContext,
+ };
+
+ //
+ // Fix up the offset length based on the packet type, and send the bytes.
+ //
+ if (ui8Type != AM_HAL_BLE_RAW)
+ {
+ HciWrite.ui8OffsetLen = 1;
+ }
+
+ uint32_t ui32Status = am_hal_ble_nonblocking_transfer(pHandle, &HciWrite);
+
+ return ui32Status;
+} // am_hal_ble_nonblocking_hci_write()
+
+//*****************************************************************************
+//
+// Returns the number of bytes received.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_nonblocking_hci_read(void *pHandle, uint32_t *pui32Data,
+ am_hal_ble_transfer_complete_cb_t pfnCallback,
+ void *pvContext)
+{
+ uint32_t ui32Status;
+ am_hal_ble_state_t *pBle = pHandle;
+
+ am_hal_ble_buffer(2) sLengthBytes;
+
+ am_hal_ble_transfer_t HciRead =
+ {
+ .pui32Data = sLengthBytes.words,
+ .pui8Offset = {0x0, 0x0, 0x0},
+ .ui8OffsetLen = 0,
+ .ui16Length = 2,
+ .ui8Command = AM_HAL_BLE_READ,
+ .ui8RepeatCount = 0,
+ .bContinue = false,
+ .pfnTransferCompleteCB = pfnCallback,
+ .pvContext = pvContext,
+ };
+
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_BLE_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Make sure the IRQ signal is set.
+ //
+ if ( am_hal_ble_check_irq(pBle) )
+ {
+ //
+ // Read the length bytes.
+ //
+ ui32Status = am_hal_ble_blocking_transfer(pHandle, &HciRead);
+
+ if ( ui32Status != AM_HAL_STATUS_SUCCESS )
+ {
+ return ui32Status;
+ }
+
+ //
+ // Read the rest of the packet.
+ //
+ HciRead.pfnTransferCompleteCB = pfnCallback;
+ HciRead.pui32Data = pui32Data;
+ HciRead.ui16Length = (sLengthBytes.bytes[0] +
+ (sLengthBytes.bytes[1] << 8));
+
+ return am_hal_ble_nonblocking_transfer(pHandle, &HciRead);
+ }
+
+ //
+ // If we get here, return fail.
+ //
+ return AM_HAL_STATUS_FAIL;
+} // am_hal_ble_nonblocking_hci_read()
+
+//*****************************************************************************
+//
+// Return true if BSTATUS is high.
+//
+//*****************************************************************************
+static bool
+am_hal_ble_check_status(am_hal_ble_state_t *pBle)
+{
+ //
+ // We need to make a special exception for "continue" packets, since the
+ // BLE radio may deassert the STATUS signal mid-packet.
+ //
+ if (pBle->bContinuePacket)
+ {
+ pBle->bContinuePacket = false;
+ return true;
+ }
+
+ if ( BLEIFn(0)->BSTATUS_b.SPISTATUS == 0)
+ {
+ return false;
+ }
+
+ return true;
+} // am_hal_ble_check_status()
+
+//*****************************************************************************
+//
+// Return true if IRQ is high.
+//
+//*****************************************************************************
+static bool
+am_hal_ble_check_irq(am_hal_ble_state_t *pBle)
+{
+ if ( BLEIFn(pBle->ui32Module)->BSTATUS_b.BLEIRQ )
+ {
+ return true;
+ }
+
+ return false;
+} // am_hal_ble_check_irq()
+
+//*****************************************************************************
+//
+// Blocking write to the BLE module.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_blocking_transfer(void *pHandle, am_hal_ble_transfer_t *psTransfer)
+{
+ am_hal_ble_state_t *pBle = pHandle;
+ uint32_t ui32IntEnable;
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ //
+ // If the transfer doesn't have any bytes in it, just return success.
+ //
+ if (psTransfer->ui16Length == 0)
+ {
+ return AM_HAL_STATUS_SUCCESS;
+ }
+
+ //
+ // Make sure we don't get any interrupts that might interfere with this
+ // operation. We will save the interrupt enable register state so we can
+ // restore it later. Also, make sure "command complete" is clear, so we can
+ // detect the end of the transaction.
+ //
+ ui32IntEnable = BLEIFn(ui32Module)->INTEN;
+ BLEIFn(ui32Module)->INTEN_b.BLECIRQ = 0;
+ BLEIFn(ui32Module)->INTEN_b.BLECSSTAT = 0;
+ BLEIFn(ui32Module)->INTEN_b.CMDCMP = 0;
+ BLEIFn(ui32Module)->INTEN_b.THR = 0;
+ BLEIFn(ui32Module)->INTCLR_b.CMDCMP = 1;
+ BLEIFn(ui32Module)->INTCLR_b.BLECSSTAT = 1;
+
+ //
+ // If we're writing, we need to lock down the bus now. Set the wakeup
+ // signal, and start monitoring STATUS. If STATUS isn't high within our
+ // configured timeout, we have to assume that the BLE core is unresponsive
+ // and report an error back to the caller.
+ //
+ if (psTransfer->ui8Command == AM_HAL_BLE_WRITE)
+ {
+ uint32_t ui32SpiStatus = false;
+
+ if ( pBle->bLastPacketWasTX == true)
+ {
+ //
+ // wait some time to give the controller more time to consume
+ // the last TX packet
+ //
+ if (!pBle->bPatchComplete)
+ {
+ delay_ms(3);
+ }
+ pBle->bLastPacketWasTX = false;
+ }
+
+ if (pBle->bPatchComplete)
+ {
+ uint32_t statusTimeout = 0;
+ while (am_hal_ble_check_status(pBle) == true)
+ {
+ statusTimeout++;
+ delay_us(10);
+ if (statusTimeout > 300)
+ {
+ break;
+ }
+ }
+ }
+
+ //
+ // Make sure the IO clock for the STATUS signal is on.
+ //
+ BLEIFn(0)->BLEDBG_b.IOCLKON = 1;
+ delay_us(5);
+
+ //
+ // Set WAKE, and wait for a positive edge on the STATUS signal.
+ //
+ am_hal_ble_wakeup_set(pBle, 1);
+
+ //
+ // If we don't see an edge on STATUS in X ms, assume it's not coming
+ // and return with an AM_HAL_BLE_STATUS_SPI_NOT_READY error.
+ //
+ uint32_t ui32Timeout = 0;
+ uint32_t ui32TimeoutLimit = AM_BLE_STATUS_TIMEOUT;
+
+ while (1)
+ {
+ if (am_hal_ble_check_status(pBle) == true)
+ {
+ if (am_hal_ble_bus_lock(pBle))
+ {
+ ui32SpiStatus = AM_HAL_STATUS_SUCCESS;
+ break;
+ }
+ }
+ else if ((ui32Timeout >= ui32TimeoutLimit) ||
+ (BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ))
+ {
+ ui32SpiStatus = AM_HAL_BLE_STATUS_SPI_NOT_READY;
+ am_hal_ble_wakeup_set(pBle, 0);
+ break;
+ }
+
+ ui32Timeout++;
+ delay_us(10);
+ }
+
+ //
+ // Disable IOCLK
+ //
+ BLEIFn(0)->BLEDBG_b.IOCLKON = 0;
+
+ if (ui32SpiStatus != AM_HAL_STATUS_SUCCESS)
+ {
+ //
+ // Restore the interrupt state.
+ //
+ BLEIFn(ui32Module)->INTEN = ui32IntEnable;
+ am_hal_ble_wakeup_set(pBle, 0);
+ return ui32SpiStatus;
+ }
+ }
+ else
+ {
+ if (BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0)
+ {
+ //
+ // Restore the interrupt state.
+ //
+ BLEIFn(ui32Module)->INTEN = ui32IntEnable;
+ return AM_HAL_BLE_STATUS_IRQ_LOW;
+ }
+
+ if (!am_hal_ble_bus_lock(pBle))
+ {
+ //
+ // Restore the interrupt state.
+ //
+ BLEIFn(ui32Module)->INTEN = ui32IntEnable;
+ return AM_HAL_BLE_STATUS_BUS_BUSY;
+ }
+ }
+
+ if (psTransfer->bContinue)
+ {
+ pBle->bContinuePacket = true;
+ }
+
+ //
+ // Set the current transfer, and clear the command complete interrupt so we
+ // can tell when the next command completes.
+ //
+ memcpy(&pBle->sCurrentTransfer, psTransfer, sizeof(am_hal_ble_transfer_t));
+
+ //
+ // Critical section to protect the gap between command and data.
+ //
+ AM_CRITICAL_BEGIN;
+
+ //
+ // Write the command word.
+ //
+ am_hal_ble_cmd_write(pHandle, psTransfer);
+
+ //
+ // Now we need to manage the fifos based on the type of transfer. In either
+ // case, we will keep draining or refilling the FIFO until the full
+ // transaction is complete.
+ //
+ if (psTransfer->ui8Command == AM_HAL_BLE_WRITE)
+ {
+ bool bCmdCmp = false;
+ uint32_t numWait = 0;
+ // Adjust the byte count to be sent/received for repeat count
+ uint32_t ui32Bytes = pBle->sCurrentTransfer.ui16Length;
+
+ uint32_t ui32FifoRem;
+ uint32_t *pui32Buffer = pBle->sCurrentTransfer.pui32Data;
+
+ //
+ // Write the command word.
+ //
+ am_hal_ble_cmd_write(pHandle, psTransfer);
+
+ //
+ // Keep looping until we're out of bytes to send or command complete (error).
+ //
+ while (ui32Bytes)
+ {
+ //
+ // Limit the wait to reasonable limit - instead of blocking forever
+ //
+ numWait = 0;
+ while ((ui32FifoRem = BLEIFn(ui32Module)->FIFOPTR_b.FIFO0REM) < 4)
+ {
+ bCmdCmp = BLEIFn(ui32Module)->INTSTAT_b.CMDCMP;
+ if (bCmdCmp || (numWait++ >= AM_HAL_IOM_MAX_BLOCKING_WAIT))
+ {
+ //
+ // FIFO not expected to change any more - get out
+ //
+ break;
+ }
+ else
+ {
+ am_hal_flash_delay( FLASH_CYCLES_US(1) );
+ }
+ }
+ if (bCmdCmp || (ui32FifoRem < 4))
+ {
+ //
+ // Something went wrong - bail out
+ //
+ break;
+ }
+
+ while ((ui32FifoRem >= 4) && ui32Bytes)
+ {
+ BLEIFn(ui32Module)->FIFOPUSH = *pui32Buffer++;
+ ui32FifoRem -= 4;
+ if (ui32Bytes >= 4)
+ {
+ ui32Bytes -= 4;
+ }
+ else
+ {
+ ui32Bytes = 0;
+ }
+ }
+ }
+ WHILE_TIMEOUT_MS_BREAK ( BLEIFn(ui32Module)->INTSTAT_b.CMDCMP == 0, 2,
+ AM_HAL_BLE_HCI_PACKET_INCOMPLETE );
+ am_hal_ble_wakeup_set(pBle, 0);
+ }
+ else
+ {
+ while (pBle->ui32TransferIndex < pBle->sCurrentTransfer.ui16Length)
+ {
+ am_hal_ble_fifo_drain(pHandle);
+ }
+ }
+
+ //
+ // End the critical section.
+ //
+ AM_CRITICAL_END;
+
+ //
+ // Wait for the transaction to complete, and clear out any interrupts that
+ // may have come up.
+ //
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->INTSTAT_b.CMDCMP == 0, 10,
+ AM_HAL_BLE_HCI_PACKET_INCOMPLETE );
+ BLEIFn(ui32Module)->INTCLR_b.CMDCMP = 1;
+ BLEIFn(ui32Module)->INTCLR_b.THR = 1;
+
+ //
+ // Clear out the current transfer. We're done.
+ //
+ memset(&pBle->sCurrentTransfer, 0, sizeof(am_hal_ble_transfer_t));
+ pBle->ui32TransferIndex = 0;
+
+ //
+ // Let the radio go back to sleep.
+ //
+ if (psTransfer->ui8Command == AM_HAL_BLE_WRITE)
+ {
+ am_hal_ble_wakeup_set(pBle, 0);
+ pBle->bLastPacketWasTX = true;
+ }
+
+ if ((psTransfer->ui8Command == AM_HAL_BLE_READ) &&
+ (pBle->bPatchComplete == true))
+ {
+ pBle->bLastPacketWasTX = false;
+ }
+
+ //
+ // Restore the interrupt state.
+ //
+ BLEIFn(ui32Module)->INTEN = ui32IntEnable;
+
+ //
+ // Release the bus.
+ //
+ am_hal_ble_bus_release(pBle);
+
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_blocking_transfer()
+
+//*****************************************************************************
+//
+// Nonblocking write to the BLE module.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_nonblocking_transfer(void *pHandle, am_hal_ble_transfer_t *psTransfer)
+{
+ am_hal_ble_state_t *pBle = pHandle;
+ uint32_t ui32Status;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Check to see if this is a write or a read.
+ //
+ if (psTransfer->ui8Command == AM_HAL_BLE_WRITE)
+ {
+ ui32Status = nonblocking_write(pBle, psTransfer);
+ }
+ else // AM_HAL_BLE_READ case.
+ {
+ ui32Status = nonblocking_read(pBle, psTransfer);
+ }
+
+ return ui32Status;
+} // am_hal_ble_nonblocking_transfer()
+
+//*****************************************************************************
+//
+// Function for performing non-blocking writes to the HCI interface.
+//
+// This function will start a BLE write on the physical bus. The caller should
+// have already set WAKEUP and received a STATUS interrupt before they call
+// this function. When the write operation is complete, the MCU will receive a
+// command complete interrupt.
+//
+// Before calling this function, the caller is responsible for ensuring that
+// STATUS is high, that BLEIRQ is low, and the the bus isn't already in use. If
+// any of these problems exists when this function is called, it will simply
+// return with an error status.
+//
+//*****************************************************************************
+static uint32_t
+nonblocking_write(am_hal_ble_state_t *pBle, am_hal_ble_transfer_t *psTransfer)
+{
+ uint32_t ui32Status = AM_HAL_STATUS_SUCCESS;
+ uint32_t ui32Module = pBle->ui32Module;
+
+ //
+ // This function goes in a critical section to make sure that the operation
+ // isn't interrupted or started again.
+ //
+ AM_CRITICAL_BEGIN;
+
+ do
+ {
+ //
+ // Check for any of the various reasons that we might not be able to
+ // perform a write right now. If the bus is busy, if the BLE core requires
+ // a READ operation, or if the BLE core simply isn't ready yet, stop here
+ // and throw an error.
+ //
+ if ( pBle->bBusy )
+ {
+ ui32Status = AM_HAL_BLE_STATUS_BUS_BUSY;
+ break;
+ }
+
+ if ( am_hal_ble_check_irq(pBle) )
+ {
+ ui32Status = AM_HAL_BLE_REQUESTING_READ;
+ break;
+ }
+
+ if ( !am_hal_ble_check_status(pBle) )
+ {
+ ui32Status = AM_HAL_BLE_STATUS_SPI_NOT_READY;
+ break;
+ }
+
+ if (psTransfer->ui16Length == 0)
+ {
+ ui32Status = AM_HAL_STATUS_SUCCESS;
+ break;
+ }
+
+ //
+ // With the obvious error cases out of the way, we can claim the bus and
+ // start the transaction.
+ //
+ if ( pBle->bLastPacketWasTX == true )
+ {
+ delay_us(AM_BLE_TX_PACKET_SPACING_US);
+ }
+
+ pBle->bBusy = true;
+ pBle->bLastPacketWasTX = true;
+
+ //
+ // Save the current transfer.
+ //
+ memcpy(&pBle->sCurrentTransfer, psTransfer, sizeof(am_hal_ble_transfer_t));
+
+ //
+ // Prepare the DMA.
+ //
+ BLEIFn(ui32Module)->DMATARGADDR = (uint32_t)pBle->sCurrentTransfer.pui32Data;
+ BLEIFn(ui32Module)->DMATOTCOUNT = pBle->sCurrentTransfer.ui16Length;
+ BLEIFn(ui32Module)->DMATRIGEN = BLEIF_DMATRIGEN_DTHREN_Msk;
+ BLEIFn(ui32Module)->DMACFG =
+ (_VAL2FLD(BLEIF_DMACFG_DMADIR, BLEIF_DMACFG_DMADIR_M2P) |
+ _VAL2FLD(BLEIF_DMACFG_DMAPRI, BLEIF_DMACFG_DMAPRI_HIGH));
+
+ //
+ // Write the command word, and enable the DMA.
+ //
+ ui32Status = am_hal_ble_cmd_write(pBle, &pBle->sCurrentTransfer);
+
+ BLEIFn(ui32Module)->DMACFG |= _VAL2FLD(BLEIF_DMACFG_DMAEN, BLEIF_DMACFG_DMAEN_EN);
+
+ //
+ // Make sure WAKE goes low as quickly as possible after starting the write.
+ //
+ if (ui32Status == AM_HAL_STATUS_SUCCESS)
+ {
+ am_hal_ble_wakeup_set(pBle, 0);
+ }
+ }
+ while (0);
+
+ //
+ // No matter what happened above, the function should end here. We'll end
+ // the critical section and alert the caller of our status.
+ //
+ AM_CRITICAL_END;
+ return ui32Status;
+} // nonblocking_write()
+
+//*****************************************************************************
+//
+// This function performs a nonblocking read from the BLE core.
+//
+//*****************************************************************************
+static uint32_t
+nonblocking_read(am_hal_ble_state_t *pBle, am_hal_ble_transfer_t *psTransfer)
+{
+ uint32_t ui32Status = AM_HAL_STATUS_SUCCESS;
+ uint32_t ui32Module = pBle->ui32Module;
+
+ //
+ // This function goes in a critical section to make sure that the operation
+ // isn't interrupted or started again.
+ //
+ AM_CRITICAL_BEGIN;
+
+ do
+ {
+ if ( pBle->bBusy )
+ {
+ ui32Status = AM_HAL_BLE_STATUS_BUS_BUSY;
+ break;
+ }
+
+ if ( !am_hal_ble_check_irq(pBle) )
+ {
+ ui32Status = AM_HAL_BLE_STATUS_IRQ_LOW;
+ break;
+ }
+
+ if (psTransfer->ui16Length == 0)
+ {
+ ui32Status = AM_HAL_STATUS_SUCCESS;
+ break;
+ }
+
+ //
+ // With the obvious error cases out of the way, we can claim the bus and
+ // start the transaction.
+ //
+ if ( pBle->bLastPacketWasTX == true )
+ {
+ delay_us(AM_BLE_TX_PACKET_SPACING_US);
+ }
+
+ pBle->bBusy = true;
+ pBle->bLastPacketWasTX = false;
+
+ //
+ // Set the current transfer.
+ //
+ memcpy(&pBle->sCurrentTransfer, psTransfer, sizeof(am_hal_ble_transfer_t));
+
+ BLEIFn(ui32Module)->DMATARGADDR = (uint32_t) pBle->sCurrentTransfer.pui32Data;
+ BLEIFn(ui32Module)->DMATOTCOUNT = pBle->sCurrentTransfer.ui16Length;
+ BLEIFn(ui32Module)->DMATRIGEN = (BLEIF_DMATRIGEN_DTHREN_Msk | BLEIF_INTCLR_CMDCMP_Msk);
+ BLEIFn(ui32Module)->DMACFG =
+ (_VAL2FLD(BLEIF_DMACFG_DMADIR, BLEIF_DMACFG_DMADIR_P2M) |
+ _VAL2FLD(BLEIF_DMACFG_DMAPRI, BLEIF_DMACFG_DMAPRI_HIGH));
+
+ //
+ // Write the command word, and enable the DMA.
+ //
+ ui32Status = am_hal_ble_cmd_write(pBle, &pBle->sCurrentTransfer);
+ BLEIFn(ui32Module)->DMACFG |= _VAL2FLD(BLEIF_DMACFG_DMAEN, BLEIF_DMACFG_DMAEN_EN);
+ }
+ while (0);
+
+ //
+ // No matter what happened above, the function should end here. We'll end
+ // the critical section and alert the caller of our status.
+ //
+ AM_CRITICAL_END;
+ return ui32Status;
+} // nonblocking_read()
+
+//*****************************************************************************
+//
+// Mark the BLE interface busy so it doesn't get used by more than one
+// interface.
+//
+//*****************************************************************************
+static bool
+am_hal_ble_bus_lock(am_hal_ble_state_t *pBle)
+{
+ bool bLockObtained;
+
+ //
+ // In one atomic sweep, check to see if the bus is busy, and reserve it if
+ // it isn't.
+ //
+ AM_CRITICAL_BEGIN;
+
+ if (pBle->bBusy == false)
+ {
+ am_hal_debug_gpio_set(BLE_DEBUG_TRACE_11);
+ pBle->bBusy = true;
+ bLockObtained = true;
+ pBle->bCmdComplete = 0;
+ pBle->bDmaComplete = 0;
+ pBle->bFlowControlComplete = 0;
+ }
+ else
+ {
+ bLockObtained = false;
+ }
+
+ AM_CRITICAL_END;
+
+ //
+ // Tell the caller if we successfully locked the bus.
+ //
+ return bLockObtained;
+} // am_hal_ble_bus_lock()
+
+//*****************************************************************************
+//
+// Release the bus so someone else can use it.
+//
+//*****************************************************************************
+static void
+am_hal_ble_bus_release(am_hal_ble_state_t *pBle)
+{
+ pBle->bBusy = false;
+ am_hal_debug_gpio_clear(BLE_DEBUG_TRACE_11);
+}
+
+//*****************************************************************************
+//
+// Pull data out of the fifo for reads.
+//
+//*****************************************************************************
+static uint32_t
+am_hal_ble_fifo_drain(void *pHandle)
+{
+ uint32_t ui32Module;
+ uint32_t ui32ReadSize, ui32RxDataLen, ui32BytesLeft;
+ uint32_t *pDest;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return 0;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ //
+ // Rename some pointers for convenience.
+ //
+ am_hal_ble_state_t *pBle = pHandle;
+ am_hal_ble_transfer_t *pTransfer = &pBle->sCurrentTransfer;
+
+ //
+ // Check to see how much data there is in the FIFO, and also how many
+ // bytes are remaining in the transfer.
+ //
+ ui32RxDataLen = BLEIFn(ui32Module)->FIFOPTR_b.FIFO1SIZ;
+ ui32BytesLeft = (pTransfer->ui16Length - pBle->ui32TransferIndex);
+
+ //
+ // Calculate how much we can drain the fifo.
+ //
+ if (ui32RxDataLen < 4)
+ {
+ return 0;
+ }
+ else if (ui32RxDataLen >= pTransfer->ui16Length)
+ {
+ ui32ReadSize = ui32BytesLeft;
+ }
+ else
+ {
+ ui32ReadSize = ui32RxDataLen & (~0x3);
+ }
+
+ //
+ // Calculate the place where we last left off, feed the FIFO starting from
+ // that location, and update the index to match.
+ //
+ pDest = &pTransfer->pui32Data[pBle->ui32TransferIndex / 4];
+
+ am_hal_ble_fifo_read(pHandle, pDest, ui32ReadSize);
+
+ pBle->ui32TransferIndex += ui32ReadSize;
+
+ //
+ // Return the number of bytes we wrote.
+ //
+ return ui32ReadSize;
+} // am_hal_ble_fifo_drain()
+
+//*****************************************************************************
+//
+// Write the command word for a BLE transfer.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_cmd_write(void *pHandle, am_hal_ble_transfer_t *psTransfer)
+{
+ uint32_t ui32CmdWord, ui32OffsetHigh;
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ //
+ // Figure out the command word and the offset register. Then write them.
+ //
+ switch (psTransfer->ui8OffsetLen)
+ {
+ case 0:
+ ui32CmdWord = 0;
+ ui32OffsetHigh = 0;
+ break;
+
+ case 1:
+ ui32CmdWord = _VAL2FLD(BLEIF_CMD_OFFSETLO, psTransfer->pui8Offset[0]);
+ ui32OffsetHigh = 0;
+ break;
+
+ case 2:
+ ui32CmdWord = _VAL2FLD(BLEIF_CMD_OFFSETLO, psTransfer->pui8Offset[1]);
+ ui32OffsetHigh = psTransfer->pui8Offset[0];
+ break;
+
+ case 3:
+ ui32CmdWord = _VAL2FLD(BLEIF_CMD_OFFSETLO, psTransfer->pui8Offset[2]);
+ ui32OffsetHigh = ((psTransfer->pui8Offset[1]) |
+ (psTransfer->pui8Offset[0] << 8));
+ break;
+
+ default:
+ // Offset length was incorrect.
+ return AM_HAL_STATUS_INVALID_ARG;
+ }
+
+ ui32CmdWord |= (_VAL2FLD(BLEIF_CMD_OFFSETCNT, psTransfer->ui8OffsetLen) |
+ _VAL2FLD(BLEIF_CMD_TSIZE, psTransfer->ui16Length) |
+ _VAL2FLD(BLEIF_CMD_CONT, psTransfer->bContinue) |
+ psTransfer->ui8Command);
+
+ BLEIFn(ui32Module)->OFFSETHI = ui32OffsetHigh;
+ BLEIFn(ui32Module)->CMD = ui32CmdWord;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_cmd_write()
+
+//*****************************************************************************
+//
+// Read ui32NumBytes from the RX FIFO.
+//
+//*****************************************************************************
+static void
+am_hal_ble_fifo_read(void *pHandle, uint32_t *pui32Data, uint32_t ui32NumBytes)
+{
+ uint32_t ui32Index;
+ uint32_t ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ for (ui32Index = 0; (ui32Index * 4) < ui32NumBytes; ui32Index++)
+ {
+ pui32Data[ui32Index] = BLEIFn(ui32Module)->FIFOPOP;
+
+#ifndef AM_HAL_BLE_NO_FIFO_PROTECTION
+ BLEIFn(ui32Module)->FIFOPOP = 0;
+#endif
+
+ }
+} // am_hal_ble_fifo_read()
+
+//*****************************************************************************
+//
+// Call the appropriate callbacks when DMA transfers complete.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_int_service(void *pHandle, uint32_t ui32Status)
+{
+ am_hal_ble_state_t *pBle = pHandle;
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // The handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ //
+ // Track each of the interrupts signaling the end of an HCI transfer.
+ //
+ if ( ui32Status & BLEIF_INTSTAT_CMDCMP_Msk )
+ {
+ pBle->bCmdComplete = true;
+ }
+
+ if ( ui32Status & BLEIF_INTSTAT_DCMP_Msk )
+ {
+ pBle->bDmaComplete = true;
+ }
+
+ //
+ // For B0 parts, we can detect when key flow control signals from the BLE
+ // core are de-asserted.
+ //
+ if (APOLLO3_GE_B0)
+ {
+ //
+ // Check for falling IRQ
+ //
+ if ( (ui32Status & BLEIF_INTSTAT_BLECIRQN_Msk) &&
+ (pBle->sCurrentTransfer.ui8Command == AM_HAL_BLE_READ) )
+ {
+ pBle->bFlowControlComplete = true;
+ }
+
+ //
+ // Check for falling status.
+ //
+ if ( (ui32Status & BLEIF_INTSTAT_BLECSSTATN_Msk ) &&
+ (pBle->sCurrentTransfer.ui8Command == AM_HAL_BLE_WRITE) )
+ {
+ pBle->bFlowControlComplete = true;
+ }
+ }
+
+ //
+ // If we get a command complete, we need to release the wake signal,
+ // disable the DMA, release the bus, and call any callback that might
+ // exist.
+ //
+ // For revision A parts, "command complete" means that the DMA operation
+ // and the BLE SPI interface have both finished their operations. For rev B
+ // parts, we will also wait for the flow control signal (either STATUS or
+ // IRQ) to be removed.
+ //
+ if ( pBle->bCmdComplete && pBle->bDmaComplete &&
+ ((pBle->bFlowControlComplete) || (!APOLLO3_GE_B0) || SKIP_FALLING_EDGES) )
+ {
+ //
+ // Clean up our state flags.
+ //
+ pBle->bCmdComplete = false;
+ pBle->bDmaComplete = false;
+ pBle->bFlowControlComplete = false;
+
+ //
+ // If our FIFOs aren't empty right now, either the DMA didn't finish,
+ // or this interrupt handler is somehow being called incorrectly.
+ //
+ if ( BLEIFn(ui32Module)->FIFOPTR != 0x20002000 )
+ {
+ return AM_HAL_BLE_FIFO_ERROR;
+ }
+
+ //
+ // Drop the wake request if we had one, and make sure we remember if
+ // the last packet was a transmit packet.
+ //
+ if ((pBle->sCurrentTransfer.ui8Command == AM_HAL_BLE_WRITE) &&
+ (pBle->bPatchComplete == true))
+ {
+ pBle->bLastPacketWasTX = true;
+ am_hal_ble_wakeup_set(pBle, 0);
+ }
+
+ //
+ // If this was a read packet, remember that it wasn't a TX packet.
+ //
+ if (pBle->sCurrentTransfer.ui8Command == AM_HAL_BLE_READ)
+ {
+ pBle->bLastPacketWasTX = false;
+ }
+
+ //
+ // Disable the DMA
+ //
+ BLEIFn(ui32Module)->DMACFG = 0;
+
+ am_hal_ble_bus_release(pBle);
+
+ if ( pBle->sCurrentTransfer.pfnTransferCompleteCB )
+ {
+ am_hal_ble_transfer_complete_cb_t pfnCallback;
+ uint32_t ui32Length;
+ uint8_t *pui8Data;
+ void *pvContext;
+
+ pfnCallback = pBle->sCurrentTransfer.pfnTransferCompleteCB;
+ pui8Data = (uint8_t * ) pBle->sCurrentTransfer.pui32Data;
+ ui32Length = pBle->sCurrentTransfer.ui16Length;
+ pvContext = pBle->sCurrentTransfer.pvContext;
+
+ pfnCallback(pui8Data, ui32Length, pvContext);
+ }
+ }
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_int_service()
+
+//*****************************************************************************
+//
+// Interrupt Enable
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_int_enable(void *pHandle, uint32_t ui32InterruptMask)
+{
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ AM_CRITICAL_BEGIN
+ BLEIFn(ui32Module)->INTEN |= ui32InterruptMask;
+ AM_CRITICAL_END
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_int_enable()
+
+//*****************************************************************************
+//
+// Interrupt Enable
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_int_disable(void *pHandle, uint32_t ui32InterruptMask)
+{
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if (!AM_HAL_BLE_CHK_HANDLE(pHandle))
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ AM_CRITICAL_BEGIN
+ BLEIFn(ui32Module)->INTEN &= ~ui32InterruptMask;
+ AM_CRITICAL_END
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_int_disable()
+
+//*****************************************************************************
+//
+// Check the status of the interrupts.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_int_status(void *pHandle, bool bEnabledOnly)
+{
+ uint32_t ui32Module = ((am_hal_ble_state_t *) pHandle)->ui32Module;
+
+ if (bEnabledOnly)
+ {
+ uint32_t ui32IntEn = BLEIFn(ui32Module)->INTEN;
+ return ( BLEIFn(ui32Module)->INTSTAT & ui32IntEn );
+ }
+ else
+ {
+ return BLEIFn(ui32Module)->INTSTAT;
+ }
+} // am_hal_ble_int_status()
+
+//*****************************************************************************
+//
+// Clear the interrupt status.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_int_clear(void *pHandle, uint32_t ui32InterruptMask)
+{
+ uint32_t ui32Module;
+
+ //
+ // Check the handle.
+ //
+ if ( !AM_HAL_BLE_CHK_HANDLE(pHandle) )
+ {
+ return AM_HAL_STATUS_INVALID_HANDLE;
+ }
+
+ //
+ // Handle is good, so get the module number.
+ //
+ ui32Module = ((am_hal_ble_state_t *)pHandle)->ui32Module;
+
+ BLEIFn(ui32Module)->INTCLR = ui32InterruptMask;
+
+ //
+ // Return the status.
+ //
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_int_clear()
+
+//*****************************************************************************
+//
+// check 32768Hz clock is ready.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_check_32k_clock(void *pHandle)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint32_t rc32k_clock = 0xFFFFFFFF;
+
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_32K_CLOCK_ADDR_B0, &rc32k_clock);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_32K_CLOCK_ADDR_A1, &rc32k_clock);
+ }
+
+ // Normal 32KHz clock is about 0x8000
+ if ( (rc32k_clock > 0x8200) || (rc32k_clock < 0x7B00) )
+ {
+ return AM_HAL_STATUS_FAIL;
+ }
+ else
+ {
+ return AM_HAL_STATUS_SUCCESS;
+ }
+} // am_hal_ble_check_32k_clock()
+
+//*****************************************************************************
+//
+// Read a register value from the BLE core.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_plf_reg_read(void *pHandle, uint32_t ui32Address, uint32_t *pui32Value)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint8_t pui8Parameter[4];
+ uint32_t ui32IntEnable;
+
+ uint32_t ui32Module = pBLE->ui32Module;
+
+ //
+ // Make a buffer big enough to hold the register write command, and a
+ // second one big enough to hold the response.
+ //
+ am_hal_ble_buffer(AM_HAL_BLE_PLF_REGISTER_READ_LENGTH) sWriteCommand;
+ am_hal_ble_buffer(32) sResponse;
+
+ //
+ // Prepare our register write value.
+ //
+ pui8Parameter[0] = ui32Address;
+ pui8Parameter[1] = (ui32Address >> 8);
+ pui8Parameter[2] = (ui32Address >> 16);
+ pui8Parameter[3] = (ui32Address >> 24);
+
+ sResponse.words[0] = 0;
+ sResponse.words[1] = 0;
+ sResponse.words[2] = 0;
+
+ //
+ // Fill the buffer with the specific command we want to write, and send it.
+ //
+ am_hal_ble_vs_command_build(sWriteCommand.words,
+ AM_HAL_BLE_PLF_REGISTER_READ_OPCODE,
+ AM_HAL_BLE_PLF_REGISTER_READ_LENGTH,
+ pui8Parameter);
+
+ //
+ // Temporarily disable BLE interrupts.
+ //
+ ui32IntEnable = BLEIFn(ui32Module)->INTEN;
+ BLEIFn(ui32Module)->INTEN = 0;
+
+ am_hal_ble_blocking_hci_write(pBLE,
+ AM_HAL_BLE_RAW,
+ sWriteCommand.words,
+ AM_HAL_BLE_PLF_REGISTER_READ_LENGTH);
+
+ //
+ // Make sure the IO clock for the STATUS signal is on.
+ //
+ BLEIFn(ui32Module)->BLEDBG_b.IOCLKON = 1;
+
+ //
+ // Wait for the response, and return it to the caller via our variable.
+ //
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 500,
+ AM_HAL_BLE_NO_HCI_RESPONSE );
+
+ am_hal_ble_blocking_hci_read(pBLE, sResponse.words, 0);
+
+ *pui32Value = (((sResponse.words[1] & 0xFF000000) >> 24) |
+ ((sResponse.words[2] & 0x00FFFFFF) << 8));
+
+ //
+ // Re-enable BLE interrupts.
+ //
+ BLEIFn(ui32Module)->INTCLR = ui32IntEnable;
+ BLEIFn(ui32Module)->INTEN = ui32IntEnable;
+
+ return AM_HAL_STATUS_SUCCESS;
+
+} // am_hal_ble_plf_reg_read()
+
+//*****************************************************************************
+//
+// Write a register value to the BLE core.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_plf_reg_write(void *pHandle, uint32_t ui32Address, uint32_t ui32Value)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint8_t pui8Parameter[8];
+ uint32_t ui32IntEnable;
+
+ uint32_t ui32Module = pBLE->ui32Module;
+
+ //
+ // Make a buffer big enough to hold the register write command, and a
+ // second one big enough to hold the response.
+ //
+ am_hal_ble_buffer(AM_HAL_BLE_PLF_REGISTER_WRITE_LENGTH) sWriteCommand;
+ am_hal_ble_buffer(16) sResponse;
+
+ //
+ // Prepare our register write value.
+ //
+ pui8Parameter[0] = ui32Address;
+ pui8Parameter[1] = (ui32Address >> 8);
+ pui8Parameter[2] = (ui32Address >> 16);
+ pui8Parameter[3] = (ui32Address >> 24);
+ pui8Parameter[4] = ui32Value;
+ pui8Parameter[5] = (ui32Value >> 8);
+ pui8Parameter[6] = (ui32Value >> 16);
+ pui8Parameter[7] = (ui32Value >> 24);
+
+ //
+ // Fill the buffer with the specific command we want to write, and send it.
+ //
+ am_hal_ble_vs_command_build(sWriteCommand.words,
+ AM_HAL_BLE_PLF_REGISTER_WRITE_OPCODE,
+ AM_HAL_BLE_PLF_REGISTER_WRITE_LENGTH,
+ pui8Parameter);
+
+ //
+ // Temporarily disable BLE interrupts.
+ //
+ ui32IntEnable = BLEIFn(ui32Module)->INTEN;
+ BLEIFn(ui32Module)->INTEN = 0;
+
+ am_hal_ble_blocking_hci_write(pBLE,
+ AM_HAL_BLE_RAW,
+ sWriteCommand.words,
+ AM_HAL_BLE_PLF_REGISTER_WRITE_LENGTH);
+
+ //
+ // Make sure the IO clock for the STATUS signal is on.
+ //
+ BLEIFn(ui32Module)->BLEDBG_b.IOCLKON = 1;
+
+ //
+ // Wait for the response.
+ //
+ WHILE_TIMEOUT_MS ( BLEIFn(ui32Module)->BSTATUS_b.BLEIRQ == 0, 50,
+ AM_HAL_BLE_NO_HCI_RESPONSE );
+
+ am_hal_ble_blocking_hci_read(pBLE, sResponse.words, 0);
+
+ //
+ // Re-enable BLE interrupts.
+ //
+ BLEIFn(ui32Module)->INTCLR = ui32IntEnable;
+ BLEIFn(ui32Module)->INTEN = ui32IntEnable;
+
+ return AM_HAL_STATUS_SUCCESS;
+
+} // am_hal_ble_plf_reg_write()
+
+//*****************************************************************************
+//
+// Set the modulation frequency offset from INFO1,
+// based on the tested values stored in non-volatile memory.
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_load_modex_trim_set(void *pHandle)
+{
+ uint8_t ui8TrimValue;
+ //
+ // load the modex trim data from info1.
+ //
+ ui8TrimValue = am_hal_ble_read_trimdata_from_info1();
+ if ( ui8TrimValue )
+ {
+ am_hal_ble_transmitter_modex_set(pHandle, ui8TrimValue);
+ return AM_HAL_STATUS_SUCCESS;
+ }
+ else
+ {
+ return AM_HAL_STATUS_FAIL;
+ }
+} // am_hal_ble_load_modex_trim_set()
+
+//*****************************************************************************
+//
+// Load the modulation frequency offset from INFO1,
+// based on the tested values stored in non-volatile memory.
+//
+//*****************************************************************************
+uint8_t
+am_hal_ble_read_trimdata_from_info1(void)
+{
+ uint32_t ui32TrimValue = 0, temp = 0;
+ uint8_t TrimData = 0;
+
+ temp = ui32TrimValue = AM_REGVAL(0x50023808);
+ temp &= 0xffffff00;
+
+ if ( temp == 0x18240600 )
+ {
+ TrimData = ui32TrimValue & 0xFF;
+ }
+ else
+ {
+ TrimData = 0;
+ }
+
+ if ( (TrimData > 0x50) || (TrimData < 0x20) ) // change from 0x40 to 0x50 for improving the FT2 yield.
+ {
+ TrimData = 0;
+ }
+
+ return TrimData;
+} // am_hal_ble_read_trimdata_from_info1()
+
+//*****************************************************************************
+//
+// Manually set modulation characteristic
+// based on the tested values at customer side.
+// manually set frequency offset for 10101010 or 01010101 pattern
+// parameter default value is 0x34, increase to get larger frequency offset
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_transmitter_modex_set(void *pHandle, uint8_t ui8ModFrqOffset)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint32_t RegValueMCGR, RegValueBACKCR, RegValueSTCR, RegValueDACSPICR, temp = 0;
+
+ ui8ModFrqOffset &= 0x7F;
+
+ am_hal_ble_plf_reg_read(pBLE, 0x43000004, &RegValueMCGR);
+
+ //
+ // Unlock the BLE registers.
+ //
+ am_hal_ble_plf_reg_write(pBLE, 0x43000004, 0xFFFFFFFF);
+ am_hal_ble_plf_reg_read(pBLE, 0x52000008, &temp);
+ temp |= 0x08;
+ am_hal_ble_plf_reg_read(pBLE, 0x52000000, &RegValueSTCR);
+ RegValueSTCR |= (1 << 10);
+ am_hal_ble_plf_reg_write(pBLE, 0x52000000, RegValueSTCR);
+
+ am_hal_ble_plf_reg_read(pBLE, 0x45800070, &RegValueBACKCR);
+ am_hal_ble_plf_reg_write(pBLE, 0x45800070, (RegValueBACKCR | 0x8));
+ RegValueDACSPICR = (ui8ModFrqOffset << 1) | 0x1;
+ am_hal_ble_plf_reg_write(pBLE, 0x52000014, RegValueDACSPICR);
+
+ am_hal_ble_plf_reg_write(pBLE, 0x52000008, temp);
+
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_write(pBLE, AM_HAL_BLE_IP_RAM_MODEX_TRIM_ADDR_B0, ui8ModFrqOffset);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_write(pBLE, AM_HAL_BLE_IP_RAM_MODEX_TRIM_ADDR_A1, ui8ModFrqOffset);
+ }
+ am_hal_ble_plf_reg_write(pBLE, 0x43000004, RegValueMCGR);
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_transmitter_modex_set()
+
+//*****************************************************************************
+//
+// Set BLE sleep enable/disable for the BLE core.
+// enable = 'true' set sleep enable, enable = 'false' set sleep disable
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_sleep_set(void *pHandle, bool enable)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint32_t sleepenable = 0;
+
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_B0, &sleepenable);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_A1, &sleepenable);
+ }
+
+ sleepenable &= 0xffff0100;
+
+ if ( enable )
+ {
+ sleepenable |= 0x0101;
+ }
+
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_write(pBLE, AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_B0, sleepenable);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_write(pBLE, AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_A1, sleepenable);
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_sleep_set()
+
+//*****************************************************************************
+//
+// Get current sleep enable status
+// return 'true' = sleep enable , 'false' = sleep disable
+//
+//*****************************************************************************
+bool
+am_hal_ble_sleep_get(void *pHandle)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint32_t sleepenable = 0;
+
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_B0, &sleepenable);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_SLEEP_ENABLE_ADDR_A1, &sleepenable);
+ }
+
+ if ( (sleepenable & 0xFFFF) > 0 )
+ {
+ return true;
+ }
+
+ return false;
+} // am_hal_ble_sleep_get()
+
+//*****************************************************************************
+//
+// set the tx power of BLE
+// values.
+// ui32TxPower: 0x04->-10dBm 0x05->-5dBm 0x08->0dBm 0x0F->3dBm
+//
+//*****************************************************************************
+uint32_t
+am_hal_ble_tx_power_set(void *pHandle, uint8_t ui32TxPower)
+{
+ am_hal_ble_state_t *pBLE = pHandle;
+ uint32_t RegValueMCGR, tempreg = 0;
+ uint32_t ui32PowerValue = 0x00000008;
+ ui32PowerValue |= (ui32TxPower & 0xF) << 16;
+
+ am_hal_ble_plf_reg_read(pBLE, 0x43000004, &RegValueMCGR);
+
+ //
+ // Unlock the BLE controller registers.
+ //
+ am_hal_ble_plf_reg_write(pBLE, 0x43000004, 0xFFFFFFFF);
+
+ // set tx power register at 0x52400018
+ am_hal_ble_plf_reg_write(pBLE, 0x52400018, ui32PowerValue);
+
+ // Lock BLE controller registers
+ am_hal_ble_plf_reg_write(pBLE, 0x43000004, RegValueMCGR);
+
+ //
+ // Update BLE controller RAM settings as well.
+ // Note:
+ // Register values may be lost when BLE controller enters deepsleep.
+ // BLE controller loads RAM settings back upon wakeup.
+ // To retain the setting, BLE controller RAM settings should be updated.
+ //
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_POWER_LEVEL_ADDR_B0, &tempreg);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_read(pBLE, AM_HAL_BLE_IP_RAM_POWER_LEVEL_ADDR_A1, &tempreg);
+ }
+
+ tempreg &= 0xffffff00;
+ tempreg |= ui32TxPower;
+
+ if (APOLLO3_B0)
+ {
+ am_hal_ble_plf_reg_write(pBLE, AM_HAL_BLE_IP_RAM_POWER_LEVEL_ADDR_B0, tempreg);
+ }
+ else
+ {
+ am_hal_ble_plf_reg_write(pBLE, AM_HAL_BLE_IP_RAM_POWER_LEVEL_ADDR_A1, tempreg);
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_ble_tx_power_set()
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.h
new file mode 100644
index 0000000..069caa2
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble.h
@@ -0,0 +1,990 @@
+//*****************************************************************************
+//
+//! @file am_hal_ble.h
+//!
+//! @brief HAL functions for the BLE interface.
+//!
+//! @addtogroup
+//! @ingroup
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#ifndef AM_HAL_BLE_H
+#define AM_HAL_BLE_H
+
+#include "am_hal_global.h"
+#include "am_hal_status.h"
+
+//*****************************************************************************
+//
+// CMSIS-style macro for handling a variable BLEIF module number.
+//
+#define BLEIFn(n) ((BLEIF_Type*)(BLEIF_BASE + (n * (BLEIF_BASE - BLEIF_BASE))))
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// BLE-specific status values.
+//
+//*****************************************************************************
+typedef enum
+{
+ //
+ // This error occurs when an HCI read or write function is called while
+ // another HCI communication function is already in progress.
+ //
+ AM_HAL_BLE_STATUS_BUS_BUSY = AM_HAL_STATUS_MODULE_SPECIFIC_START,
+
+ //
+ // This error happens when the MCU tries to execute an HCI read, but the
+ // BLE core hasn't asserted the BLEIRQ line. Try waiting for a BLEIRQ
+ // interrupt, or polling the BLECIRQ bit in the BSTATUS register before
+ // calling an HCI read function.
+ //
+ AM_HAL_BLE_STATUS_IRQ_LOW,
+
+ //
+ // This error means that the MCU tried to execute an HCI write, but the BLE
+ // core didn't assert its SPI_STATUS signal within the allotted timeout.
+ // This might mean that there has been some error inside the BLE core. This
+ // may require a reboot of the BLE core.
+ //
+ AM_HAL_BLE_STATUS_SPI_NOT_READY,
+
+ //
+ // This error means we were trying to write, but the BLE core has requested
+ // a READ instead. We will need to perform a read before we can retry this
+ // write.
+ //
+ AM_HAL_BLE_REQUESTING_READ,
+
+ //
+ // We are expecting an HCI response to a packet we just sent, but the BLE
+ // core isn't asserting BLEIRQ. Its software may have crashed, and it may
+ // need to restart.
+ //
+ AM_HAL_BLE_NO_HCI_RESPONSE,
+
+ //
+ // Any of these errors indicate a problem with the BLE hardware that
+ // requires a complete restart.
+ //
+ AM_HAL_BLE_FEATURE_DISABLED,
+ AM_HAL_BLE_SHUTDOWN_FAILED,
+ AM_HAL_BLE_REGULATOR_FAILED,
+ AM_HAL_BLE_POWERUP_INCOMPLETE,
+ AM_HAL_BLE_HCI_PACKET_INCOMPLETE,
+ AM_HAL_BLE_FIFO_ERROR,
+ AM_HAL_BLE_32K_CLOCK_UNSTABLE,
+}
+am_ble_status_e;
+
+//*****************************************************************************
+//
+// BLE power modes.
+//
+//*****************************************************************************
+typedef enum
+{
+ AM_HAL_BLE_POWER_ACTIVE,
+ AM_HAL_BLE_POWER_OFF,
+}
+am_hal_ble_power_state_e;
+
+//*****************************************************************************
+//
+// BLE SPI Clock settings.
+//
+//*****************************************************************************
+typedef enum
+{
+ AM_HAL_BLE_HCI_CLK_DIV2 = BLEIF_CLKCFG_FSEL_HFRC_DIV2,
+ AM_HAL_BLE_HCI_CLK_DIV4 = BLEIF_CLKCFG_FSEL_HFRC_DIV4,
+ AM_HAL_BLE_HCI_CLK_DIV8 = BLEIF_CLKCFG_FSEL_HFRC_DIV8,
+ AM_HAL_BLE_HCI_CLK_DIV16 = BLEIF_CLKCFG_FSEL_HFRC_DIV16,
+ AM_HAL_BLE_HCI_CLK_DIV32 = BLEIF_CLKCFG_FSEL_HFRC_DIV32,
+ AM_HAL_BLE_HCI_CLK_DIV64 = BLEIF_CLKCFG_FSEL_HFRC_DIV8,
+}
+am_hal_ble_hci_clock_e;
+
+//*****************************************************************************
+//
+// BLE Core Clock settings.
+//
+//*****************************************************************************
+typedef enum
+{
+ AM_HAL_BLE_CORE_MCU_CLK = 0x02,
+ AM_HAL_BLE_CORE_INTERNAL_CLK = 0x00,
+}
+am_hal_ble_core_clock_e;
+
+//*****************************************************************************
+//
+// Interrupts.
+//
+//*****************************************************************************
+// The B2M_STATE went into the shutdown state
+#define AM_BLEIF_INT_B2MSHUTDN AM_REG_BLEIF_INTEN_B2MSHUTDN_M
+// The B2M_STATE went into the active state
+#define AM_BLEIF_INT_B2MACTIVE AM_REG_BLEIF_INTEN_B2MACTIVE_M
+// The B2M_STATE went into the sleep state
+#define AM_BLEIF_INT_B2MSLEEP AM_REG_BLEIF_INTEN_B2MSLEEP_M
+// command queue received and error
+#define AM_BLEIF_INT_CQERR AM_REG_BLEIF_INTEN_CQERR_M
+// CQ write operation performed a register write with the register address bit
+// 0 set to 1. The low address bits in the CQ address fields are unused and
+// bit 0 can be used to trigger an interrupt to indicate when this register
+// write is performed by the CQ operation.
+#define AM_BLEIF_INT_CQUPD AM_REG_BLEIF_INTEN_CQUPD_M
+// The command queue is waiting interrupt
+#define AM_BLEIF_INT_CQPAUSED AM_REG_BLEIF_INTEN_CQPAUSED_M
+// DMA Error
+#define AM_BLEIF_INT_DERR AM_REG_BLEIF_INTEN_DERR_M
+// DMA Complete
+#define AM_BLEIF_INT_DCMP AM_REG_BLEIF_INTEN_DCMP_M
+// THis is the BLE Core IRQ signal
+#define AM_BLEIF_INT_BLECIRQ AM_REG_BLEIF_INTEN_BLECIRQ_M
+// This is the illegal command interrupt.
+#define AM_BLEIF_INT_ICMD AM_REG_BLEIF_INTEN_ICMD_M
+// This is the illegal FIFO access interrupt.
+#define AM_BLEIF_INT_IACC AM_REG_BLEIF_INTEN_IACC_M
+// Any change in the B2M_STATE signal from the BLE Core will set this interrupt
+#define AM_BLEIF_INT_B2MST AM_REG_BLEIF_INTEN_B2MST_M
+// This is the Write FIFO Overflow interrupt.
+#define AM_BLEIF_INT_FOVFL AM_REG_BLEIF_INTEN_FOVFL_M
+// This is the Read FIFO Underflow interrupt.
+#define AM_BLEIF_INT_FUNDFL AM_REG_BLEIF_INTEN_FUNDFL_M
+// This is the FIFO Threshold interrupt.
+#define AM_BLEIF_INT_THR AM_REG_BLEIF_INTEN_THR_M
+// This is the Command Complete interrupt.
+#define AM_BLEIF_INT_CMDCMP AM_REG_BLEIF_INTEN_CMDCMP_M
+
+#define AM_HAL_BLE_INT_B2MSHUTDN BLEIF_INTEN_B2MSHUTDN_Msk // The B2M_STATE went into the shutdown state
+#define AM_HAL_BLE_INT_B2MACTIVE BLEIF_INTEN_B2MACTIVE_Msk // The B2M_STATE went into the active state
+#define AM_HAL_BLE_INT_B2MSLEEP BLEIF_INTEN_B2MSLEEP_Msk // The B2M_STATE went into the sleep state
+#define AM_HAL_BLE_INT_CQERR BLEIF_INTEN_CQERR_Msk // command queue received and error
+
+// CQ write operation performed a register write with the register address bit
+// 0 set to 1. The low address bits in the CQ address fields are unused and
+// bit 0 can be used to trigger an interrupt to indicate when this register
+// write is performed by the CQ operation.
+#define AM_HAL_BLE_INT_CQUPD BLEIF_INTEN_CQUPD_Msk
+
+#define AM_HAL_BLE_INT_CQPAUSED BLEIF_INTEN_CQPAUSED_Msk // The command queue is waiting interrupt
+#define AM_HAL_BLE_INT_DERR BLEIF_INTEN_DERR_Msk // DMA Error
+#define AM_HAL_BLE_INT_DCMP BLEIF_INTEN_DCMP_Msk // DMA Complete
+#define AM_HAL_BLE_INT_BLECSSTAT BLEIF_INTEN_BLECSSTAT_Msk // This is the BLE Core SPI STATUS signal.
+#define AM_HAL_BLE_INT_BLECIRQ BLEIF_INTEN_BLECIRQ_Msk // This is the BLE Core IRQ signal
+#define AM_HAL_BLE_INT_ICMD BLEIF_INTEN_ICMD_Msk // This is the illegal command interrupt.
+#define AM_HAL_BLE_INT_IACC BLEIF_INTEN_IACC_Msk // This is the illegal FIFO access interrupt.
+#define AM_HAL_BLE_INT_B2MST BLEIF_INTEN_B2MST_Msk // Any change in the B2M_STATE signal from the BLE Core will set this interrupt
+#define AM_HAL_BLE_INT_FOVFL BLEIF_INTEN_FOVFL_Msk // This is the Write FIFO Overflow interrupt.
+#define AM_HAL_BLE_INT_FUNDFL BLEIF_INTEN_FUNDFL_Msk // This is the Read FIFO Underflow interrupt.
+#define AM_HAL_BLE_INT_THR BLEIF_INTEN_THR_Msk // This is the FIFO Threshold interrupt.
+#define AM_HAL_BLE_INT_CMDCMP BLEIF_INTEN_CMDCMP_Msk // This is the Command Complete interrupt.
+
+#define AM_HAL_BLE_INT_BLECSSTATN BLEIF_INTSTAT_B2MSHUTDN_Msk
+#define AM_HAL_BLE_INT_BLECIRQN BLEIF_INTSTAT_B2MACTIVE_Msk
+
+//*****************************************************************************
+//
+// Type definitions.
+//
+//*****************************************************************************
+#define am_hal_ble_buffer(A) \
+ union \
+ { \
+ uint32_t words[(A + 3) >> 2]; \
+ uint8_t bytes[A]; \
+ }
+
+// Function pointer for non-blocking ble read callbacks.
+typedef void (*am_hal_ble_transfer_complete_cb_t)(uint8_t *pui8Data, uint32_t ui32Length, void *pvContext);
+
+//
+// Patch container
+//
+typedef struct
+{
+ uint32_t ui32Type;
+ uint32_t ui32Length;
+ uint32_t ui32CRC;
+ const uint32_t *pui32Data;
+}
+am_hal_ble_patch_t;
+
+//
+// Configuration structure for the BLE module.
+//
+typedef struct
+{
+ // HCI interface options.
+ uint32_t ui32SpiClkCfg; // Configure the HCI interface clock.
+ uint32_t ui32ReadThreshold; // Internal HCI READ FIFO size
+ uint32_t ui32WriteThreshold; // Internal HCI WRITE FIFO size.
+
+ // BLE options.
+ uint32_t ui32BleClockConfig; // Configure the BLE core clock.
+ uint32_t ui32ClockDrift; // Set the expected BLE clock drift.
+ uint32_t ui32SleepClockDrift; // Set the expected sleep clock accuracy.
+ bool bAgcEnabled; // Enable/Disable AGC
+ bool bSleepEnabled; // Enable/Disable Sleep Algorithm
+
+ // Patches
+ bool bUseDefaultPatches; // Apply the default patches?
+}
+am_hal_ble_config_t;
+
+//
+// Default options for the BLE module.
+//
+extern const am_hal_ble_config_t am_hal_ble_default_config;
+
+//*****************************************************************************
+//
+// Structure for sending SPI commands.
+//
+//*****************************************************************************
+typedef struct
+{
+ uint32_t *pui32Data;
+ uint8_t pui8Offset[3];
+ uint8_t ui8OffsetLen;
+ uint16_t ui16Length;
+ uint8_t ui8Command;
+ uint8_t ui8RepeatCount;
+ bool bContinue;
+ am_hal_ble_transfer_complete_cb_t pfnTransferCompleteCB;
+ void *pvContext;
+}
+am_hal_ble_transfer_t;
+
+//*****************************************************************************
+//
+// Vendor Specific commands.
+//
+// Note: Lengths are reported as "4 + <parameter length>". Each vendor-specific
+// header is 4 bytes long. This definition allows the macro version of the
+// length to be used in all BLE APIs.
+//
+//*****************************************************************************
+#define AM_HAL_BLE_SET_BD_ADDR_OPCODE 0xFC32
+#define AM_HAL_BLE_SET_BD_ADDR_LENGTH (4 + 6)
+
+#define AM_HAL_BLE_SET_TX_POWER_OPCODE 0xFC3B
+#define AM_HAL_BLE_SET_TX_POWER_LENGTH (4 + 3)
+
+#define AM_HAL_BLE_READ_VERSIONS_OPCODE 0xFD01
+#define AM_HAL_BLE_READ_VERSIONS_LENGTH (4 + 0)
+
+#define AM_HAL_BLE_PLF_REGISTER_READ_OPCODE 0xFD02
+#define AM_HAL_BLE_PLF_REGISTER_READ_LENGTH (4 + 4)
+
+#define AM_HAL_BLE_PLF_REGISTER_WRITE_OPCODE 0xFD03
+#define AM_HAL_BLE_PLF_REGISTER_WRITE_LENGTH (4 + 8)
+
+#define AM_HAL_BLE_GET_RSSI_OPCODE 0x1405
+#define AM_HAL_BLE_GET_RSSI_LENGTH (4 + 0)
+
+#define AM_HAL_BLE_SET_SLEEP_OPCODE 0xFD09
+#define AM_HAL_BLE_SET_SLEEP_LENGTH (4 + 0)
+
+#define AM_HAL_BLE_SPI_SENDFRAME_OPCODE 0xFD04
+#define AM_HAL_BLE_SPI_SENDFRAME_LENGTH (4 + 1)
+
+#define AM_HAL_BLE_SET_BD_ADDR_CMD(...) {0x01, 0x32, 0xFC, 0x06, __VA_ARGS__}
+#define AM_HAL_BLE_SET_TX_POWER_CMD(...) {0x01, 0x3B, 0xFC, 0x03, __VA_ARGS__}
+#define AM_HAL_BLE_SET_READ_VERSIONS_CMD() {0x01, 0x01, 0xFD, 0x00}
+#define AM_HAL_BLE_PLF_REGISTER_READ_CMD(...) {0x01, 0x02, 0xFD, 0x04, __VA_ARGS__}
+#define AM_HAL_BLE_PLF_REGISTER_WRITE_CMD(...) {0x01, 0x03, 0xFD, 0x08, __VA_ARGS__}
+#define AM_HAL_BLE_GET_RSSI_CMD() {0x01, 0x05, 0x14, 0x00}
+#define AM_HAL_BLE_SET_SLEEP_CMD() {0x01, 0x09, 0xFD, 0x00}
+#define AM_HAL_BLE_SPI_SENDFRAME_CMD(...) {0x01, 0x04, 0xFD, 0x01, __VA_ARGS__}
+
+//*****************************************************************************
+//
+// State variables for the BLE module.
+//
+//*****************************************************************************
+typedef struct
+{
+ // Handle validation prefix.
+ am_hal_handle_prefix_t prefix;
+
+ // Which BLE module instance is this?
+ uint32_t ui32Module;
+
+ // Apply the default patches during the "boot" function?
+ bool bUseDefaultPatches;
+
+ // What was the last command that we started?
+ am_hal_ble_transfer_t sCurrentTransfer;
+
+ // If a write is interrupted by a read, we have to save the write
+ // transaction to execute later. That saved write goes here.
+ am_hal_ble_transfer_t sSavedTransfer;
+
+ // How far along are we?
+ uint32_t ui32TransferIndex;
+
+ // Has this radio already been patched?
+ bool bPatchComplete;
+
+ // Are we in the middle of a continue packet?
+ bool bContinuePacket;
+
+ // Was our last operation to send a TX packet? If we have two TX packets in
+ // a row, we need special handling to get the timing right.
+ bool bLastPacketWasTX;
+
+ // Do we have a saved packet?
+ bool bSavedPacket;
+
+ // Is the bus already in use?
+ bool bBusy;
+
+ // Has the last command completed?
+ bool bCmdComplete;
+
+ // Has the last DMA action completed?
+ bool bDmaComplete;
+
+ // Has the BLE core's flow control signal been reset?
+ bool bFlowControlComplete;
+}
+am_hal_ble_state_t;
+
+//*****************************************************************************
+//
+// SPI command macros.
+//
+//*****************************************************************************
+#define AM_HAL_BLE_WRITE 1
+#define AM_HAL_BLE_READ 2
+
+//*****************************************************************************
+//
+// HCI packet types.
+//
+//*****************************************************************************
+#define AM_HAL_BLE_RAW 0x0
+#define AM_HAL_BLE_CMD 0x1
+#define AM_HAL_BLE_ACL 0x2
+#define AM_HAL_BLE_EVT 0x4
+
+//*****************************************************************************
+//
+// External function declarations.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// Basics
+//
+// Initialization, enable/disable, and general configuration.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! @brief Initialize the internal state variables for the BLE module.
+//!
+//! @param ui32Module - Which BLE module to use.
+//! @param ppHandle - Pointer to a handle variable to be initialized.
+//!
+//! This function initializes the internal state variables associated with a
+//! particular BLE module and yields a handle that may be used to perform
+//! additional operations with that BLE module.
+//!
+//! This function must be called before any other BLE module operation.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_initialize(uint32_t ui32Module, void **ppHandle);
+
+//*****************************************************************************
+//
+//! @brief De-initialize the internal state variables for the BLE module.
+//!
+//! @param pHandle - Handle variable to be de-initialized.
+//!
+//! This function invalidates a previously initialized BLE module handle and
+//! deletes the contents of the internal state variables associated with it.
+//! This could be used in situations where the caller wants to prevent future
+//! function calls to a particular BLE module.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_deinitialize(void *pHandle);
+
+//*****************************************************************************
+//
+//! @brief Configure a BLE module.
+//!
+//! @param pHandle - Handle for the BLE module.
+//! @param psConfig - Pointer to a BLE configuration structure.
+//!
+//! This routine performs the necessary configuration steps to prepare the
+//! physical BLE interface for operation. This function should be called after
+//! \e am_hal_ble_enable() and before any other BLE operation. The \e psConfig
+//! parameter may be used to set a specific interface clock frequency or modify
+//! the FIFO read and write thresholds, but most users will get the best
+//! results from the default settings stored in the global configuration
+//! structure \e am_hal_ble_default_config.
+//!
+//! @note This function will only work if the BLE module has previously been
+//! enabled.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_config(void *pHandle, const am_hal_ble_config_t *psConfig);
+
+//*****************************************************************************
+//
+//! @brief Enable the BLE module.
+//!
+//! @param pHandle - Handle for the BLE module.
+//! @param ui32PowerState - Determines whether BLE is powered on or off.
+//!
+//! Performs the power-up or power-down sequence for the BLE module referred to
+//! be \e pHandle. This should be called after am_hal_ble_initialize(), but
+//! before am_hal_ble_config().
+//!
+//! The ui32PowerState variable must be set to either AM_HAL_BLE_POWER_ACTIVE
+//! or AM_HAL_BLE_POWER_OFF.
+//!
+//! After this function is called, the BLE core will be in its startup or
+//! "patching" mode.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+uint32_t am_hal_ble_power_control(void *pHandle, uint32_t ui32PowerState);
+
+//*****************************************************************************
+//
+//! @brief Boot the BLE module
+//!
+//! @param pHandle - Handle for the BLE module.
+//!
+//! This function performs the complete patching process for the BLE core and
+//! returns with the BLE core in HCI mode. If you ask for the default patches
+//! your am_hal_ble_config_t structure, then this is the last function you need
+//! to call on startup. You don't need to call any of the patching functions.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_boot(void *pHandle);
+
+//*****************************************************************************
+//
+// Patching functions.
+//
+// The following functions allow the caller to apply "patches" to the BLE core
+// during its startup phase. These are pre-made configuration files that change
+// the operation parameters of the BLE radio. If you have received a patch file
+// from the manufacturer, you may use the \e am_hal_ble_patch_apply() function
+// during startup to apply these settings to the BLE core. Otherwise, you may
+// skip this step by calling the \e am_hal_ble_patch_complete() function.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! @brief Apply a patch to the BLE core.
+//!
+//! @param pHandle Handle for the BLE module.
+//! @param psPatch Pointer to a structure describing the patch.
+//!
+//! The BLE core is an independent processor that executes code from an
+//! on-board ROM. Its behavior can be altered through "patches" which are
+//! binary snippets of code that may be loaded at startup to overlay or replace
+//! sections of the original ROM (for instance, to modify trim settings). This
+//! function allows the caller to apply one of these patches.
+//!
+//! Patches must be applied after the BLE module is enabled and configured, but
+//! before standard HCI operation begins. This is the only time where the BLE
+//! core is able to accept patch files.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_patch_apply(void *pHandle, am_hal_ble_patch_t *psPatch);
+
+extern uint32_t am_hal_ble_default_copy_patch_apply(void *pHandle);
+
+//*****************************************************************************
+//
+//! @brief Apply the default manufacturer patch to the BLE core.
+//!
+//! @param pHandle Handle for the BLE module.
+//! @param psPatch Pointer to a structure describing the patch.
+//!
+//! The BLE core is an independent processor that executes code from an
+//! on-board ROM. Its behavior can be altered through "patches" which are
+//! binary snippets of code that may be loaded at startup to overlay or replace
+//! sections of the original ROM (for instance, to modify trim settings). This
+//! function allows the caller to apply one of these patches.
+//!
+//! Patches must be applied after the BLE module is enabled and configured, but
+//! before standard HCI operation begins. This is the only time where the BLE
+//! core is able to accept patch files.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_default_patch_apply(void *pHandle);
+
+//*****************************************************************************
+//
+//! @brief Complete the patching phase.
+//!
+//! @param pHandle Handle for the BLE module.
+//!
+//! After the BLE core is enabled and configured, it enters a "patching mode"
+//! where it can accept patches from the main CPU. Once all patches have been
+//! applied using the \e am_hal_ble_patch_apply() function. The application
+//! must call this function to command the BLE core to switch to standard HCI
+//! mode.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_patch_complete(void *pHandle);
+
+//*****************************************************************************
+//
+// Manually enable/disable transmitter
+// set ui8TxCtrl as 1 to manually enale transmitter, 0 back to default
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_transmitter_control(void *pHandle, uint8_t ui8TxCtrl);
+
+//*****************************************************************************
+//
+// Manually enable/disable transmitter to output carrier signal
+// set ui8TxChannel as 0 to 0x27 for each transmit channel, 0xFF back to normal modulate mode
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_transmitter_control_ex(void *pHandle, uint8_t ui8TxChannel);
+//*****************************************************************************
+//
+// Manually set modulation characteristic
+// based on the tested values at customer side.
+// manually set frequency offset for 10101010 or 01010101 pattern
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_transmitter_modex_set(void *pHandle, uint8_t ui8ModFrqOffset);
+
+//*****************************************************************************
+//
+//! @brief Performs a blocking read or write to the BLE core.
+//!
+//! @param pHandle - Handle for the BLE module.
+//! @param psTransfer - Structure describing the transaction to execute.
+//!
+//! Send or receive data from the
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_blocking_transfer(void *pHandle, am_hal_ble_transfer_t *psTransfer);
+
+//*****************************************************************************
+//
+//! @brief Complete the patching phase.
+//!
+//! @param pHandle Handle for the BLE module.
+//!
+//! After the BLE core is enabled and configured, it enters a "patching mode"
+//! where it can accept patches from the main CPU. Once all patches have been
+//! applied using the \e am_hal_ble_patch_apply() function. The application
+//! must call this function to command the BLE core to switch to standard HCI
+//! mode.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_nonblocking_transfer(void *pHandle, am_hal_ble_transfer_t *psTransfer);
+
+// High-level HCI APIs
+extern uint32_t am_hal_ble_vs_command_build(uint32_t *pui32Command,
+ uint32_t ui32OpCode,
+ uint32_t ui32TotalLength,
+ uint8_t *pui8Parameters);
+
+extern uint32_t am_hal_ble_blocking_hci_read(void *pHandle,
+ uint32_t *pui32Data,
+ uint32_t *pui32BytesReceived);
+
+extern uint32_t am_hal_ble_blocking_hci_write(void *pHandle,
+ uint8_t ui8Type,
+ uint32_t *pui32Data,
+ uint32_t ui32NumBytes);
+
+extern uint32_t am_hal_ble_nonblocking_hci_read(void *pHandle,
+ uint32_t *pui32Data,
+ am_hal_ble_transfer_complete_cb_t pfnCallback,
+ void *pvContext);
+
+extern uint32_t am_hal_ble_nonblocking_hci_write(void *pHandle,
+ uint8_t ui8Type,
+ uint32_t *pui32Data,
+ uint32_t ui32NumBytes,
+ am_hal_ble_transfer_complete_cb_t pfnCallback,
+ void *pvContext);
+
+//*****************************************************************************
+//
+//! @brief Set one of the trim values for the BLE core.
+//!
+//! @param pHandle is the BLE module handle
+//! @param ui32BleCoreAddress is the target address for the trim value.
+//! @param ui32TrimValue is the trim value to write to the BLE core.
+//!
+//! This function takes a BLE core trim value from the MCU memory and writes it
+//! to a trim register in the BLE core.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_trim_set(void *pHandle, uint32_t ui32BleCoreAddress,
+ uint32_t ui32TrimValue, uint32_t ui32TrimMask);
+
+//*****************************************************************************
+//
+//! @brief Sets the default trim values for the BLE core.
+//!
+//! @param pHandle is the BLE module handle
+//!
+//! This function reads the default trim values for the BLE core from
+//! non-volatile memory, and writes them to the BLE core registers.
+//! Specifically, this function adjusts the BLE core bandgap voltage, bandgap
+//! current, and memory-retention LDO voltage based on chip-specific,
+//! manufacturer-determined settings.
+//!
+//! For best performance and power consumption, this function should be called
+//! after the patching process is complete, but before normal HCI operation
+//! begins.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_default_trim_set(void *pHandle);
+
+uint32_t am_hal_ble_default_trim_set_ramcode(void *pHandle);
+
+//*****************************************************************************
+//
+//! @brief Change the TX power setting.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param ui32TxPower is the desired power setting.
+//! 0x03->-20dBm 0x04->-10dBm 0x05->-5dBm 0x08->0dBm 0x0F->4dBm
+//!
+//! This function sends a vendor-specific command to change the TX power level
+//! setting for the BLE core.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_tx_power_set(void *pHandle, uint8_t ui32TxPower);
+
+//*****************************************************************************
+//
+//! @brief Generate continuously moderated signal for SRRC/CE test.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param enable, true for enabling continous signal, false for disable
+//!
+//! This function programs an internal register to control transmit mode in
+//! BLE controller.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+
+extern uint32_t am_hal_ble_set_constant_transmission(void *pHandle, bool enable);
+
+//*****************************************************************************
+//
+//! @brief Generate continuously moderated signal for SRRC/CE test on a
+//! specified rf channel.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param channel, 0 to 0x27 for a valid radio channnel while 0xff to set
+//! radio transmit mode to normal.
+//!
+//! This function calls am_hal_ble_set_constant_transmission() and send HCI
+//! test command with channel information to BLE controller.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_set_constant_transmission_ex(void *pHandle, uint8_t channel);
+
+//*****************************************************************************
+//
+//! @brief This is to workaround a bug for channel 1 in DTM mode.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//!
+//! @return BLE status code.
+//
+//
+extern uint32_t am_hal_ble_init_rf_channel(void *pHandle);
+
+//*****************************************************************************
+//
+//! @brief Set BLE sleep enable/disable for the BLE core.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param enable 'true' set sleep enable, 'false' set sleep disable
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_sleep_set(void *pHandle, bool enable);
+
+//*****************************************************************************
+//
+//! @brief Sends a signal to wake up the BLE controller
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param ui32Mode is determines the value of the WAKE signal.
+//!
+//! The BLE core needs to be awake before we send data to it. This function
+//! sends a signal to the BLE core that tells it that we intend to send it
+//! data. When the BLE core wakes up, it will generate a BLECSSTAT interrupt,
+//! and the SPISTATUS bit in the BSTATUS register will be set.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_wakeup_set(void *pHandle, uint32_t ui32Mode);
+
+//*****************************************************************************
+//
+//! @brief Read a register value directly from the BLE Core.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param ui32Address is the address of the register.
+//! @param *pui32Value is a pointer where the register value will be stored.
+//!
+//! This function uses a vendor-specific sequence of blocking HCI commands to
+//! read one of the internal registers within the BLE Core. The value stored in
+//! this register will be written to the location specified by \e pui32Value.
+//!
+//! This function is mostly used during initial radio setup or for internal
+//! test commands. Standard applications will not need to call this function
+//! directly.
+//!
+//! @note This function uses multiple blocking HCI commands in sequence. It
+//! should not be used in any situation where blocking commands are not
+//! desired. Do not use it in applications where interrupt-driven BLE
+//! operations have already started.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_plf_reg_read(void *pHandle, uint32_t ui32Address, uint32_t *pui32Value);
+
+//*****************************************************************************
+//
+//! @brief Write a register value directly to the BLE Core.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param ui32Address is the address of the register.
+//! @param ui32Value is the value to write.
+//!
+//! This function uses a vendor-specific sequence of blocking HCI commands to
+//! write one of the internal registers within the BLE Core.
+//!
+//! This function is mostly used during initial radio setup or for internal
+//! test commands. Standard applications will not need to call this function
+//! directly.
+//!
+//! @note This function uses multiple blocking HCI commands in sequence. It
+//! should not be used in any situation where blocking commands are not
+//! desired. Do not use it in applications where interrupt-driven BLE
+//! operations have already started.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_plf_reg_write(void *pHandle, uint32_t ui32Address, uint32_t ui32Value);
+
+//*****************************************************************************
+//
+//! @brief Change the sleep behavior of the BLE core.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param enable sets the desired sleep behavior.
+//!
+//! This function uses a vendor-specific sequence of blocking HCI commands to
+//! change the default behavior of the BLE core between radio events. Set \e
+//! enable to true to allow the BLE core to sleep between radio events, or
+//! false to keep the BLE core awake at all times. The default behavior on
+//! startup allows the BLE core to sleep. Most applications will not need to
+//! modify this setting.
+//!
+//! @note This function uses multiple blocking HCI commands in sequence. It
+//! should not be used in any situation where blocking commands are not
+//! desired. Do not use it in applications where interrupt-driven BLE
+//! operations have already started.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_sleep_set(void *pHandle, bool enable);
+
+//*****************************************************************************
+//
+//! @brief Check the sleep behavior of the BLE core.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//!
+//! This function uses a vendor-specific sequence of blocking HCI commands to
+//! check whether the BLE core is set to go to sleep between BLE transactions.
+//! This function will return "true" if BLE sleep is enabled, or "false" if it
+//! is disabled.
+//!
+//! @note This function uses multiple blocking HCI commands in sequence. It
+//! should not be used in any situation where blocking commands are not
+//! desired. Do not use it in applications where interrupt-driven BLE
+//! operations have already started.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern bool am_hal_ble_sleep_get(void *pHandle);
+
+//*****************************************************************************
+//
+//! @brief Change the TX power setting of the BLE core.
+//!
+//! @param pHandle is the Handle for the BLE module.
+//! @param uint8_t is the desired power setting.
+//!
+//! This function uses a vendor-specific sequence of blocking HCI commands to
+//! change the TX power setting of the radio.
+//!
+//! @note This function uses multiple blocking HCI commands in sequence. It
+//! should not be used in any situation where blocking commands are not
+//! desired. Do not use it in applications where interrupt-driven BLE
+//! operations have already started.
+//!
+//! @return BLE status code.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_tx_power_set(void *pHandle, uint8_t ui32TxPower);
+
+//*****************************************************************************
+//
+// Interrupts.
+//
+//*****************************************************************************
+extern uint32_t am_hal_ble_int_service(void *pHandle, uint32_t ui32Status);
+extern uint32_t am_hal_ble_int_enable(void *pHandle, uint32_t ui32InterruptMask);
+extern uint32_t am_hal_ble_int_disable(void *pHandle, uint32_t ui32InterruptMask);
+extern uint32_t am_hal_ble_int_status(void *pHandle, bool bEnabledOnly);
+extern uint32_t am_hal_ble_int_clear(void *pHandle, uint32_t ui32InterruptMask);
+extern uint32_t am_hal_ble_check_32k_clock(void *pHandle);
+//*****************************************************************************
+//
+// Debug trace pins.
+//
+//*****************************************************************************
+#ifdef AM_DEBUG_BLE_TIMING
+
+#define BLE_DEBUG_TRACE_01 11
+#define BLE_DEBUG_TRACE_02 28
+#define BLE_DEBUG_TRACE_03 26
+#define BLE_DEBUG_TRACE_04 4
+#define BLE_DEBUG_TRACE_05 18
+#define BLE_DEBUG_TRACE_06 14
+#define BLE_DEBUG_TRACE_07 6
+#define BLE_DEBUG_TRACE_08 45
+#define BLE_DEBUG_TRACE_09 12
+#define BLE_DEBUG_TRACE_10 13
+#define BLE_DEBUG_TRACE_11 10
+#define BLE_LOCK_TRACE_PIN BLE_DEBUG_TRACE_11
+
+#define am_hal_debug_gpio_set(x) am_hal_gpio_state_write(x, AM_HAL_GPIO_OUTPUT_SET)
+
+#define am_hal_debug_gpio_clear(x) am_hal_gpio_state_write(x, AM_HAL_GPIO_OUTPUT_CLEAR)
+
+#define am_hal_debug_gpio_toggle(x) am_hal_gpio_state_write(x, AM_HAL_GPIO_OUTPUT_TOGGLE)
+
+#define am_hal_debug_gpio_pinconfig(x) am_hal_gpio_pinconfig(x, g_AM_HAL_GPIO_OUTPUT)
+
+#else
+
+#define am_hal_debug_gpio_set(...)
+#define am_hal_debug_gpio_clear(...)
+#define am_hal_debug_gpio_toggle(...)
+#define am_hal_debug_gpio_pinconfig(...)
+
+#endif // AM_DEBUG_BLE_TIMING
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // AM_HAL_BLE_H
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.c b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.c
new file mode 100644
index 0000000..8c6015e
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.c
@@ -0,0 +1,704 @@
+//*****************************************************************************
+//
+//! @file am_hal_ble_patch.c
+//!
+//! @brief This is a binary patch for the BLE core.
+//!
+//! @addtogroup
+//! @ingroup
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#include "am_mcu_apollo.h"
+
+//*****************************************************************************
+//
+// BLE LL local supported feature flags.
+//
+// Bit position | Link Layer Feature
+// 0 | LE Encryption
+// 1 | Connection Parameters Request Procedure
+// 2 | Extended Reject Indication
+// 3 | Slave-initiated Features Exchange
+// 4 | LE Ping
+// 5 | LE Data Packet Length Extension
+// 6 | LL Privacy
+// 7 | Extended Scanner Filter Policies
+//
+// Specified 4.6 Feature Support, Link Layer Specification, Core V4.2.
+//
+//*****************************************************************************
+#ifndef AM_HAL_BLE_LOCAL_FEATURE
+#define AM_HAL_BLE_LOCAL_FEATURE 0x21
+#endif
+
+//*****************************************************************************
+//
+// Patches included in this file.
+//
+//*****************************************************************************
+am_hal_ble_patch_t am_ble_buffer_patch;
+am_hal_ble_patch_t am_ble_performance_patch;
+am_hal_ble_patch_t am_ble_performance_copy_patch;
+am_hal_ble_patch_t am_ble_nvds_patch;
+
+//*****************************************************************************
+//
+// Patch application order.
+//
+//*****************************************************************************
+am_hal_ble_patch_t *am_hal_ble_default_patch_array[] =
+{
+ // FTCODE patches (type 0xAA)
+
+ // RAMCODE patches (type 0xBB)
+ &am_ble_performance_patch,
+
+ // Standard patches (type 0xCC)
+ &am_ble_buffer_patch,
+
+ // nvds param (type 0xDD)
+ &am_ble_nvds_patch,
+};
+
+am_hal_ble_patch_t *am_hal_ble_default_copy_patch_array[] =
+{
+ // FTCODE patches (type 0xAA)
+
+ // RAMCODE patches (type 0xBB)
+ &am_ble_performance_copy_patch,
+
+};
+
+#define AM_HAL_BLE_NUM_DEFAULT_PATCHES \
+ (sizeof(am_hal_ble_default_patch_array) / \
+ sizeof(am_hal_ble_default_patch_array[0]))
+
+am_hal_ble_patch_t **am_hal_ble_default_patches = am_hal_ble_default_patch_array;
+am_hal_ble_patch_t **am_hal_ble_default_copy_patches = am_hal_ble_default_copy_patch_array;
+
+const uint32_t am_hal_ble_num_default_patches = AM_HAL_BLE_NUM_DEFAULT_PATCHES;
+
+//*****************************************************************************
+//
+// Patch Name: RAMCODE COPY PATCH v1.10 for Apollo3 A1
+//
+// Bi-directional data fix
+// Modulation deviation fix
+// Extend patch memory
+// Transmit speed patch
+// Added AGC table and enabled AGC
+// Added local feature support setting
+// Fix to connection interval calculation issue with MTK chip sets (OPPO R15 fix)
+// Set VCO to 250mv
+// Modex auto calibration update
+// Fix connection interval calculation issue
+// Increase RF LDO ref voltage form 1.0v to 1.1v
+// Decrease DAC channel delay cycle
+// Increase the VCO swing from 250mv to 300mv
+// Fix MD trans schedule issue (disabled)
+// Fix link loss issue
+// Reduce duration from TX to TX
+// Optimized 32K XO frequency calculation
+// Fix channel map rejected issue
+// Optimized AGC Table
+// Date: 2019-01-30
+//*****************************************************************************
+
+const am_hal_ble_buffer(0x0912) am_ble_performance_copy_patch_data =
+{
+ .bytes =
+ {
+ 0x00,0x11,0x6e,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0xc5,0x01,
+ 0x39,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x70,0xb5,0x00,0x20,0x0c,0x49,0x49,0x88,
+ 0x0c,0x4a,0x8b,0x18,0x1a,0x88,0x0c,0x49,0x9b,0x1c,0x00,0x24,0x13,0x25,0x2d,0x02,
+ 0x0c,0x54,0x40,0x1c,0xa8,0x42,0xfb,0xdb,0x00,0x20,0x00,0x2a,0x04,0xdd,0x1c,0x5c,
+ 0x0c,0x54,0x40,0x1c,0x90,0x42,0xfa,0xdb,0x04,0x48,0x80,0x47,0x00,0x20,0x70,0xbd,
+ 0x00,0x48,0x00,0x20,0x02,0x48,0x00,0x20,0x00,0x35,0x00,0x20,0xaf,0x33,0x01,0x00,
+ 0xa0,0x08,0x1f,0xb5,0x00,0x24,0x00,0x98,0x1d,0x28,0x43,0xd2,0x01,0x00,0x79,0x44,
+ 0x09,0x79,0x49,0x18,0x8f,0x44,0x0e,0x13,0x40,0x1a,0x25,0x40,0x40,0x40,0x40,0x40,
+ 0x40,0x40,0x40,0x40,0x40,0x40,0x2a,0x40,0x40,0x40,0x40,0x2d,0x40,0x32,0x40,0x35,
+ 0x38,0x40,0x40,0x00,0x01,0x98,0xc0,0xb2,0x00,0xf0,0x07,0xfa,0x2c,0xe0,0x02,0x98,
+ 0xc1,0xb2,0x01,0x98,0xc0,0xb2,0x00,0xf0,0xb8,0xf8,0x25,0xe0,0x06,0x98,0x83,0xb2,
+ 0x03,0x98,0x82,0xb2,0x02,0x98,0xc1,0xb2,0x01,0x98,0xc0,0xb2,0x00,0xf0,0x71,0xf9,
+ 0x1a,0xe0,0x01,0x98,0xc0,0xb2,0x00,0xf0,0x0a,0xf9,0x15,0xe0,0x00,0xf0,0x29,0xf8,
+ 0x12,0xe0,0x01,0x98,0x80,0xb2,0x00,0xf0,0x62,0xf9,0x0d,0xe0,0x00,0xf0,0x3b,0xfb,
+ 0x0a,0xe0,0x00,0xf0,0x94,0xfb,0x07,0xe0,0x01,0x98,0xc0,0xb2,0x00,0xf0,0xc7,0xfa,
+ 0x04,0x46,0x01,0xe0,0x00,0x24,0xe4,0x43,0x20,0x46,0x04,0xb0,0x10,0xbd,0x03,0xb4,
+ 0x01,0x48,0x01,0x90,0x01,0xbd,0x39,0x27,0x00,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,
+ 0x01,0xbd,0x95,0x28,0x00,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x01,0x01,
+ 0x00,0x00,0xf0,0xb4,0x00,0x20,0x43,0x22,0x12,0x06,0x51,0x68,0xff,0x24,0x01,0x34,
+ 0x21,0x43,0x51,0x60,0x51,0x68,0x23,0x03,0x19,0x43,0x51,0x60,0xa3,0x23,0xdb,0x05,
+ 0x19,0x68,0x49,0x08,0x49,0x00,0x19,0x60,0x2a,0x49,0x09,0x69,0xce,0xb2,0x29,0x4d,
+ 0x2a,0x4f,0x29,0x88,0xb9,0x42,0x01,0xd3,0x04,0x20,0x0d,0xe0,0x28,0x4f,0xb9,0x42,
+ 0x01,0xd3,0x03,0x20,0x08,0xe0,0x26,0x4f,0xb9,0x42,0x01,0xd3,0x02,0x20,0x03,0xe0,
+ 0x25,0x4f,0xb9,0x42,0x00,0xd3,0x01,0x20,0x24,0x4f,0x39,0x18,0x20,0x31,0x09,0x7e,
+ 0xb1,0x42,0x09,0xda,0x00,0x28,0x01,0xdd,0x40,0x1e,0x40,0xb2,0x39,0x18,0x09,0x7a,
+ 0x40,0x00,0xc0,0x19,0x00,0x8b,0x0b,0xe0,0x04,0x28,0x04,0xda,0x39,0x5c,0xb1,0x42,
+ 0x01,0xdb,0x40,0x1c,0x40,0xb2,0x39,0x18,0x09,0x7a,0x40,0x00,0xc0,0x19,0x00,0x8b,
+ 0x17,0x4e,0x31,0x62,0x19,0x68,0x49,0x08,0x49,0x00,0x19,0x60,0x15,0x4e,0x31,0x6b,
+ 0x0f,0x46,0x27,0x43,0x37,0x63,0x98,0x62,0xa1,0x43,0x31,0x63,0x28,0x80,0x51,0x68,
+ 0xb0,0x03,0x81,0x43,0x10,0x48,0x00,0x78,0xc0,0x07,0xc0,0x0f,0x03,0x05,0x19,0x43,
+ 0x51,0x60,0x51,0x68,0x00,0x02,0xa1,0x43,0x01,0x43,0x51,0x60,0xf0,0xbc,0x70,0x47,
+ 0x00,0x00,0x80,0x00,0x80,0x45,0x4e,0x60,0x00,0x20,0xf6,0x3f,0x00,0x00,0xf6,0x38,
+ 0x00,0x00,0xf6,0x2d,0x00,0x00,0xf6,0x09,0x00,0x00,0xfc,0x67,0x00,0x20,0x80,0x04,
+ 0xc0,0x50,0x40,0x00,0x80,0x45,0x3a,0x60,0x00,0x20,0xf0,0xb5,0x82,0xb0,0x43,0x22,
+ 0x12,0x06,0x53,0x68,0x01,0x24,0x64,0x04,0x23,0x43,0x53,0x60,0xca,0x07,0xd2,0x0f,
+ 0x96,0x46,0x8a,0x07,0xd3,0x0f,0x4a,0x07,0xd4,0x0f,0x0a,0x07,0xd2,0x0f,0x01,0x92,
+ 0xca,0x06,0xd2,0x0f,0x00,0x92,0x8a,0x06,0xd2,0x0f,0x94,0x46,0x4a,0x06,0xd5,0x0f,
+ 0xce,0x09,0x1f,0x4a,0x11,0x68,0x03,0x27,0x7f,0x05,0xb9,0x43,0x12,0x69,0x1d,0x4f,
+ 0x3a,0x40,0x00,0x28,0x06,0xd0,0x01,0x28,0x09,0xd0,0x01,0x27,0xbf,0x05,0x02,0x28,
+ 0x03,0xd0,0x39,0x43,0x00,0x28,0x06,0xd0,0x1b,0xe0,0x39,0x43,0xfa,0xe7,0x01,0x27,
+ 0x7f,0x05,0x39,0x43,0xf6,0xe7,0x30,0x03,0x10,0x43,0x6a,0x01,0x10,0x43,0x62,0x46,
+ 0xd2,0x02,0x10,0x43,0x00,0x9a,0xd2,0x01,0x10,0x43,0x01,0x9a,0x92,0x01,0x10,0x43,
+ 0xa2,0x02,0x10,0x43,0x5a,0x02,0x10,0x43,0x72,0x46,0x12,0x02,0x10,0x43,0x08,0x4a,
+ 0x10,0x61,0x07,0x48,0x01,0x60,0x43,0x20,0x00,0x06,0x41,0x68,0x01,0x22,0x52,0x04,
+ 0x91,0x43,0x05,0x4a,0x12,0x78,0xd2,0x07,0x92,0x0b,0x11,0x43,0x41,0x60,0x02,0xb0,
+ 0xf0,0xbd,0x00,0x00,0xc0,0x43,0x03,0xe0,0xff,0xff,0x3a,0x60,0x00,0x20,0xf8,0xb5,
+ 0x00,0x24,0x43,0x20,0x00,0x06,0x41,0x68,0x01,0x27,0xbf,0x03,0x39,0x43,0x41,0x60,
+ 0x41,0x68,0xba,0x00,0x11,0x43,0x41,0x60,0x21,0x48,0x05,0x68,0x51,0x1c,0x0d,0x43,
+ 0x05,0x60,0x1f,0x4e,0xc8,0x20,0xb0,0x47,0x1f,0x49,0x88,0x68,0x38,0x43,0x88,0x60,
+ 0x0e,0x46,0xf0,0x68,0x00,0x04,0xc7,0x0f,0x1a,0x49,0x01,0x20,0x88,0x47,0x20,0x46,
+ 0x1a,0x49,0x64,0x1c,0x88,0x42,0x01,0xd8,0x00,0x2f,0xf2,0xd0,0x18,0x48,0x05,0x40,
+ 0x13,0x48,0x05,0x60,0x01,0x20,0x40,0x03,0xb0,0x60,0xf1,0x68,0x15,0x48,0x01,0x40,
+ 0x70,0x68,0x14,0x4a,0x10,0x40,0x08,0x43,0x70,0x60,0x30,0x68,0x3f,0x21,0x89,0x02,
+ 0x88,0x43,0x30,0x60,0x43,0x21,0x09,0x06,0x4a,0x68,0x01,0x20,0x80,0x03,0x82,0x43,
+ 0x0e,0x48,0x00,0x78,0xc0,0x07,0xc0,0x0f,0x83,0x03,0x1a,0x43,0x4a,0x60,0x4a,0x68,
+ 0x01,0x23,0x1b,0x04,0x9a,0x43,0x00,0x04,0x02,0x43,0x4a,0x60,0xf8,0xbd,0x00,0x00,
+ 0x40,0x52,0xa1,0x3b,0x00,0x00,0x00,0x00,0xc0,0x51,0x10,0x27,0x00,0x00,0xfe,0xff,
+ 0xfe,0xff,0x3f,0x3f,0x00,0x00,0xc0,0xc0,0xff,0xff,0x3a,0x60,0x00,0x20,0x70,0x47,
+ 0x00,0x00,0xf0,0xb5,0x83,0xb0,0x08,0x25,0x3c,0x49,0x00,0x20,0x08,0x70,0x43,0x20,
+ 0x00,0x06,0x41,0x68,0xaa,0x02,0x11,0x43,0x41,0x60,0x29,0x27,0x38,0x49,0x7f,0x06,
+ 0xf9,0x60,0x41,0x68,0x37,0x4b,0x91,0x43,0x1b,0x78,0xdb,0x07,0x9b,0x0c,0x19,0x43,
+ 0x41,0x60,0x25,0x24,0xa4,0x01,0x41,0x68,0x11,0x43,0x41,0x60,0x41,0x68,0x52,0x10,
+ 0x11,0x43,0x41,0x60,0xf8,0x68,0x03,0x21,0x49,0x06,0x88,0x43,0x56,0x03,0x06,0x43,
+ 0x90,0x03,0x06,0x43,0xb8,0x68,0x01,0x20,0xff,0xf7,0x81,0xfe,0x21,0x46,0x10,0x20,
+ 0xff,0xf7,0x83,0xfe,0x28,0x03,0x06,0x43,0x00,0x24,0x00,0x2d,0x0c,0xd9,0xfe,0x60,
+ 0x25,0x49,0x64,0x20,0x88,0x47,0xf8,0x68,0x69,0x46,0x00,0x0a,0x80,0x1c,0x08,0x55,
+ 0x64,0x1c,0xe4,0xb2,0xac,0x42,0xf2,0xd3,0x6a,0x46,0xd0,0x79,0x91,0x79,0x40,0x18,
+ 0x51,0x79,0x12,0x79,0x89,0x18,0x40,0x18,0x6a,0x46,0xd1,0x78,0x41,0x18,0x90,0x78,
+ 0x09,0x18,0x50,0x78,0x09,0x18,0x10,0x78,0x08,0x18,0x29,0x46,0xff,0xf7,0x63,0xfe,
+ 0x12,0x49,0xc0,0xb2,0x08,0x70,0x39,0x68,0x01,0x22,0x92,0x02,0x11,0x43,0x39,0x60,
+ 0x40,0x00,0x40,0x1c,0x78,0x61,0x00,0x20,0xff,0xf7,0x49,0xfe,0x43,0x21,0x09,0x06,
+ 0x4a,0x68,0x01,0x20,0x00,0x03,0x82,0x43,0x0a,0x48,0x00,0x78,0xc0,0x07,0xc0,0x0f,
+ 0x03,0x03,0x1a,0x43,0x4a,0x60,0x4a,0x68,0x01,0x23,0x5b,0x03,0x9a,0x43,0x40,0x03,
+ 0x02,0x43,0x4a,0x60,0x03,0xb0,0xf0,0xbd,0x00,0x00,0x70,0x60,0x00,0x20,0xcc,0x34,
+ 0x63,0x02,0x3a,0x60,0x00,0x20,0xa1,0x3b,0x00,0x00,0x70,0xb4,0x43,0x21,0x09,0x06,
+ 0x48,0x68,0x01,0x24,0xa4,0x04,0x20,0x43,0x48,0x60,0xc4,0x20,0x87,0x22,0xd2,0x05,
+ 0x10,0x60,0x5c,0x48,0x50,0x61,0x48,0x68,0x5c,0x4a,0xa0,0x43,0x12,0x78,0xd2,0x07,
+ 0xd2,0x0f,0x93,0x04,0x18,0x43,0x48,0x60,0x8b,0x20,0x58,0x4b,0xc0,0x05,0x43,0x63,
+ 0x58,0x4b,0x01,0x25,0xdd,0x60,0x06,0x25,0xcd,0x60,0x05,0x25,0xc5,0x63,0x85,0x68,
+ 0x6d,0x08,0xf0,0x3d,0x85,0x60,0xc5,0x68,0x6d,0x08,0x5d,0x35,0xc5,0x60,0x05,0x69,
+ 0x6d,0x08,0x05,0x61,0x45,0x69,0x6d,0x08,0x45,0x61,0x85,0x69,0x6d,0x08,0x85,0x61,
+ 0xc5,0x69,0x6d,0x08,0xc5,0x61,0x05,0x6a,0x6d,0x08,0x05,0x62,0x45,0x6a,0x6d,0x08,
+ 0x45,0x62,0x85,0x6a,0x6d,0x08,0x85,0x62,0xc5,0x6a,0x6d,0x08,0xc5,0x62,0x01,0x25,
+ 0x1d,0x61,0x5d,0x62,0x9d,0x63,0x43,0x4b,0x1d,0x60,0x43,0x4d,0x5d,0x61,0x1d,0x6a,
+ 0x6d,0x08,0x1d,0x62,0xc3,0x6a,0x01,0x25,0x2b,0x43,0xc3,0x62,0x48,0x68,0xa3,0x10,
+ 0x18,0x43,0x48,0x60,0x48,0x68,0x9b,0x10,0x18,0x43,0x48,0x60,0x3d,0x48,0x3b,0x4b,
+ 0x43,0x61,0x83,0x68,0x3f,0x25,0xad,0x05,0x2b,0x43,0x83,0x60,0x00,0x23,0xc3,0x60,
+ 0x39,0x4b,0x83,0x61,0x39,0x4d,0x2b,0x68,0x1e,0x26,0xb3,0x43,0x2b,0x60,0x83,0x6a,
+ 0xf5,0x03,0xab,0x43,0x1b,0x19,0x83,0x62,0x48,0x68,0xa3,0x10,0x98,0x43,0x13,0x04,
+ 0x18,0x43,0x48,0x60,0x48,0x68,0x23,0x11,0x98,0x43,0x93,0x03,0x18,0x43,0x48,0x60,
+ 0x48,0x68,0x63,0x11,0x18,0x43,0x48,0x60,0x29,0x20,0x40,0x06,0x04,0x6a,0x24,0x09,
+ 0x24,0x01,0x08,0x34,0x04,0x62,0x48,0x68,0x98,0x43,0x53,0x03,0x18,0x43,0x48,0x60,
+ 0x48,0x68,0x01,0x23,0x1b,0x05,0x18,0x43,0x48,0x60,0x28,0x24,0xa3,0x20,0xc0,0x05,
+ 0x04,0x60,0x22,0x4d,0x2d,0x88,0x85,0x62,0x48,0x68,0x12,0x05,0x98,0x43,0x10,0x43,
+ 0x48,0x60,0x1f,0x48,0xe6,0x21,0x01,0x70,0x04,0x72,0x1d,0x4a,0x1e,0x48,0x10,0x83,
+ 0x1e,0x48,0xe0,0x23,0x03,0x76,0x1a,0x4c,0xd4,0x22,0x62,0x70,0x3c,0x22,0x62,0x72,
+ 0x1b,0x4a,0x62,0x83,0x41,0x76,0xc8,0x22,0xa2,0x70,0x15,0x4d,0x46,0x24,0xac,0x72,
+ 0x18,0x4c,0xac,0x83,0x81,0x76,0x29,0x46,0xca,0x70,0x50,0x21,0x2a,0x46,0xd1,0x72,
+ 0x15,0x49,0xd1,0x83,0xc3,0x76,0x5a,0x21,0x11,0x73,0x13,0x49,0x11,0x84,0x03,0x77,
+ 0x70,0xbc,0x70,0x47,0x00,0x00,0xff,0x7f,0x00,0x00,0x3a,0x60,0x00,0x20,0x49,0x02,
+ 0x00,0x00,0x40,0x00,0x80,0x45,0x80,0x00,0x80,0x45,0x1e,0x02,0x00,0x00,0x03,0x00,
+ 0x3c,0x00,0x00,0x00,0x40,0x52,0x08,0x00,0x0f,0x00,0x00,0x00,0xc0,0x51,0x4e,0x60,
+ 0x00,0x20,0xfc,0x67,0x00,0x20,0xf6,0x07,0x00,0x00,0x1c,0x68,0x00,0x20,0xf6,0x09,
+ 0x00,0x00,0xf6,0x2d,0x00,0x00,0xf6,0x38,0x00,0x00,0xf6,0x3f,0x00,0x00,0xf8,0xb5,
+ 0x2d,0x48,0x00,0x68,0x00,0x28,0x54,0xd1,0x43,0x22,0x12,0x06,0x50,0x68,0x01,0x21,
+ 0xc9,0x03,0x08,0x43,0x50,0x60,0x28,0x4f,0x3c,0x68,0x01,0x25,0x03,0x20,0x00,0x06,
+ 0x20,0x43,0x38,0x60,0x00,0x26,0x25,0x49,0x1e,0x20,0x88,0x47,0x24,0x49,0x01,0x20,
+ 0x88,0x47,0x78,0x68,0xc0,0x07,0xc0,0x0f,0x31,0x46,0x21,0x4a,0x76,0x1c,0x91,0x42,
+ 0x01,0xd8,0x00,0x28,0xf2,0xd0,0x1c,0x48,0x81,0x68,0x1e,0x48,0x01,0x60,0x00,0x20,
+ 0x00,0x26,0x00,0x2d,0x11,0xd0,0x1c,0x4b,0x32,0x46,0x00,0x25,0xcb,0x1a,0xaa,0x41,
+ 0x14,0xda,0x40,0x1c,0x05,0x46,0x18,0x4f,0x4d,0x43,0x33,0x46,0x00,0x22,0x7d,0x1b,
+ 0x9a,0x41,0x4d,0x1b,0x93,0x41,0xf4,0xdb,0x08,0xe0,0x14,0x4b,0x99,0x42,0x05,0xd2,
+ 0x40,0x1c,0x02,0x46,0x4a,0x43,0x9a,0x1a,0x8a,0x42,0xf9,0xd8,0x01,0x21,0x09,0x06,
+ 0x8c,0x43,0x49,0x00,0x0c,0x43,0x08,0x49,0x0c,0x60,0x43,0x22,0x12,0x06,0x51,0x68,
+ 0x01,0x23,0xdb,0x03,0x99,0x43,0x0a,0x4b,0x1b,0x78,0xdb,0x07,0x1b,0x0c,0x19,0x43,
+ 0x51,0x60,0xf8,0xbd,0x00,0x00,0x5c,0x60,0x00,0x20,0x00,0x00,0x40,0x44,0xa1,0x3b,
+ 0x00,0x00,0x10,0x27,0x00,0x00,0x60,0x60,0x00,0x20,0x00,0x20,0xbc,0xbe,0x00,0xd0,
+ 0x12,0x13,0x3a,0x60,0x00,0x20,0x70,0xb5,0x23,0x48,0x80,0x47,0x43,0x24,0x24,0x06,
+ 0x01,0x21,0x60,0x68,0x89,0x04,0x08,0x43,0x60,0x60,0x1f,0x48,0x80,0x47,0x1f,0x48,
+ 0x00,0x78,0xaa,0x28,0x06,0xd1,0xa0,0x68,0x80,0x07,0x03,0xd1,0x1d,0x49,0x88,0x47,
+ 0x1d,0x49,0x08,0x60,0xa1,0x20,0xc0,0x05,0x02,0x6b,0x02,0x21,0x8a,0x43,0x0a,0x43,
+ 0x02,0x63,0x01,0x21,0x02,0x6b,0x8a,0x43,0x0a,0x43,0x02,0x63,0x01,0x6b,0x04,0x26,
+ 0xb1,0x43,0x31,0x43,0x01,0x63,0x14,0x4c,0x60,0x68,0x14,0x4d,0x80,0x00,0x04,0xd5,
+ 0x01,0x20,0xa8,0x47,0x60,0x68,0x80,0x00,0xfa,0xd4,0x11,0x4c,0x0f,0x20,0x60,0x60,
+ 0x01,0x20,0xa8,0x47,0x07,0x20,0x60,0x60,0x04,0x20,0xa8,0x47,0x06,0x20,0x60,0x60,
+ 0x8b,0x21,0x0c,0x48,0xc9,0x05,0x08,0x60,0x0c,0x48,0x01,0x69,0x31,0x43,0x01,0x61,
+ 0x30,0xbf,0x70,0xbd,0x00,0x00,0x35,0x37,0x00,0x00,0x39,0x9c,0x00,0x00,0x2c,0x60,
+ 0x00,0x20,0xd1,0x39,0x00,0x00,0x54,0x60,0x00,0x20,0x80,0x00,0x80,0x45,0xa1,0x3b,
+ 0x00,0x00,0x40,0x00,0x80,0x45,0x26,0x03,0x00,0x00,0x00,0xed,0x00,0xe0,0x70,0xb5,
+ 0x2f,0x4d,0x0f,0x20,0x68,0x60,0x8b,0x24,0xe4,0x05,0x20,0x68,0x01,0x21,0x49,0x02,
+ 0x88,0x43,0x20,0x60,0x2b,0x48,0x80,0x47,0x01,0x20,0x80,0xf3,0x10,0x88,0x29,0x48,
+ 0x40,0x68,0x29,0x49,0x80,0x00,0x06,0xd4,0x20,0x68,0x08,0x22,0x10,0x43,0x20,0x60,
+ 0x01,0x20,0x88,0x47,0x01,0xe0,0x01,0x20,0x88,0x47,0x24,0x48,0x80,0x47,0x24,0x48,
+ 0x25,0x49,0x00,0x78,0x88,0x47,0x0d,0x20,0x68,0x60,0x23,0x48,0x80,0x47,0x43,0x20,
+ 0x00,0x06,0x41,0x68,0x01,0x23,0x5b,0x03,0x19,0x43,0x41,0x60,0x29,0x21,0x1f,0x4a,
+ 0x49,0x06,0xca,0x60,0x0a,0x6a,0x12,0x09,0x12,0x01,0x08,0x32,0x0a,0x62,0x0a,0x68,
+ 0xdc,0x10,0x22,0x43,0x0a,0x60,0x1a,0x4a,0x12,0x78,0x52,0x00,0x52,0x1c,0x4a,0x61,
+ 0x42,0x68,0x18,0x49,0x9a,0x43,0x09,0x78,0xc9,0x07,0xc9,0x0f,0x4b,0x03,0x1a,0x43,
+ 0x42,0x60,0x43,0x68,0xa2,0x02,0x13,0x43,0x43,0x60,0x28,0x24,0xa3,0x23,0xdb,0x05,
+ 0x1c,0x60,0x11,0x4c,0x24,0x88,0x9c,0x62,0x43,0x68,0x09,0x05,0x93,0x43,0x0b,0x43,
+ 0x43,0x60,0x00,0x20,0x80,0xf3,0x10,0x88,0x0d,0x48,0x80,0x47,0x70,0xbd,0x40,0x00,
+ 0x80,0x45,0x85,0x3b,0x01,0x00,0x80,0x00,0x80,0x45,0x89,0x44,0x01,0x00,0x6d,0x34,
+ 0x01,0x00,0x40,0x60,0x00,0x20,0xa1,0x3b,0x00,0x00,0x99,0x4d,0x01,0x00,0xcc,0x34,
+ 0x63,0x04,0x70,0x60,0x00,0x20,0x3a,0x60,0x00,0x20,0x4e,0x60,0x00,0x20,0xad,0x34,
+ 0x01,0x00
+ }
+};
+
+am_hal_ble_patch_t am_ble_performance_copy_patch =
+{
+ .ui32Type = 0xBB,
+ .ui32Length = 0x0912,
+ .ui32CRC = 0x9516,
+ .pui32Data = am_ble_performance_copy_patch_data.words,
+};
+
+//*****************************************************************************
+//
+// Patch Name: RAMCODE PATCH v1.10 for Apollo3 A1
+//
+// Bi-directional data fix
+// Modulation deviation fix
+// Extend patch memory
+// Transmit speed patch
+// Added AGC table and enabled AGC
+// Added local feature support setting
+// Fix to connection interval calculation issue with MTK chip sets (OPPO R15 fix)
+// Set VCO to 250mv
+// Modex auto calibration update
+// Fix connection interval calculation issue
+// Increase RF LDO ref voltage form 1.0v to 1.1v
+// Decrease DAC channel delay cycle
+// Increase the VCO swing from 250mv to 300mv
+// Fix MD trans schedule issue (disabled)
+// Fix link loss issue
+// Reduce duration from TX to TX
+// Optimized 32K XO frequency calculation
+// Fix channel map rejected issue
+// Optimized AGC Table
+// Date: 2019-01-30
+//*****************************************************************************
+
+am_hal_ble_buffer(0x0104) am_ble_performance_patch_data =
+{
+ .bytes =
+ {
+ 0x00,0x11,0x02,0x01,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x01,0xc5,0x01,
+ 0x39,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x1b,0x00,0xa1,0x06,0x1f,0xb5,0x82,0xb0,0x08,0x98,0x00,0x90,
+ 0x02,0xa8,0x0f,0xc8,0x01,0x4c,0xa0,0x47,0x06,0xb0,0x10,0xbd,0x01,0x35,0x00,0x20,
+ 0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x08,0x48,0x80,0x47,0x00,0xbf,0x00,0xbf,
+ 0x02,0x2d,0x05,0xd1,0x06,0x48,0x80,0x47,0x00,0xbf,0x00,0xbf,0x05,0x48,0x80,0x47,
+ 0x00,0x21,0x03,0x9a,0x04,0x98,0x90,0x47,0x03,0x48,0x00,0x47,0x99,0x4a,0x01,0x00,
+ 0x25,0x4b,0x01,0x00,0xaf,0x4a,0x01,0x00,0x8f,0x4c,0x01,0x00,0x00,0x00,0x00,0x00,
+ 0x04,0x48,0x01,0x68,0x28,0x22,0x11,0x43,0x50,0x22,0x91,0x43,0x01,0x60,0x00,0xbf,
+ 0x01,0x48,0x00,0x47,0x00,0x00,0xc0,0x52,0x63,0x2a,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x04,0x48,0x01,0x68,0x50,0x22,0x11,0x43,0x28,0x22,0x91,0x43,0x01,0x60,0x00,0xbf,
+ 0x01,0x48,0x00,0x47,0x00,0x00,0xc0,0x52,0x83,0x2a,0x00,0x00,0x00,0xbf,0x00,0xbf,
+ 0x00,0xbf,0x00,0xbf,0x08,0x98,0x00,0x28,0x01,0xd0,0x01,0x20,0x02,0x90,0x00,0x20,
+ 0x60,0x85,0x01,0x48,0x00,0x47,0x00,0xbf,0xd5,0xed,0x00,0x00,0x00,0xbf,0x00,0xbf,
+ 0x60,0x88,0x00,0x28,0x04,0xd1,0x10,0x7d,0x08,0x28,0x01,0xd3,0x04,0x20,0x10,0x75,
+ 0x02,0x98,0x81,0x79,0x01,0x20,0x01,0x43,0x02,0x98,0x81,0x71,0x00,0x48,0x00,0x47,
+ 0xa5,0xf7,0x00,0x00
+ }
+};
+
+am_hal_ble_patch_t am_ble_performance_patch =
+{
+ .ui32Type = 0xBB,
+ .ui32Length = 0x0104,
+ .ui32CRC = 0x933d,
+ .pui32Data = am_ble_performance_patch_data.words,
+};
+
+//*****************************************************************************
+//
+// Patch Name: Function PATCH v1.10 for Apollo3 A1
+//
+// Bi-directional data fix
+// Modulation deviation fix
+// Extend patch memory
+// Transmit speed patch
+// Added AGC table and enabled AGC
+// Added local feature support setting
+// Fix to connection interval calculation issue with MTK chip sets (OPPO R15 fix)
+// Set VCO to 250mv
+// Modex auto calibration update
+// Fix connection interval calculation issue
+// Increase RF LDO ref voltage form 1.0v to 1.1v
+// Decrease DAC channel delay cycle
+// Increase the VCO swing from 250mv to 300mv
+// Fix MD trans schedule issue (disabled)
+// Fix link loss issue
+// Reduce duration from TX to TX
+// Optimized 32K XO frequency calculation
+// Fix channel map rejected issue
+// Optimized AGC Table
+// Date: 2019-01-30
+//*****************************************************************************
+
+const am_hal_ble_buffer(0x0d38) am_ble_buffer_patch_data =
+{
+ .bytes =
+ {
+ 0x00,0x22,0x38,0x0d,0xff,0xff,0x00,0x00,0x32,0x35,0x09,0x00,0x65,0x39,0x09,0x00,
+ 0x2b,0x45,0x09,0x00,0xa9,0x48,0x09,0x00,0xf7,0x53,0x09,0x00,0x1a,0x5c,0x09,0x00,
+ 0x1c,0x64,0x09,0x00,0xfd,0x6a,0x09,0x00,0x1a,0x75,0x09,0x00,0xde,0x7b,0x09,0x00,
+ 0x4b,0x85,0x09,0x00,0xb3,0x8b,0x09,0x00,0x1f,0x95,0x09,0x00,0x4f,0x9c,0x09,0x00,
+ 0xf5,0xa2,0x09,0x00,0x1e,0xad,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x48,0x00,0x47,
+ 0x41,0x48,0x00,0x20,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x05,0xb0,0xf0,0xbd,0x00,0x00,
+ 0x90,0x67,0x00,0x20,0x10,0x27,0x00,0x00,0x00,0x10,0x00,0x20,0x88,0x13,0x00,0x00,
+ 0x18,0x10,0x00,0x20,0xff,0x03,0x00,0x00,0xff,0xb5,0xff,0xb0,0x82,0xb0,0x07,0x46,
+ 0x0c,0x46,0x16,0x46,0x00,0x25,0x30,0x48,0x06,0x60,0x84,0x99,0x04,0xd0,0xee,0x28,
+ 0x02,0xd0,0x03,0x20,0x60,0x73,0x70,0xbd,0x60,0x7c,0xf1,0x28,0x06,0xd0,0xf2,0x28,
+ 0x04,0xd0,0xf3,0x28,0x02,0xd0,0x02,0x20,0x60,0x73,0x70,0xbd,0x00,0x20,0x60,0x73,
+ 0x70,0xbd,0x00,0x00,0x18,0x10,0x00,0x20,0x0a,0x10,0x00,0x20,0x00,0x48,0x00,0x47,
+ 0x81,0x4d,0x00,0x20,0x70,0x88,0x00,0x28,0x16,0xd1,0x14,0x20,0x01,0x21,0x0b,0x20,
+ 0xed,0xf7,0xc6,0xfc,0x10,0xbd,0x00,0x00,0x00,0x48,0x00,0x47,0x15,0x4e,0x00,0x20,
+ 0x00,0x28,0x02,0xd0,0x08,0x78,0x01,0x28,0x1a,0xd0,0x08,0x78,0x02,0x28,0x17,0xd0,
+ 0x00,0x28,0x0e,0xd0,0x01,0x28,0x0c,0xd0,0xf0,0xf7,0xd9,0xfe,0x00,0x28,0x08,0xd0,
+ 0x00,0xf0,0x16,0xf8,0x32,0x20,0xef,0xf7,0x51,0xf8,0xf0,0xf7,0x80,0xe1,0x00,0xe0,
+ 0x00,0xe1,0x00,0xe0,0x02,0x48,0x01,0x68,0x28,0x22,0x91,0x43,0x01,0x60,0x70,0x47,
+ 0x00,0x00,0xc0,0x52,0x00,0x48,0x00,0x47,0x81,0x48,0x00,0x20,0x01,0x60,0x70,0x47,
+ 0x00,0x00,0xc0,0x52,0x02,0x48,0x01,0x68,0x50,0x22,0x91,0x43,0x01,0x60,0x70,0x47,
+ 0x00,0x00,0xc0,0x52,0x00,0x48,0x00,0x47,0xa1,0x48,0x00,0x20,0xc0,0x40,0x80,0x50,
+ 0x10,0xb5,0x0b,0x46,0x11,0x46,0x02,0x24,0x0c,0x22,0x50,0x43,0x06,0x4a,0x80,0x18,
+ 0x00,0x28,0x06,0xd0,0x42,0x68,0x00,0x2a,0x03,0xd0,0x18,0x46,0x00,0xf0,0x10,0xfb,
+ 0x04,0x46,0x20,0x46,0x10,0xbd,0x00,0x00,0x98,0x56,0x01,0x00,0x00,0x49,0x08,0x47,
+ 0x99,0x4e,0x00,0x20,0xf3,0xf7,0x5c,0xfd,0x7c,0x20,0x00,0x5b,0x0b,0xf8,0x40,0x19,
+ 0xc1,0xb2,0x00,0x29,0x03,0xd0,0x40,0x34,0xa0,0x8f,0xf9,0xf7,0x73,0xfd,0x70,0xbd,
+ 0x01,0x21,0xe1,0xe7,0x00,0x49,0x08,0x47,0x81,0x50,0x00,0x20,0x80,0xf3,0x10,0x88,
+ 0x28,0x46,0xf3,0xf7,0x4d,0xf9,0x00,0x21,0x81,0xf3,0x10,0x88,0x00,0x28,0x0f,0xd0,
+ 0x81,0x88,0x0a,0x46,0x0a,0x3a,0x46,0x2a,0x0c,0xd2,0x64,0x1c,0xd2,0x0b,0xd2,0x03,
+ 0x0a,0x43,0xc2,0x84,0x00,0x20,0x80,0xf3,0x10,0x88,0x70,0x47,0x66,0x04,0x00,0x00,
+ 0x40,0x44,0x80,0x50,0x00,0x49,0x08,0x47,0xed,0x50,0x00,0x20,0x11,0x90,0x80,0x8f,
+ 0x0e,0x90,0x12,0x98,0x08,0x30,0x0d,0x90,0x12,0x98,0x30,0x30,0x0c,0x90,0x12,0x98,
+ 0x44,0x30,0x0b,0x90,0x00,0x20,0x0a,0x90,0x01,0x25,0x0c,0x98,0x07,0xf0,0xa4,0xf8,
+ 0x00,0x28,0x2d,0xd0,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,
+ 0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x91,0xe0,0x0c,0x9a,0xff,0x20,0x22,0x23,
+ 0x11,0x46,0x0a,0x30,0xfd,0xf7,0x9e,0xfb,0x07,0x70,0x61,0x88,0xc1,0x81,0xa1,0x88,
+ 0x01,0x82,0xe1,0x88,0xc1,0x80,0x21,0x89,0x01,0x81,0xa1,0x7a,0xc0,0x01,0x23,0xe0,
+ 0x77,0xe0,0x02,0x98,0x08,0x1a,0x40,0x01,0x40,0x09,0x90,0x42,0x1c,0xd9,0x02,0x98,
+ 0x40,0x1a,0x40,0x01,0x40,0x09,0x40,0x42,0x16,0xe0,0x02,0x98,0x00,0xbf,0x00,0xbf,
+ 0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0x20,
+ 0x0a,0xe0,0x02,0x98,0x38,0x1a,0x40,0x01,0x40,0x09,0x90,0x42,0xc1,0x65,0x75,0x60,
+ 0x60,0x89,0xb8,0x84,0x04,0x9a,0x01,0x20,0x50,0x75,0x60,0x88,0xf8,0x85,0x04,0x9a,
+ 0x60,0x78,0x10,0x75,0x00,0x48,0x00,0x47,0xe1,0x48,0x00,0x20,0x00,0xbf,0x00,0x00,
+ 0x60,0x89,0x3a,0x8d,0x40,0x1e,0x80,0xb2,0x82,0x42,0x03,0xd1,0x08,0x20,0x01,0x43,
+ 0x03,0x98,0x81,0x71,0x07,0xb0,0xf0,0xbd,0x60,0x61,0x00,0x20,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ AM_HAL_BLE_LOCAL_FEATURE,//0x01,
+ 0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,
+ 0xff,0x03,0x00,0x00,0xff,0x00,0x3c,0x1f,0x00,0x00,0x00,0x00,0x01,0x20,0x00,0x00,
+ 0x89,0x7d,0x00,0x00,0x02,0x20,0x00,0x00,0xfd,0x76,0x00,0x00,0x10,0x18,0x00,0x8c,
+ 0xc0,0x0b,0x08,0x9b,0x5b,0x1e,0x18,0x42,0x05,0xd1,0x08,0x98,0x00,0x48,0x00,0x47,
+ 0xc1,0x48,0x00,0x20,0x00,0xbf,0x00,0x00,0x80,0x4b,0xd2,0x18,0x50,0x84,0x01,0x20,
+ 0x80,0xf3,0x10,0x88,0xb8,0x68,0x00,0x28,0x16,0xd0,0x00,0x20,0x00,0x28,0x19,0xd0,
+ 0x38,0x6b,0x00,0x28,0x12,0xd0,0x00,0x20,0x00,0x28,0x13,0xd0,0x9f,0xfc,0x00,0x19,
+ 0x06,0x4b,0x59,0x68,0x09,0x18,0x8a,0x08,0x94,0x00,0x09,0x1b,0x59,0x60,0x41,0x01,
+ 0x08,0x1a,0x80,0x18,0x10,0xbd,0x00,0x00,0x2c,0x60,0x00,0x20,0xb8,0x67,0x00,0x20,
+ 0x00,0x49,0x08,0x47,0x79,0x55,0x00,0x20,0x7d,0x21,0x80,0x6a,0x09,0x02,0x88,0x42,
+ 0x02,0xd3,0x40,0x1a,0x01,0x22,0x00,0xe0,0x08,0x1a,0x00,0x2a,0x29,0x19,0x08,0x1a,
+ 0x21,0x46,0xee,0xf7,0xb1,0xfe,0x88,0xb2,0x70,0xbd,0x28,0x30,0x60,0x30,0x00,0x7e,
+ 0x70,0x47,0x10,0xb4,0x02,0x46,0x40,0x32,0xd3,0x8c,0x06,0x24,0x63,0x43,0x14,0x8d,
+ 0xe3,0x18,0x9b,0xb2,0x93,0x84,0x60,0x30,0x41,0x75,0x18,0x46,0x10,0xbc,0x70,0x47,
+ 0x28,0x30,0x60,0x30,0x40,0x7d,0x00,0x28,0x00,0x20,0x00,0x20,0x40,0x79,0x00,0x07,
+ 0x02,0xd5,0x04,0x20,0x60,0x70,0x34,0xe0,0x28,0x69,0x05,0xf0,0x51,0xfb,0x00,0x28,
+ 0x02,0xd0,0x02,0x20,0x60,0x70,0x2c,0xe0,0x03,0x98,0x03,0xf0,0x4d,0xfe,0x04,0x28,
+ 0x07,0xd1,0x68,0x46,0x01,0x79,0x02,0x20,0x88,0x43,0x05,0xd0,0x00,0x20,0x00,0x28,
+ 0x04,0xd0,0x00,0x20,0x60,0x70,0x1c,0xe0,0x01,0x20,0xf8,0xe7,0x58,0x67,0x00,0x20,
+ 0x40,0x00,0x80,0x50,0xb8,0x67,0x00,0x20,0x00,0x00,0x00,0x04,0xc8,0x67,0x00,0x20,
+ 0x00,0x49,0x08,0x47,0xcd,0x55,0x00,0x20,0x81,0x6a,0x7d,0x20,0x00,0x02,0x81,0x42,
+ 0x02,0xd3,0x08,0x1a,0x01,0x22,0x00,0xe0,0x40,0x1a,0x00,0x2a,0x04,0xd0,0x60,0x43,
+ 0xeb,0xf7,0xa4,0xfc,0x20,0x1a,0x03,0xe0,0x60,0x43,0xeb,0xf7,0xf8,0xb5,0x00,0x24,
+ 0x1c,0x48,0x00,0x78,0x00,0x28,0x2d,0xd1,0x1b,0x4e,0x70,0x68,0x1b,0x4d,0x00,0x28,
+ 0x09,0xda,0x1b,0x4f,0x01,0x21,0x0b,0x20,0xb8,0x47,0x01,0x21,0x0b,0x20,0xa8,0x47,
+ 0x70,0x68,0x00,0x28,0xf6,0xdb,0x00,0x21,0x0b,0x20,0xa8,0x47,0x15,0x4e,0x0a,0x20,
+ 0xb0,0x47,0x05,0x27,0x3f,0x07,0xf8,0x69,0x05,0x05,0x2d,0x0d,0x00,0x2d,0x04,0xd1,
+ 0x11,0x48,0xc0,0x68,0x80,0x05,0x80,0x0e,0x0c,0xd0,0x64,0x2c,0x0a,0xd2,0x14,0x20,
+ 0xb0,0x47,0xf8,0x69,0x00,0x05,0x00,0x0d,0xa8,0x42,0x04,0xd9,0x05,0x46,0x64,0x1c,
+ 0x64,0x2c,0xf4,0xd3,0xf8,0xbd,0x03,0x49,0x01,0x20,0x08,0x70,0x07,0x49,0x08,0x70,
+ 0xf8,0xbd,0x00,0x00,0x01,0x10,0x00,0x20,0x80,0x00,0x80,0x45,0x55,0x24,0x00,0x00,
+ 0x91,0x23,0x00,0x00,0xa1,0x3b,0x00,0x00,0x00,0x00,0xc0,0x52,0x00,0x10,0x00,0x20,
+ 0x10,0xb5,0x18,0x48,0x01,0x68,0x40,0x29,0x01,0xd2,0x40,0x21,0x01,0x60,0x80,0x7a,
+ 0xc0,0x07,0x01,0xd0,0x00,0x20,0x10,0xbd,0x13,0x48,0x80,0x47,0x05,0x20,0x00,0x07,
+ 0xc0,0x69,0x12,0x49,0x00,0x05,0x04,0xd0,0x08,0x78,0x01,0x28,0x14,0xd0,0x02,0x28,
+ 0x12,0xd0,0x08,0x78,0x00,0x28,0x08,0xd0,0x01,0x28,0x06,0xd0,0x02,0x28,0x04,0xd0,
+ 0x0b,0x48,0x80,0x47,0x0b,0x49,0x32,0x20,0x88,0x47,0x0b,0x49,0x04,0x20,0x88,0x47,
+ 0x0a,0x48,0x80,0x47,0x00,0x20,0x10,0xbd,0x09,0x49,0x04,0x20,0x88,0x47,0x01,0x20,
+ 0x10,0xbd,0x00,0x00,0xb8,0x67,0x00,0x20,0x05,0x93,0x00,0x00,0x18,0x10,0x00,0x20,
+ 0x25,0x4b,0x01,0x00,0xa1,0x3b,0x00,0x00,0x41,0x44,0x01,0x00,0xaf,0x4a,0x01,0x00,
+ 0x89,0x44,0x01,0x00,0xf0,0xb5,0x8d,0xb0,0x04,0x46,0x6c,0x49,0x04,0xa8,0x88,0x47,
+ 0x7c,0x20,0x00,0x5b,0x03,0x90,0x00,0x25,0x00,0x20,0x02,0x90,0x01,0x20,0x80,0xf3,
+ 0x10,0x88,0x60,0x6c,0x00,0x21,0x81,0xf3,0x10,0x88,0x26,0x46,0x60,0x36,0x00,0x28,
+ 0x6b,0xd0,0x21,0x46,0x44,0x31,0x0c,0x91,0x28,0x39,0x0b,0x91,0x64,0x31,0x0a,0x91,
+ 0x81,0x88,0xca,0x00,0x5e,0x49,0x51,0x18,0xc9,0x8c,0xc9,0x0b,0x00,0x29,0x5c,0xd0,
+ 0x01,0x21,0x81,0xf3,0x10,0x88,0x00,0x68,0x01,0x90,0x5a,0x49,0x0c,0x98,0x88,0x47,
+ 0x07,0x46,0xe0,0x69,0x00,0x28,0x03,0xd0,0x00,0x20,0x00,0x28,0x02,0xd0,0x08,0xe0,
+ 0x01,0x20,0xfa,0xe7,0x53,0x49,0x0b,0x98,0x88,0x47,0x00,0x28,0x01,0xd0,0x52,0x49,
+ 0x88,0x47,0x00,0x20,0x80,0xf3,0x10,0x88,0xb8,0x88,0x4d,0x49,0xc0,0x00,0x40,0x18,
+ 0xc2,0x8c,0xd2,0x0b,0xd2,0x03,0xc2,0x84,0xb8,0x88,0x07,0x28,0x1e,0xd2,0x30,0x7e,
+ 0x40,0x1e,0x30,0x76,0x01,0x20,0x80,0xf3,0x10,0x88,0x20,0x6b,0x00,0x28,0x13,0xd0,
+ 0x00,0x20,0x00,0x28,0x05,0xd0,0x0a,0x98,0xfb,0x21,0x80,0x79,0x08,0x40,0x0a,0x99,
+ 0x88,0x71,0x41,0x49,0x38,0x46,0x88,0x47,0x00,0x20,0x80,0xf3,0x10,0x88,0x3f,0x4a,
+ 0x39,0x7b,0x03,0x98,0x90,0x47,0x15,0xe0,0x01,0x20,0xea,0xe7,0x09,0x28,0x0f,0xd9,
+ 0xc0,0x00,0x40,0x18,0x00,0x8d,0x00,0x0a,0x00,0x90,0x39,0x49,0x38,0x46,0x88,0x47,
+ 0x00,0x28,0x07,0xd0,0x00,0x98,0x00,0x28,0x04,0xd0,0x6d,0x1c,0xed,0xb2,0x01,0xe0,
+ 0x6d,0x1c,0xed,0xb2,0x01,0x98,0x00,0x28,0x9a,0xd1,0x03,0x98,0x07,0x28,0x0e,0xd0,
+ 0x00,0x2d,0x0c,0xd0,0x01,0x20,0x80,0xf3,0x10,0x88,0x30,0x7e,0x40,0x1b,0x30,0x76,
+ 0x00,0x20,0x80,0xf3,0x10,0x88,0x2b,0x4a,0x29,0x46,0x03,0x98,0x90,0x47,0x01,0x20,
+ 0x80,0xf3,0x10,0x88,0x28,0x48,0x23,0x4f,0x09,0x90,0xb8,0x47,0x04,0x46,0x00,0x20,
+ 0x80,0xf3,0x10,0x88,0x20,0x00,0x36,0xd0,0x1f,0x4e,0xe0,0x88,0x03,0x99,0x88,0x42,
+ 0x12,0xd1,0x07,0x28,0x07,0xd0,0xa1,0x7a,0x00,0x91,0x20,0x4f,0xe3,0x7a,0x22,0x7b,
+ 0x21,0x89,0xb8,0x47,0x05,0xe0,0x1e,0x4b,0x21,0x79,0x20,0x89,0x2a,0x46,0x98,0x47,
+ 0x02,0x90,0x20,0x46,0xb0,0x47,0x03,0xe0,0x1a,0x4a,0x21,0x46,0x04,0xa8,0x90,0x47,
+ 0x01,0x20,0x80,0xf3,0x10,0x88,0x0f,0x49,0x09,0x98,0x88,0x47,0x04,0x46,0x20,0x00,
+ 0x0c,0xd1,0x04,0x98,0x00,0x28,0x03,0xd0,0x00,0x20,0x00,0x28,0x02,0xd0,0x05,0xe0,
+ 0x01,0x20,0xfa,0xe7,0x10,0x4a,0x04,0xa9,0x09,0x98,0x90,0x47,0x00,0x20,0x80,0xf3,
+ 0x10,0x88,0x00,0x2c,0xc9,0xd1,0x02,0x98,0x0d,0xb0,0xf0,0xbd,0xb5,0x38,0x00,0x00,
+ 0x40,0x44,0x80,0x50,0x45,0x39,0x00,0x00,0xa5,0x93,0x00,0x00,0x09,0xb8,0x00,0x00,
+ 0x5d,0x56,0x00,0x00,0x05,0xb7,0x00,0x00,0xb8,0x61,0x00,0x20,0x29,0xb7,0x00,0x00,
+ 0x35,0x22,0x01,0x00,0x67,0x39,0x00,0x00,0x0f,0x39,0x00,0x00,0xf1,0xb5,0x00,0x24,
+ 0x15,0x4d,0x16,0x4e,0x01,0x20,0x80,0xf3,0x10,0x88,0x00,0x98,0xa8,0x47,0x00,0x21,
+ 0x81,0xf3,0x10,0x88,0x00,0x28,0x17,0xd0,0x81,0x88,0x0a,0x46,0x0a,0x3a,0x46,0x2a,
+ 0x14,0xd2,0xc9,0x00,0x89,0x19,0x09,0x8d,0x0f,0x0a,0x01,0x21,0x81,0xf3,0x10,0x88,
+ 0x0b,0x49,0x88,0x47,0x00,0x28,0x03,0xd0,0x00,0x2f,0x01,0xd0,0x64,0x1c,0xe4,0xb2,
+ 0x00,0x20,0x80,0xf3,0x10,0x88,0xdd,0xe7,0x20,0x46,0xf8,0xbd,0xc9,0x1f,0x49,0x29,
+ 0xd8,0xd3,0x04,0x49,0x88,0x47,0xd5,0xe7,0x45,0x39,0x00,0x00,0x40,0x44,0x80,0x50,
+ 0x5d,0x56,0x00,0x00,0xa5,0x93,0x00,0x00,0xf1,0xb5,0x92,0xb0,0x12,0x98,0x40,0x30,
+ 0x11,0x90,0x80,0x8f,0x0e,0x90,0x12,0x98,0x08,0x30,0x0d,0x90,0x12,0x98,0x30,0x30,
+ 0x0c,0x90,0x12,0x98,0x44,0x30,0x0b,0x90,0x00,0x20,0x0a,0x90,0x01,0x25,0x0c,0x98,
+ 0x04,0x68,0x00,0x2c,0x03,0xd0,0x00,0x20,0x00,0x28,0x02,0xd0,0x93,0xe0,0x01,0x20,
+ 0xfa,0xe7,0x0e,0x98,0xc1,0x00,0xf9,0x48,0x08,0x18,0x10,0x90,0xc0,0x8c,0xc0,0x0b,
+ 0x00,0x28,0x6e,0xd0,0x0e,0x98,0xf6,0x49,0x80,0x00,0x0f,0x90,0x08,0x58,0xa0,0x30,
+ 0x46,0x79,0x01,0x20,0x71,0x07,0x19,0xd5,0x00,0x2c,0x17,0xd0,0xf1,0x4f,0xb0,0x06,
+ 0x07,0xd5,0x20,0x7b,0xb8,0x47,0x80,0x07,0x01,0xd4,0x00,0x20,0x06,0xe0,0x01,0x20,
+ 0x04,0xe0,0x20,0x7b,0xb8,0x47,0xc0,0x07,0x03,0xd0,0x01,0x20,0x00,0x28,0x02,0xd0,
+ 0x04,0xe0,0x00,0x20,0xfa,0xe7,0x24,0x68,0x00,0x2c,0xe8,0xd1,0x00,0x28,0x62,0xd0,
+ 0xe5,0x4b,0x00,0x22,0x21,0x46,0x0c,0x98,0x98,0x47,0xa6,0x68,0xe3,0x4a,0x09,0xa9,
+ 0x30,0x46,0x90,0x47,0x00,0x28,0x56,0xd1,0xa0,0x88,0xdc,0x4f,0xc0,0x00,0xc0,0x19,
+ 0x40,0x8d,0xdf,0x49,0x41,0x18,0x00,0x20,0x08,0xaa,0x12,0x79,0x00,0x2a,0x06,0xdd,
+ 0x32,0x5c,0x0a,0x54,0x40,0x1c,0x08,0xaa,0x12,0x79,0x90,0x42,0xf8,0xdb,0xd9,0x49,
+ 0xa0,0x68,0x88,0x47,0xd2,0x49,0x0f,0x98,0x08,0x58,0xa0,0x30,0x40,0x79,0xc0,0x07,
+ 0x03,0xd0,0x08,0xa9,0x08,0x79,0x00,0x1d,0x09,0x90,0x08,0xa8,0x01,0x79,0x10,0x98,
+ 0x02,0x8d,0x09,0x02,0xd2,0xb2,0x0a,0x43,0x02,0x85,0x03,0x21,0x10,0x98,0x02,0x8d,
+ 0x8a,0x43,0x0a,0x43,0x02,0x85,0x11,0x98,0x80,0x8f,0x00,0x21,0xc0,0x00,0xc0,0x19,
+ 0xc1,0x84,0x0b,0x98,0x00,0x68,0x00,0x28,0x04,0xd0,0x00,0x20,0x00,0x28,0x03,0xd0,
+ 0x10,0xe0,0x18,0xe0,0x01,0x20,0xf9,0xe7,0x0b,0x98,0xa1,0x88,0x40,0x68,0xca,0x00,
+ 0xc1,0x49,0x80,0x88,0x51,0x18,0xc0,0x00,0xc0,0x19,0xc2,0x8c,0xd2,0x0b,0xd2,0x03,
+ 0x0a,0x43,0xc2,0x84,0xbd,0x4a,0x21,0x46,0x0b,0x98,0x90,0x47,0x12,0x98,0x60,0x30,
+ 0x01,0x7e,0x49,0x1c,0x01,0x76,0x11,0x98,0x80,0x8f,0x07,0x28,0x08,0xd2,0x0e,0x99,
+ 0x8a,0x00,0xaf,0x49,0x89,0x58,0xa0,0x31,0x49,0x79,0x49,0x07,0x00,0xd5,0x00,0x25,
+ 0x0d,0x99,0x09,0x68,0x00,0x29,0x1f,0xd0,0x00,0x21,0x2a,0x46,0x8a,0x43,0x77,0xd0,
+ 0x07,0x28,0x76,0xd2,0xaf,0x49,0xae,0x48,0x88,0x47,0x09,0x90,0x00,0x20,0x08,0x90,
+ 0x11,0x98,0x80,0x8f,0x81,0x00,0xa2,0x48,0x40,0x58,0xa0,0x30,0x40,0x79,0xc0,0x07,
+ 0xc0,0x0f,0x07,0x90,0x0d,0x98,0x06,0x68,0x00,0x2e,0x09,0xd0,0x0d,0x99,0x30,0x68,
+ 0x08,0x60,0x00,0x28,0x02,0xd0,0x03,0xe0,0x01,0x21,0xde,0xe7,0x0d,0x99,0x48,0x60,
+ 0x00,0x2e,0x7d,0xd0,0x00,0x20,0x06,0x90,0x12,0x98,0x03,0x90,0x06,0xa8,0x04,0x90,
+ 0x07,0x9f,0x09,0x9b,0x05,0x97,0x08,0x25,0x75,0x5f,0x00,0x20,0x02,0x90,0x01,0x90,
+ 0x01,0x20,0x00,0x90,0x11,0x98,0x42,0x8e,0x84,0x46,0xd4,0xb2,0x01,0x20,0x29,0x46,
+ 0x09,0x31,0x89,0xb2,0x05,0x9f,0x00,0x2f,0x01,0xd0,0x09,0x1d,0x89,0xb2,0xc9,0x00,
+ 0x08,0x31,0x89,0xb2,0x67,0x46,0x3f,0x8e,0x8f,0x42,0x05,0xd2,0x50,0x3f,0x79,0x05,
+ 0x0c,0x0e,0xa2,0x42,0x00,0xd2,0xd4,0xb2,0xa5,0x42,0x01,0xdd,0x64,0x08,0x64,0x00,
+ 0x21,0x46,0x6f,0x1a,0x62,0x1c,0x97,0x42,0x05,0xdb,0x09,0x19,0x40,0x1c,0xc0,0xb2,
+ 0x6f,0x1a,0x97,0x42,0xf9,0xda,0x98,0x42,0x01,0xd9,0x00,0x25,0x34,0xe0,0x04,0x99,
+ 0x08,0x70,0x81,0x4f,0x81,0x49,0x7e,0x48,0x88,0x47,0x01,0x46,0x00,0x98,0x00,0x28,
+ 0x12,0xd0,0x00,0x20,0x00,0x90,0xb0,0x7a,0x80,0x07,0x80,0x0f,0x01,0x28,0x09,0xd0,
+ 0x02,0x20,0x88,0x72,0xf0,0x68,0xc2,0x88,0x02,0x92,0x80,0x88,0x01,0x90,0x09,0xe0,
+ 0x62,0xe0,0x58,0xe0,0x01,0x20,0xf4,0xe7,0x01,0x20,0x88,0x72,0x02,0x98,0x00,0x19,
+ 0x80,0xb2,0x02,0x90,0xa5,0x42,0x01,0xdd,0xcc,0x72,0x00,0xe0,0xcd,0x72,0x01,0x98,
+ 0xc8,0x80,0x02,0x98,0x08,0x81,0x28,0x1b,0x05,0xb2,0x00,0x2d,0x22,0xdc,0x01,0x22,
+ 0x05,0x9b,0x03,0x98,0xb8,0x47,0x01,0x25,0x00,0x2d,0x20,0xd0,0x68,0x46,0x00,0x7e,
+ 0x08,0x99,0x09,0x18,0xc9,0xb2,0x08,0x91,0x09,0x99,0x08,0x1a,0x80,0xb2,0x00,0xe0,
+ 0x35,0xe0,0x09,0x90,0x12,0x98,0xc0,0x69,0x00,0x28,0x1a,0xd0,0x12,0x98,0x00,0x6a,
+ 0x06,0x60,0x12,0x98,0x06,0x62,0x00,0x20,0x30,0x60,0x08,0x98,0x0a,0x28,0x13,0xd9,
+ 0x00,0x25,0x24,0xe0,0x00,0x22,0x05,0x9b,0x03,0x98,0xb8,0x47,0xaa,0xe7,0x0d,0x98,
+ 0x00,0x68,0x00,0x28,0x01,0xd1,0x0d,0x99,0x4e,0x60,0x30,0x60,0x0d,0x98,0x06,0x60,
+ 0x15,0xe0,0x12,0x98,0xc6,0x61,0xe4,0xe7,0x0d,0x98,0x06,0x68,0x00,0x2e,0x06,0xd0,
+ 0x0d,0x99,0x30,0x68,0x08,0x60,0x00,0x28,0x01,0xd1,0x0d,0x99,0x48,0x60,0x00,0x2e,
+ 0x00,0xd0,0x4f,0xe7,0x03,0xe0,0x4a,0x4a,0x0d,0x99,0x0b,0x98,0x90,0x47,0x00,0x2d,
+ 0x02,0xd0,0x48,0x49,0x0d,0x98,0x88,0x47,0x0b,0x98,0x00,0x68,0x00,0x28,0x03,0xd0,
+ 0x00,0x20,0x00,0x28,0x02,0xd0,0x4b,0xe0,0x01,0x20,0xfa,0xe7,0x11,0x98,0x80,0x8f,
+ 0x07,0x28,0x45,0xd2,0x12,0x98,0x80,0x30,0xc0,0x78,0x04,0x28,0x40,0xd1,0x3b,0x49,
+ 0x37,0x48,0x88,0x47,0x00,0x28,0x3b,0xd0,0x82,0x88,0x00,0x21,0x2b,0x4b,0xd2,0x00,
+ 0xd2,0x18,0x51,0x85,0x81,0x88,0xc9,0x00,0xc9,0x18,0x8a,0x8d,0x54,0x04,0x64,0x0c,
+ 0x00,0x22,0x8c,0x85,0x81,0x88,0xc9,0x00,0xc9,0x18,0x0c,0x8d,0xe4,0xb2,0x0c,0x85,
+ 0x81,0x88,0x01,0x24,0xc9,0x00,0xc9,0x18,0x0d,0x8d,0xad,0x08,0xad,0x00,0x25,0x43,
+ 0x0d,0x85,0x81,0x88,0xc9,0x00,0xc9,0x18,0xcc,0x8c,0xe4,0x0b,0xe4,0x03,0xcc,0x84,
+ 0x0b,0x99,0x84,0x88,0x49,0x68,0xe5,0x00,0x1f,0x4c,0x89,0x88,0x2c,0x19,0xc9,0x00,
+ 0xc9,0x18,0xcb,0x8c,0xdb,0x0b,0xdb,0x03,0x23,0x43,0xcb,0x84,0x0b,0x99,0x09,0x68,
+ 0x00,0x29,0x0d,0xd0,0x0b,0x99,0x49,0x68,0x08,0x60,0x0b,0x99,0x48,0x60,0x02,0x60,
+ 0x0b,0x98,0x00,0x68,0x00,0x28,0x06,0xd0,0x00,0x21,0x00,0x29,0x05,0xd0,0x3c,0xe0,
+ 0x0b,0x99,0x08,0x60,0xf1,0xe7,0x01,0x21,0xf7,0xe7,0x00,0x28,0x0a,0xd0,0x07,0x4a,
+ 0x81,0x88,0xc9,0x00,0x89,0x18,0xc9,0x8c,0xc9,0x0b,0x00,0x29,0x24,0xd0,0x00,0x68,
+ 0x00,0x28,0xf5,0xd1,0x00,0x28,0x26,0xd0,0x27,0xe0,0x00,0x00,0x40,0x44,0x80,0x50,
+ 0x60,0x61,0x00,0x20,0x81,0xaf,0x00,0x00,0x17,0x38,0x00,0x00,0x41,0x03,0x01,0x00,
+ 0x00,0x40,0x80,0x50,0xa5,0x93,0x00,0x00,0x66,0x04,0x00,0x00,0x67,0x39,0x00,0x00,
+ 0xe4,0x61,0x00,0x20,0xbb,0x39,0x00,0x00,0x11,0x00,0x01,0x00,0x45,0x39,0x00,0x00,
+ 0x0f,0x39,0x00,0x00,0xb5,0x38,0x00,0x00,0x81,0x88,0xca,0x00,0x07,0x49,0x51,0x18,
+ 0x89,0xb2,0x0a,0x91,0xd6,0xe7,0x00,0x20,0x0a,0x90,0x0a,0x99,0x0e,0x98,0x5a,0x22,
+ 0x50,0x43,0x03,0x4a,0x80,0x18,0x81,0x84,0x13,0xb0,0xf0,0xbd,0x66,0x04,0x00,0x00,
+ 0x80,0x40,0x80,0x50,0x10,0xb4,0x00,0x23,0x14,0x21,0x02,0x46,0x4a,0x43,0x11,0x49,
+ 0x7d,0x24,0x09,0x68,0x24,0x02,0xa1,0x42,0x02,0xd9,0x09,0x1b,0x01,0x23,0x00,0xe0,
+ 0x61,0x1a,0x48,0x43,0x81,0x00,0x41,0x18,0x88,0x0a,0x0c,0x0c,0x00,0x19,0x4c,0x0c,
+ 0x00,0x19,0x4c,0x0d,0x00,0x19,0x4c,0x0e,0x00,0x19,0xc9,0x0f,0x40,0x18,0xc0,0x08,
+ 0x00,0x2b,0x01,0xd0,0x10,0x18,0x01,0xe0,0x10,0x1a,0x40,0x1e,0x40,0x1e,0x10,0xbc,
+ 0x70,0x47,0x00,0x00,0x54,0x60,0x00,0x20,0xf0,0xb4,0x00,0x23,0x18,0x4c,0xe5,0x6b,
+ 0x18,0x49,0x7d,0x22,0x09,0x68,0x12,0x02,0x91,0x42,0x02,0xd3,0x8a,0x1a,0x01,0x23,
+ 0x00,0xe0,0x52,0x1a,0x06,0x46,0x56,0x43,0xf2,0x13,0x51,0x43,0x71,0x1a,0x1e,0x26,
+ 0x4e,0x43,0x4f,0x10,0xf6,0x19,0x8f,0x11,0xf6,0x19,0x49,0x12,0x71,0x18,0xce,0x13,
+ 0x00,0x2b,0x01,0xd0,0x80,0x1a,0x00,0xe0,0x10,0x18,0x42,0x19,0x91,0x08,0x8d,0x00,
+ 0x52,0x1b,0x00,0x2b,0x04,0xd0,0x43,0x01,0x18,0x1a,0x40,0x18,0x80,0x1b,0x03,0xe0,
+ 0x43,0x01,0x18,0x1a,0x40,0x18,0x80,0x19,0xe2,0x63,0xf0,0xbc,0x70,0x47,0x00,0x00,
+ 0x80,0x67,0x00,0x20,0x54,0x60,0x00,0x20
+ }
+};
+
+am_hal_ble_patch_t am_ble_buffer_patch =
+{
+ .ui32Type = 0xCC,
+ .ui32Length = 0x0d38,
+ .ui32CRC = 0xf515,
+ .pui32Data = am_ble_buffer_patch_data.words,
+};
+
+//*****************************************************************************
+//
+// Patch Name: NVDS v1.10 for Apollo3 A1
+//
+// Bi-directional data fix
+// Modulation deviation fix
+// Extend patch memory
+// Transmit speed patch
+// Added AGC table and enabled AGC
+// Added local feature support setting
+// Fix to connection interval calculation issue with MTK chip sets (OPPO R15 fix)
+// Set VCO to 250mv
+// Modex auto calibration update
+// Fix connection interval calculation issue
+// Increase RF LDO ref voltage form 1.0v to 1.1v
+// Decrease DAC channel delay cycle
+// Increase the VCO swing from 250mv to 300mv
+// Fix MD schedule issue (disabled)
+// Fix link loss issue
+// Reduce duration from TX to TX
+// Optimized power consumption (32K clock drift,sleep clock accuracy,,advertising interval (undirect))
+// Date: 2019-01-30
+//
+//*****************************************************************************
+am_hal_ble_buffer(0x00be) am_ble_buffer_nvds_data =
+{
+ .bytes =
+ {
+ 0x4e,0x56,0x44,0x53, //NVDS_MAGIC_NUMBER
+ 0x01,0x06,0x06,0xef,0xab,0x23,0x88,0x77,0x56, //bluetooth address
+ 0x02,0x06,0x0a,0x4e,0x5a,0x38,0x38,0x30,0x31,0x56,0x31,0x41,0x00, //device name
+ 0x03,0x06,0x01,0x00, //system clock frequency, 00=32MHz 01=24MHz others=16MHz
+ 0x07,0x06,0x02,0x00,0x00, //32K clock drift, 0x01f4 = 500 ppm
+ 0x0c,0x06,0x02,50,0x00, //sleep clock accuracy, 0x01f4 = 500 ppm
+ 0x08,0x06,0x01,0x00, //01 for BQB qualification, 00 for normal usage
+ 0x09,0x06,0x01,0x02, //clock source selection, 00 = internal RC32KHz, 02= use Apollo3 MCU 32.768KHz
+ 0x0a,0x06,0x04,0x00,0x00,0x00,0x00, //eb 0x00000000 = auto detect and low frequency clock calibration
+ 0x0b,0x06,0x01,0x96, //rx_ifs 0x96 = 150us
+ 0x23,0x06,0x01,0x95, //tx_ifs 0x95 = 149us
+ 0x0d,0x06,0x02,0xe8,0x03, //duration allowed for XO32M stabilization from external wakeup signal
+ 0x0e,0x06,0x02,0xe8,0x03, //duration allowed for XO32M stabilization from internal wakeup signal
+ 0x0f,0x06,0x02,0x2c,0x01, //duration allowed for radio to leave low power mode
+ 0x10,0x06,0x04,0x00,0xc2,0x01,0x00, //set UART_BAUDRATE
+ 0x11,0x06,0x01,0x01, //sleep algorithm enabled
+ 0x12,0x06,0x01,0x01, //external wake-up support
+ 0x13,0x06,0x02,0xf4,0x01, //duration of sleep and wake-up algorithm
+ 0x14,0x06,0x02,0xAC,0x09, // Ambiq's Company Identifier
+ 0x15,0x06,0x01,0x09, //BLE major version, support BLE 5.0
+ 0x16,0x06,0x01,0x03, //BLE minor version
+ 0x17,0x06,0x01,0x29, //BLE SW version build
+ 0x18,0x06,0x02,0xdc,0x05, //advertising interval (undirect)
+ 0x19,0x06,0x02,0xe2,0x04, //advertising interval (direct)
+ 0x20,0x06,0x01,0x01, //agc switch
+ 0x21,0x06,0x01,0x02, //EA programming latency
+ 0x22,0x06,0x01,0x00, //EA asap latency
+ 0x24,0x06,0x04,0x42,0x02,0x60,0x09, //radio TRX timing
+ 0x25,0x06,0x01,0x11, //modem polarity setting
+ 0x26,0x06,0x01,0x00, //modem sync setting
+ 0x27,0x06,0x01,0x02, //BLE reset delay
+ 0x2d,0x06,0x01,0x00, //2 byte mode switch, 01 to enable
+ 0x28,0x06,0x02,0xf6,0x3f, //initial agc gain setting
+ 0x29,0x06,0x01,0x0f, //initial Tx output power, 0x0f is +4dBm
+ 0x35,0x06,0x01,0x08, //maximum Tx ouput power setting
+ 0x37,0x06,0x01,0x00, //RC32K calibration control, 0xAA to enable
+ 0x05,0x06,0x02,0x34,0x00, //no use
+ 0x04,0x06,0x01,0x20, //internal dvdd voltage level control if using 0.9V from MCU side
+ 0x00,0x00,0x00,0x00 //dummy
+ }
+};
+
+am_hal_ble_patch_t am_ble_nvds_patch =
+{
+ .ui32Type = 0xDD,
+ .ui32Length = 0x00be,
+ .ui32CRC = 0x7e77,
+ .pui32Data = am_ble_buffer_nvds_data.words,
+};
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.h
similarity index 62%
copy from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h
copy to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.h
index c381b0f..d59246f 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch.h
@@ -1,30 +1,37 @@
//*****************************************************************************
//
-//! @file am_util_id.h
+//! @file am_hal_ble_patch.h
//!
-//! @brief Identification of the Ambiq Micro device.
+//! @brief This is a binary patch for the BLE core.
+//!
+//! @addtogroup
+//! @ingroup
+//! @{
//
//*****************************************************************************
//*****************************************************************************
//
-// Copyright (c) 2017, Ambiq Micro
+// Copyright (c) 2021, Ambiq Micro, Inc.
// All rights reserved.
-//
+//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
-//
+//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
-//
+//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
-//
+//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
-//
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -37,13 +44,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
-// This is part of revision v1.2.10-2-gea660ad-hotfix2 of the AmbiqSuite Development Package.
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
//
//*****************************************************************************
-#ifndef AM_UTIL_ID_H
-#define AM_UTIL_ID_H
-#include "hal/am_hal_mcuctrl.h"
+#ifndef AM_HAL_BLE_PATCH_H
+#define AM_HAL_BLE_PATCH_H
#ifdef __cplusplus
extern "C"
@@ -52,73 +58,48 @@ extern "C"
//*****************************************************************************
//
-//! ID structure
+// Patch array pointer.
//
//*****************************************************************************
-typedef struct
-{
- //
- //! Contains the HAL hardware information about the device.
- //
- am_hal_mcuctrl_device_t sMcuCtrlDevice;
-
- //
- //! Device type (derived value, not a hardware value)
- //
- uint32_t ui32Device;
-
- //
- //! Vendor name from the MCUCTRL VENDORID register and stringized here.
- //
- const uint8_t *pui8VendorName;
-
- //
- //! Device name (derived value, not a hardware value)
- //
- const uint8_t *pui8DeviceName;
-
- //
- // Major chip revision (e.g. char 'A' or 'B')
- //
- uint8_t ui8ChipRevMaj;
-
- //
- // Minor chip revision (e.g. char '0', '1', ' ')
- //
- uint8_t ui8ChipRevMin;
-}
-am_util_id_t;
+extern am_hal_ble_patch_t **am_hal_ble_default_patches;
+extern am_hal_ble_patch_t **am_hal_ble_default_copy_patches;
+extern const uint32_t am_hal_ble_num_default_patches;
//*****************************************************************************
//
-// Macros for MCUCTRL CHIP_INFO field.
-// Note - these macros are derived from the Apollo2 auto-generated register
-// definitions.
+// Pointers for specific patches.
//
//*****************************************************************************
-#define AM_UTIL_MCUCTRL_CHIP_INFO_PARTNUM_APOLLO2 0x03000000
-#define AM_UTIL_MCUCTRL_CHIP_INFO_PARTNUM_APOLLO 0x01000000
-#define AM_UTIL_MCUCTRL_CHIP_INFO_PARTNUM_PN_M 0xFF000000
+extern am_hal_ble_patch_t am_ble_performance_patch;
+extern am_hal_ble_patch_t am_ble_nvds_patch;
//*****************************************************************************
//
-// Macros for silicon identification
+// Default patch structure.
//
//*****************************************************************************
-#define AM_UTIL_ID_UNKNOWN 0
-#define AM_UTIL_ID_APOLLO 1
-#define AM_UTIL_ID_APOLLO2 2
+extern am_hal_ble_patch_t g_AMBLEDefaultPatch;
//*****************************************************************************
//
-// External function definitions
+// Macros for accessing specific NVDS parameters.
//
//*****************************************************************************
-extern uint32_t am_util_id_device(am_util_id_t *psIDDevice);
+#define AM_HAL_BLE_NVDS_CLOCKDRIFT_OFFSET 30
+#define AM_HAL_BLE_NVDS_SLEEPCLOCKDRIFT_OFFSET 35
+#define AM_HAL_BLE_NVDS_CLOCKSOURCE_OFFSET 44
+#define AM_HAL_BLE_NVDS_SLEEPENABLE_OFFSET 85
+#define AM_HAL_BLE_NVDS_AGC_OFFSET 125
#ifdef __cplusplus
}
#endif
-#endif // AM_UTIL_ID_H
+#endif // AM_HAL_BLE_PATCH_H
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch_b0.c b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch_b0.c
new file mode 100644
index 0000000..bad5444
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch_b0.c
@@ -0,0 +1,778 @@
+//*****************************************************************************
+//
+//! @file am_hal_ble_patch_b0.c
+//!
+//! @brief This is a binary patch for the BLE core.
+//!
+//! @addtogroup
+//! @ingroup
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#include "am_mcu_apollo.h"
+
+
+//*****************************************************************************
+//
+// BLE LL local supported feature flags.
+//
+// Bit position | Link Layer Feature
+// 0 | LE Encryption
+// 1 | Connection Parameters Request Procedure
+// 2 | Extended Reject Indication
+// 3 | Slave-initiated Features Exchange
+// 4 | LE Ping
+// 5 | LE Data Packet Length Extension
+// 6 | LL Privacy
+// 7 | Extended Scanner Filter Policies
+//
+// Specified 4.6 Feature Support, Link Layer Specification, Core V4.2.
+//
+//*****************************************************************************
+#ifndef AM_HAL_BLE_LOCAL_FEATURE
+#define AM_HAL_BLE_LOCAL_FEATURE 0x21
+#endif
+
+
+
+//*****************************************************************************
+//
+// Patches included in this file.
+//
+//*****************************************************************************
+am_hal_ble_patch_t am_ble_buffer_patch_b0;
+am_hal_ble_patch_t am_ble_performance_patch_b0;
+am_hal_ble_patch_t am_ble_nvds_patch_b0;
+
+//*****************************************************************************
+//
+// Patch application order.
+//
+//*****************************************************************************
+am_hal_ble_patch_t *am_hal_ble_default_patch_array_b0[] =
+{
+ // FTCODE patches (type 0xAA)
+
+ // RAMCODE patches (type 0xBB)
+ &am_ble_performance_patch_b0,
+
+ // Standard patches (type 0xCC)
+ &am_ble_buffer_patch_b0,
+
+ // nvds param (type 0xDD)
+ &am_ble_nvds_patch_b0,
+};
+
+#define AM_HAL_BLE_NUM_DEFAULT_PATCHES_B0 \
+ (sizeof(am_hal_ble_default_patch_array_b0) / \
+ sizeof(am_hal_ble_default_patch_array_b0[0]))
+
+am_hal_ble_patch_t **am_hal_ble_default_patches_b0 = am_hal_ble_default_patch_array_b0;
+const uint32_t am_hal_ble_num_default_patches_b0 = AM_HAL_BLE_NUM_DEFAULT_PATCHES_B0;
+
+//*****************************************************************************
+//
+// Patch Name: RAMCODE PATCH v0.6 for Apollo3 B0
+
+// Reduce duration from TX to TX
+// Optimized 32K XO frequency calculation
+// Optimized AGC Table
+// Fixed Channelmap indication rejected issue
+// Fixed 800M Spur
+// Fixed feature issue
+// Fixed disconnect issue //long time large data transfer
+// Date: 2019-10-25
+//*****************************************************************************
+//*****************************************************************************
+// Fixed Sweyntooth security issues
+// Fixed channel number less than 2 during channel map update
+// Added protection for certain tx buffer list operation
+// Disabled interrupt during AES operation
+// Fixed interrupt nested disable/restore issues
+// Date: 2020-04-27
+//*****************************************************************************
+//*****************************************************************************
+// Improved instant past issue 0x28
+// Improved disconnet response timout issue 0x22
+// Date: 2020-08-23
+//*****************************************************************************
+//*****************************************************************************
+// Fixed RD_REM_FEATURE issue when controller is busy
+// Improved RD_RSSI
+// Date: 2020-09-01
+//*****************************************************************************
+//*****************************************************************************
+// Improved the hci send data(slave->host) process.
+// Date: 2020-10-20
+//*****************************************************************************
+//*****************************************************************************
+// Improved DHKey generation procedure.
+// Improved connection parameter request procedure.
+// Date: 2020-12-14
+//*****************************************************************************
+//*****************************************************************************
+// Optimize process for LLCP packet with invalid length.
+// Optimize process when receiving invalid parameter of LL_LEN_RSP.
+// Date: 2021-01-07
+//*****************************************************************************
+//*****************************************************************************
+// Fixed No GATT response message during pairing issue
+// Date: 2021-05-30
+//*****************************************************************************
+//*****************************************************************************
+// Fixed master mode connection issue
+// Date: 2021-07-19
+//*****************************************************************************
+//*****************************************************************************
+// Fixed No response to LL_ENC_REQ issue
+// Date: 2021-08-10
+//*****************************************************************************
+
+//*****************************************************************************
+// Optimize process when receiving invalid parameter of LL_LEN_REQ.
+// Date: 2021-09-13
+//*****************************************************************************
+
+//*****************************************************************************
+// Fixed RF sync error issue on some channels when doing DTM test
+// Date: 2021-09-14
+//*****************************************************************************
+
+ am_hal_ble_buffer(0x12b4)am_ble_performance_patch_data_b0 =
+{
+ .bytes =
+ {
+ 0x00,0x11,0xb0,0x12,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x01,0xc5,0x01,
+ 0x39,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x01,0x01,0x85,0x36,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x48,
+ 0x00,0x10,0x00,0x06,0x1f,0xb5,0x00,0x24,0x00,0x99,0x12,0x29,0x45,0xd0,0x0e,0xdc,
+ 0x2f,0xd2,0x08,0x00,0x78,0x44,0x00,0x79,0x00,0x18,0x87,0x44,0x2f,0x2c,0x2c,0x2c,
+ 0x2c,0x2c,0x2c,0x2c,0x34,0x2c,0x2c,0x2c,0x2c,0x2c,0x2c,0x2c,0x3b,0x2c,0x1c,0x29,
+ 0x42,0xd0,0x0c,0xdc,0x13,0x39,0x09,0x29,0x1b,0xd2,0x08,0x00,0x78,0x44,0x00,0x79,
+ 0x00,0x18,0x87,0x44,0x18,0x18,0x18,0x18,0x2d,0x18,0x30,0x33,0x18,0x00,0x6c,0x29,
+ 0x49,0xd0,0x08,0xdc,0x1d,0x29,0x35,0xd0,0x21,0x29,0x35,0xd0,0x5b,0x29,0x3c,0xd0,
+ 0x5e,0x29,0x06,0xd1,0x34,0xe0,0x79,0x29,0x4c,0xd0,0x7a,0x29,0x59,0xd0,0x7b,0x29,
+ 0x01,0xd0,0x00,0x24,0xe4,0x43,0x20,0x46,0x04,0xb0,0x10,0xbd,0x01,0x98,0xc0,0xb2,
+ 0x00,0xf0,0xfa,0xf8,0xf7,0xe7,0x06,0x9b,0x03,0x9a,0x02,0x99,0x01,0x98,0x01,0xf0,
+ 0x77,0xf8,0xf0,0xe7,0x00,0xf0,0x60,0xf8,0xed,0xe7,0x00,0xf0,0xc5,0xff,0xea,0xe7,
+ 0x00,0xf0,0x1e,0xfb,0xe7,0xe7,0x00,0xf0,0x75,0xfb,0xe4,0xe7,0x01,0x98,0xc0,0xb2,
+ 0x00,0xf0,0xb6,0xf9,0x04,0x46,0xde,0xe7,0x01,0x98,0xc0,0xb2,0x00,0xf0,0x78,0xff,
+ 0x04,0x46,0xd8,0xe7,0x00,0xf0,0x40,0xfa,0x00,0xf0,0x2c,0xff,0x04,0x46,0xd2,0xe7,
+ 0x01,0x98,0x00,0xf0,0x07,0xfe,0x04,0x46,0xcd,0xe7,0x02,0x98,0xc1,0xb2,0x01,0x98,
+ 0x00,0xf0,0x40,0xfe,0xc7,0xe7,0x03,0x98,0x00,0x28,0x01,0xd0,0x01,0x22,0x00,0xe0,
+ 0x00,0x22,0x02,0x98,0x06,0x9b,0x81,0xb2,0x01,0x98,0x80,0xb2,0x00,0xf0,0x02,0xfc,
+ 0x04,0x46,0xb8,0xe7,0x03,0x98,0x00,0x28,0x01,0xd0,0x01,0x22,0x00,0xe0,0x00,0x22,
+ 0x02,0x98,0x06,0x9b,0x81,0xb2,0x01,0x98,0x80,0xb2,0x00,0xf0,0x73,0xfc,0x04,0x46,
+ 0xa9,0xe7,0x03,0x98,0x00,0x28,0x01,0xd0,0x01,0x22,0x00,0xe0,0x00,0x22,0x02,0x98,
+ 0x06,0x9b,0x81,0xb2,0x01,0x98,0x80,0xb2,0x00,0xf0,0x02,0xfd,0x04,0x46,0x9a,0xe7,
+ 0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x01,0x01,0x00,0x00,0x03,0xb4,0x01,0x48,
+ 0x01,0x90,0x01,0xbd,0x55,0x01,0x00,0x00,0xf0,0xb4,0x00,0x20,0x43,0x27,0x3f,0x06,
+ 0x79,0x68,0xff,0x24,0x01,0x34,0x21,0x43,0x79,0x60,0x79,0x68,0x22,0x03,0x11,0x43,
+ 0x79,0x60,0xa3,0x21,0xc9,0x05,0x0a,0x68,0x52,0x08,0x52,0x00,0x0a,0x60,0x34,0x49,
+ 0x09,0x69,0xcd,0xb2,0x33,0x49,0x09,0x78,0xc9,0x07,0xc9,0x0f,0x0a,0x05,0x0b,0x02,
+ 0x00,0x2d,0x06,0xd0,0x30,0x49,0x31,0x4e,0x09,0x88,0xb1,0x42,0x0d,0xd3,0x04,0x20,
+ 0x19,0xe0,0x78,0x68,0x01,0x21,0x09,0x05,0x88,0x43,0x10,0x43,0x78,0x60,0x78,0x68,
+ 0xa0,0x43,0x18,0x43,0x78,0x60,0xf0,0xbc,0x70,0x47,0x29,0x4e,0xb1,0x42,0x01,0xd3,
+ 0x03,0x20,0x08,0xe0,0x27,0x4e,0xb1,0x42,0x01,0xd3,0x02,0x20,0x03,0xe0,0x26,0x4e,
+ 0xb1,0x42,0x00,0xd3,0x01,0x20,0x25,0x4e,0x31,0x18,0x20,0x31,0x09,0x7e,0xa9,0x42,
+ 0x09,0xda,0x00,0x28,0x01,0xdd,0x40,0x1e,0x40,0xb2,0x31,0x18,0x09,0x7a,0x40,0x00,
+ 0x80,0x19,0x00,0x8b,0x0b,0xe0,0x04,0x28,0x04,0xda,0x31,0x5c,0xa9,0x42,0x01,0xdb,
+ 0x40,0x1c,0x40,0xb2,0x31,0x18,0x09,0x7a,0x40,0x00,0x80,0x19,0x00,0x8b,0x18,0x4d,
+ 0x29,0x62,0xa3,0x25,0xed,0x05,0x29,0x68,0x49,0x08,0x49,0x00,0x29,0x60,0x15,0x4e,
+ 0x31,0x6b,0xff,0x24,0x01,0x34,0x0c,0x43,0x34,0x63,0xa8,0x62,0xff,0x24,0x01,0x34,
+ 0xa1,0x43,0x31,0x63,0x08,0x49,0x08,0x80,0x78,0x68,0x21,0x03,0x88,0x43,0x10,0x43,
+ 0x78,0x60,0x78,0x68,0x09,0x13,0x88,0x43,0x18,0x43,0x78,0x60,0xf0,0xbc,0x70,0x47,
+ 0x80,0x00,0x80,0x45,0x3a,0x68,0x00,0x20,0x50,0x68,0x00,0x20,0xf6,0x3f,0x00,0x00,
+ 0xf6,0x38,0x00,0x00,0xf6,0x2d,0x00,0x00,0xf6,0x09,0x00,0x00,0x50,0x6e,0x00,0x20,
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+ 0x01,0x43,0x21,0x48,0x81,0x62,0x60,0x68,0xff,0x21,0x01,0x31,0x08,0x43,0x60,0x60,
+ 0x1e,0x48,0x1f,0x4a,0x00,0x78,0xc3,0x07,0xdb,0x0f,0x53,0x61,0xc0,0x06,0xc0,0x0f,
+ 0x90,0x61,0x1c,0x48,0x1c,0x4a,0x00,0x88,0x90,0x42,0x01,0xd0,0x1b,0x4a,0x50,0x62,
+ 0x1b,0x48,0x02,0x78,0x1b,0x48,0x00,0x2a,0x01,0xd0,0x01,0x22,0x82,0x60,0x1a,0x4a,
+ 0x12,0x78,0x00,0x2a,0x05,0xd0,0x45,0x62,0x18,0x4b,0x26,0x22,0x1a,0x61,0x02,0x22,
+ 0xc2,0x62,0x60,0x68,0x88,0x43,0x31,0x78,0xc9,0x07,0xc9,0x0d,0x08,0x43,0x60,0x60,
+ 0x70,0xbd,0x00,0x00,0x40,0x00,0x80,0x45,0xe5,0x3e,0x00,0x00,0xd3,0x60,0x01,0x00,
+ 0xcc,0x34,0x63,0x04,0x74,0x68,0x00,0x20,0x3a,0x68,0x00,0x20,0x41,0x68,0x00,0x20,
+ 0x00,0x00,0x40,0x52,0x50,0x68,0x00,0x20,0x00,0x01,0x80,0x50,0x35,0x68,0x00,0x20,
+ 0x40,0x04,0xc0,0x50,0x52,0x68,0x00,0x20,0xff,0x0f,0x00,0x00,0x80,0x04,0xc0,0x50,
+ 0x39,0x68,0x00,0x20,0x00,0x04,0xc0,0x50,0x36,0x68,0x00,0x20,0xc0,0x04,0xc0,0x50,
+ 0xff,0xb5,0xff,0xb0,0x82,0xb0,0x05,0x46,0x0c,0x46,0x00,0x27,0x2d,0x49,0x02,0x20,
+ 0x88,0x47,0x2d,0x48,0x80,0x47,0x2d,0x48,0x80,0x47,0x2d,0x48,0x80,0x47,0x2d,0x48,
+ 0x2d,0x4b,0x00,0x78,0x2d,0x4e,0x00,0x28,0x02,0xd0,0x01,0x28,0x08,0xd0,0x1e,0xe0,
+ 0x64,0x1e,0xa7,0xb2,0x28,0x78,0xb0,0x61,0x39,0x46,0x68,0x1c,0x98,0x47,0x16,0xe0,
+ 0x69,0x46,0x0c,0x70,0x20,0x0a,0x48,0x70,0x00,0x22,0x68,0x46,0x00,0x2c,0x06,0xd9,
+ 0xa9,0x5c,0x87,0x18,0xb9,0x70,0x52,0x1c,0x92,0xb2,0xa2,0x42,0xf8,0xd3,0x64,0x1c,
+ 0xa7,0xb2,0x69,0x46,0x09,0x78,0xb1,0x61,0x39,0x46,0x40,0x1c,0x98,0x47,0x78,0x07,
+ 0x40,0x0f,0xf1,0x68,0x09,0x07,0x09,0x0f,0x81,0x42,0xfa,0xd3,0x18,0x49,0x0a,0x20,
+ 0x88,0x47,0x18,0x48,0x80,0x47,0x18,0x48,0x81,0x68,0x89,0x07,0xfc,0xd5,0x70,0x68,
+ 0x80,0x07,0xfc,0xd5,0x08,0x20,0x70,0x60,0x00,0x20,0xb0,0x61,0x13,0x48,0x80,0x47,
+ 0x13,0x48,0x80,0x47,0x83,0x9a,0x00,0x21,0x84,0x98,0x90,0x47,0x11,0x48,0x00,0x78,
+ 0x00,0x28,0x03,0xd1,0x12,0x4a,0x10,0x49,0x10,0x48,0x90,0x47,0x7f,0xb0,0x06,0xb0,
+ 0xf0,0xbd,0x00,0x00,0xa1,0x59,0x01,0x00,0xbd,0x60,0x01,0x00,0xe9,0x5f,0x00,0x00,
+ 0xad,0x2d,0x00,0x00,0x3e,0x68,0x00,0x20,0x09,0x43,0x00,0x00,0x00,0x00,0xc0,0x52,
+ 0xe5,0x3e,0x00,0x00,0x09,0x62,0x01,0x00,0xc0,0x02,0x00,0x50,0x9d,0x2d,0x00,0x00,
+ 0xf5,0x61,0x01,0x00,0x01,0x10,0x00,0x20,0xff,0x03,0x00,0x00,0x18,0x10,0x00,0x20,
+ 0x85,0x42,0x00,0x00
+ }
+};
+
+am_hal_ble_patch_t am_ble_performance_patch_b0 =
+{
+ .ui32Type = 0xBB,
+ .ui32Length = 0x12b4,
+ .ui32CRC = 0x36f5,
+ .pui32Data = am_ble_performance_patch_data_b0.words,
+};
+
+
+//*****************************************************************************
+
+
+
+//*****************************************************************************
+//
+// Patch Name: Function PATCH v0.4 for Apollo3 B0
+//
+// Reduce duration from TX to TX
+// Optimized 32K XO frequency calculation
+// Optimized AGC Table
+// Fixed Channelmap indication rejected issue
+// Fixed 800M Spur
+// Fixed feature issue
+// Fixed disconnect issue //long time large data transfer
+// Date: 2019-10-25
+//*****************************************************************************
+//*****************************************************************************
+// Fixed Sweyntooth security issues
+// Fixed channel number less than 2 during channel map update
+// Added protection for certain tx buffer list operation
+// Disabled interrupt during AES operation
+// Fixed interrupt nested disable/restore issues
+// Date: 2020-04-27
+//*****************************************************************************
+//*****************************************************************************
+// Improved instant past issue 0x28
+// Improved disconnet response timout issue 0x22
+// Date: 2020-08-23
+//*****************************************************************************
+//*****************************************************************************
+// Fixed RD_REM_FEATURE issue when controller is busy
+// Improved RD_RSSI
+// Date: 2020-09-01
+//*****************************************************************************
+
+//*****************************************************************************
+// Fixed can't enter sleep when no RF task (stop advertising)
+// Date: 2020-12-03
+//*****************************************************************************
+
+//*****************************************************************************
+// Improved DHKey generation procedure.
+// Improved connection parameter request procedure.
+// Date: 2020-12-14
+//*****************************************************************************
+
+//*****************************************************************************
+// Optimize process for LLCP packet with invalid length.
+// Optimize process when receiving invalid parameter of LL_LEN_RSP.
+// Date: 2021-01-07
+//*****************************************************************************
+//*****************************************************************************
+// Fixed No GATT response message during pairing issue
+// Date: 2021-05-30
+//*****************************************************************************
+
+//*****************************************************************************
+// Fixed master mode connection issue
+// Date: 2021-07-19
+//*****************************************************************************
+//*****************************************************************************
+// Fixed No response to LL_ENC_REQ issue
+// Date: 2021-08-10
+//*****************************************************************************
+
+//*****************************************************************************
+// Optimize process when receiving invalid parameter of LL_LEN_REQ.
+// Date: 2021-09-13
+//*****************************************************************************
+
+const am_hal_ble_buffer(0x0720)am_ble_buffer_patch_data_b0 =
+{
+ .bytes =
+ {
+ 0x00,0x22,0x20,0x07,0xff,0x3f,0x00,0x00,0x84,0xf5,0x07,0x00,0x73,0xfd,0x07,0x00,
+ 0x75,0x05,0x08,0x00,0x17,0x0b,0x08,0x00,0xa9,0x15,0x08,0x00,0x18,0x1b,0x08,0x00,
+ 0x2d,0x23,0x08,0x00,0xc5,0x2c,0x08,0x00,0xf4,0x32,0x08,0x00,0xff,0x39,0x08,0x00,
+ 0x64,0x43,0x08,0x00,0xf9,0x49,0x08,0x00,0xee,0x51,0x08,0x00,0x54,0x5c,0x08,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x21,0x20,0xec,0xf7,
+ 0xf9,0xfc,0x00,0x28,0x0a,0xd0,0x00,0x20,0x00,0x90,0x03,0x46,0x02,0x46,0x01,0x46,
+ 0x24,0x68,0x21,0x20,0x35,0x34,0xa0,0x47,0x00,0xbf,0x38,0xbd,0xef,0xf7,0xfb,0xfe,
+ 0x0f,0x49,0x00,0x28,0x02,0xd0,0x08,0x78,0x01,0x28,0x12,0xd0,0x08,0x78,0x02,0x28,
+ 0x0f,0xd0,0x00,0x28,0x06,0xd0,0x01,0x28,0x04,0xd0,0x00,0xf0,0x0c,0x6e,0x00,0x20,
+ 0x00,0x00,0x00,0x04,0x1c,0x6e,0x00,0x20,0x00,0x49,0x08,0x47,0x01,0x43,0x00,0x20,
+ 0x23,0x4e,0xca,0x7c,0x75,0x68,0xc9,0x6a,0x00,0x2a,0x1d,0xd0,0x7d,0x22,0x12,0x02,
+ 0x91,0x42,0x02,0xd3,0x8a,0x1a,0x01,0x20,0x00,0xe0,0x52,0x1a,0x00,0x28,0x05,0xd0,
+ 0x20,0x46,0x50,0x43,0xea,0xf7,0x02,0xfa,0x20,0x1a,0x04,0xe0,0xea,0xf7,0xde,0xf9,
+ 0x00,0x19,0x01,0x02,0xc2,0x00,0x69,0x18,0x12,0x18,0x89,0x18,0x4a,0x0a,0x53,0x02,
+ 0xc9,0x1a,0x71,0x60,0x1e,0x21,0x48,0x43,0x80,0x18,0x70,0xbd,0x2c,0x68,0x00,0x20,
+ 0x0c,0x6e,0x00,0x20,0x00,0x49,0x08,0x47,0x31,0x43,0x00,0x20,0xc1,0x7c,0xc0,0x6a,
+ 0x00,0x29,0x15,0xd0,0x7d,0x21,0x09,0x02,0x88,0x42,0x02,0xd3,0x02,0xd5,0x04,0x20,
+ 0x60,0x70,0x34,0xe0,0x28,0x69,0x06,0xf0,0xb5,0xf8,0x00,0x28,0x02,0xd0,0x02,0x20,
+ 0x60,0x70,0x2c,0xe0,0x03,0x98,0x04,0xf0,0x1f,0xfa,0x04,0x28,0x07,0xd1,0x68,0x46,
+ 0x01,0x79,0x02,0x20,0x88,0x43,0x05,0xd0,0x00,0x20,0x00,0x28,0x04,0xd0,0x00,0xbf,
+ 0x00,0x20,0x1c,0xe0,0x01,0x20,0xf8,0xe7,0xf0,0x88,0x00,0x90,
+ AM_HAL_BLE_LOCAL_FEATURE, //0x21,
+ 0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,
+ 0xff,0x03,0x00,0x00,0xff,0x00,0x3c,0x1f,0x00,0x00,0x00,0x00,0x01,0x20,0x00,0x00,
+ 0x8d,0x84,0x00,0x00,0x02,0x20,0x00,0x00,0xcd,0x7d,0x00,0x00,0x03,0x20,0x00,0x00,
+ 0xd1,0x7e,0x00,0x00,0x05,0x20,0x00,0x00,0xfd,0x84,0x00,0x00,0x28,0x69,0x28,0x30,
+ 0x40,0x30,0x01,0x8d,0x00,0x98,0x40,0x1a,0x2a,0x49,0x80,0xb2,0x00,0xbf,0x00,0xbf,
+ 0x28,0x46,0x05,0x22,0x71,0x1c,0x63,0x30,0xf3,0xf7,0xac,0xfd,0x28,0x69,0x00,0x99,
+ 0x01,0xf0,0xdf,0xfb,0x01,0x20,0x60,0x70,0x01,0xe0,0x03,0x20,0x60,0x70,0x00,0x2f,
+ 0x39,0xd1,0x60,0x78,0x06,0x28,0x36,0xd2,0x01,0x00,0x79,0x44,0x00,0xbf,0x00,0xbf,
+ 0x31,0x89,0x56,0x22,0x51,0x53,0x31,0x46,0x01,0xf0,0x3e,0xfe,0x01,0x20,0x60,0x70,
+ 0x01,0xe0,0x03,0x20,0x60,0x70,0x00,0x2f,0x67,0xd1,0x60,0x78,0x06,0x28,0x64,0xd2,
+ 0x01,0x00,0x79,0x44,0x09,0x79,0x49,0x18,0x8f,0x44,0x5f,0x18,0x0c,0x02,0x07,0x12,
+ 0x28,0x21,0x05,0x98,0xff,0xf7,0x54,0xfc,0x57,0xe0,0x3d,0x21,0x78,0x68,0x00,0x20,
+ 0xac,0x6d,0x00,0x20,0x40,0x00,0x80,0x50,0x17,0x20,0x00,0x00,0x01,0x08,0x00,0x00,
+ 0x7e,0x40,0x80,0x50,0xd8,0x68,0x00,0x20,0x00,0x49,0x08,0x47,0x91,0x43,0x00,0x20,
+ 0x11,0x43,0xc3,0x78,0x82,0x78,0x1b,0x02,0x1a,0x43,0x12,0x04,0x0a,0x43,0x1a,0x4c,
+ 0x62,0x60,0x42,0x79,0x01,0x79,0x12,0x02,0x11,0x43,0xc3,0x79,0x13,0x2e,0x1b,0xd0,
+ 0xa1,0x21,0x0e,0x55,0x02,0x22,0x69,0x46,0x0a,0x72,0x4e,0x72,0x0f,0x21,0x08,0x43,
+ 0x01,0x90,0x01,0x46,0x38,0x46,0xfe,0xf7,0x09,0xf9,0x69,0x46,0x0a,0x7a,0xe8,0xb2,
+ 0x02,0xa9,0xff,0xf7,0x55,0xff,0x40,0x34,0xff,0x20,0xa2,0x8a,0x39,0x46,0x03,0x30,
+ 0x00,0xbf,0x00,0xbf,0x03,0xb0,0xf0,0xbd,0x16,0x22,0xa1,0x21,0x20,0x88,0x80,0x00,
+ 0x38,0x58,0x40,0x30,0x00,0x7f,0xc0,0x07,0x05,0xd0,0x00,0x25,0x2f,0xe0,0x20,0x88,
+ 0x08,0xf0,0x22,0xfd,0x2b,0xe0,0x68,0x46,0x01,0x7a,0x01,0x20,0x88,0x43,0x03,0xd0,
+ 0x00,0x20,0x00,0x28,0x08,0xd1,0x01,0xe0,0x01,0x20,0xfa,0xe7,0x04,0x20,0x88,0x43,
+ 0x04,0xd0,0x00,0x20,0x00,0x28,0x03,0xd0,0x3a,0x25,0x18,0xe0,0x11,0x43,0x81,0x83,
+ 0x0f,0x21,0x30,0x46,0xfc,0xf7,0x12,0xfb,0x28,0x46,0x03,0xf0,0x85,0xf8,0x04,0x28,
+ 0x03,0xd1,0x61,0x78,0x28,0x46,0xfe,0xf7,0x83,0xfd,0x00,0x20,0x70,0xbd,0x00,0x00,
+ 0x64,0x69,0x00,0x20,0x30,0xb4,0x02,0x4c,0xa4,0x46,0x30,0xbc,0x60,0x47,0x00,0x00,
+ 0x39,0x44,0x00,0x20,0xe9,0xfa,0x01,0x46,0x00,0x90,0x03,0x98,0x20,0x88,0x68,0x80,
+ 0x28,0x46,0x01,0xf0,0xb5,0xf8,0x00,0x20,0xf8,0xbd,0x00,0x00,0x15,0x20,0x00,0x00,
+ 0x01,0x08,0x00,0x00,0x64,0x69,0x00,0x20,0xf0,0xb5,0x83,0xb0,0x18,0x46,0x00,0x24,
+ 0x18,0x4d,0xe9,0x7a,0x00,0x29,0x00,0xd0,0x00,0x24,0x21,0x46,0x0a,0xf0,0x42,0xfe,
+ 0x00,0x2c,0x24,0xd1,0x01,0x26,0x01,0x96,0x13,0x4c,0x02,0xaa,0xf9,0xfd,0x04,0x46,
+ 0x03,0xe0,0x30,0x46,0x0b,0xf0,0x5c,0xfe,0x04,0x46,0x21,0x46,0x38,0x46,0x0a,0xf0,
+ 0xa3,0xff,0x00,0x20,0xf8,0xbd,0x00,0x00,0x2e,0x20,0x00,0x00,0xd9,0xdf,0xff,0xff,
+ 0xf8,0x68,0x00,0x20,0x10,0xb5,0x82,0xb0,0x0a,0x46,0x1c,0x46,0x00,0x21,0x0d,0x48,
+ 0xc3,0x7a,0x00,0x2b,0x00,0xd0,0x00,0xbf,0x00,0x21,0x0c,0xd1,0xee,0xf7,0x3a,0xfe,
+ 0xa0,0x78,0x16,0x28,0x02,0xd3,0x19,0x20,0x20,0x70,0x13,0xe0,0x0c,0x21,0x0c,0x4a,
+ 0x48,0x43,0x11,0x5c,0xb1,0x42,0x02,0xd0,0x19,0x20,0x20,0x70,0x0a,0xe0,0x00,0x21,
+ 0x21,0x70,0x6d,0x1c,0x80,0x18,0x76,0x1e,0xad,0xb2,0x83,0x68,0xf1,0xb2,0xa2,0x1c,
+ 0x28,0x46,0x98,0x47,0x20,0x46,0x70,0xbd,0x80,0x44,0x80,0x50,0x08,0x4a,0x11,0x6b,
+ 0x52,0x6b,0x08,0x4b,0x98,0x42,0x01,0xd9,0x00,0x20,0x70,0x47,0x41,0x43,0x42,0x43,
+ 0x89,0x09,0x90,0x0c,0x08,0x18,0x04,0x49,0x88,0x42,0xf6,0xd9,0x00,0x20,0x70,0x47,
+ 0xc0,0x7e,0x00,0x20,0x80,0x84,0x1e,0x00,0x00,0x87,0x93,0x03,0x10,0xb4,0x13,0x49,
+ 0x89,0x6b,0x13,0x4a,0x90,0x42,0x02,0xd9,0x10,0xbc,0x00,0x20,0x70,0x47,0x11,0x4a,
+ 0x7d,0x24,0x13,0x68,0x14,0x22,0x24,0x02,0x42,0x43,0xa3,0x42,0x03,0xd9,0x41,0x43,
+ 0x08,0x0c,0x10,0x18,0x02,0xe0,0x41,0x43,0x08,0x0c,0x10,0x1a,0x0a,0x49,0x88,0x42,
+ 0x02,0xd9,0x00,0x20,0x10,0xbc,0x70,0x47,0x00,0x28,0x00,0xd0,0x40,0x1e,0xa3,0x42,
+ 0xf8,0xd2,0x00,0x28,0xf6,0xd0,0x10,0xbc,0x40,0x1e,0x70,0x47,0xc0,0x7e,0x00,0x20,
+ 0xa0,0x86,0x01,0x00,0x58,0x68,0x00,0x20,0x80,0x84,0x1e,0x00,0xf0,0xb4,0xef,0xf3,
+ 0x10,0x81,0xcc,0xb2,0x01,0x21,0x81,0xf3,0x10,0x88,0x42,0x78,0x01,0x78,0x12,0x02,
+ 0x11,0x43,0xc3,0x78,0x82,0x78,0x1b,0x02,0x1a,0x43,0x12,0x04,0x0a,0x43,0x1d,0x4d,
+ 0x6a,0x60,0x42,0x79,0x01,0x79,0x12,0x02,0x11,0x43,0xc3,0x79,0x82,0x79,0x1b,0x02,
+ 0x1a,0x43,0x12,0x04,0x0a,0x43,0xaa,0x60,0x42,0x7a,0x01,0x7a,0x12,0x02,0x11,0x43,
+ 0xc3,0x7a,0x82,0x7a,0x1b,0x02,0x1a,0x43,0x12,0x04,0x0a,0x43,0xea,0x60,0x42,0x7b,
+ 0x01,0x7b,0x12,0x02,0x11,0x43,0xc3,0x7b,0x82,0x7b,0x1b,0x02,0x1a,0x43,0x12,0x04,
+ 0x0a,0x43,0x2a,0x61,0x10,0x30,0x10,0x23,0x0b,0x4a,0x00,0x21,0x46,0x5c,0x56,0x54,
+ 0x49,0x1c,0x89,0xb2,0x99,0x42,0xf9,0xd3,0x6e,0x20,0x68,0x61,0x01,0x20,0x28,0x60,
+ 0x06,0x48,0x01,0x21,0x01,0x74,0x84,0xf3,0x10,0x88,0xf0,0xbc,0x04,0x49,0x10,0x20,
+ 0x08,0x47,0x00,0x00,0xc0,0x00,0x80,0x50,0x6e,0x40,0x80,0x50,0xd8,0x68,0x00,0x20,
+ 0xa1,0x59,0x01,0x00,0xff,0xb5,0x85,0xb0,0x0e,0x46,0x1f,0x46,0x00,0x20,0x02,0x90,
+ 0x74,0x49,0x30,0x46,0x88,0x47,0x01,0x46,0x01,0x90,0x05,0x98,0x72,0x4a,0x80,0x00,
+ 0x04,0x90,0x14,0x58,0x25,0x46,0xa0,0x35,0x6b,0x79,0x18,0x07,0x07,0xd5,0xe8,0x78,
+ 0x0d,0x28,0x04,0xd0,0x6d,0x4a,0x3d,0x21,0x05,0x98,0x90,0x47,0xce,0xe0,0x01,0x20,
+ 0x88,0x43,0x0d,0xd0,0x00,0x20,0x00,0x28,0x74,0xd0,0xe8,0x78,0x68,0x4a,0x03,0x92,
+ 0x05,0x28,0x70,0xd0,0x06,0xdc,0x01,0x28,0x1b,0xd0,0x04,0x28,0x6a,0xd1,0x74,0xe0,
+ 0x01,0x20,0xf0,0xe7,0x07,0x28,0x2d,0xd0,0x0d,0x28,0x63,0xd1,0xd8,0x06,0x61,0xd4,
+ 0x00,0x24,0x6c,0x71,0x1a,0x22,0x5f,0x4b,0x00,0x21,0x05,0x98,0x98,0x47,0x68,0x46,
+ 0x01,0x79,0x49,0x08,0x49,0x00,0x01,0x91,0x5b,0x4a,0x30,0x46,0x90,0x47,0xec,0x70,
+ 0xa4,0xe0,0x78,0x78,0x0e,0x28,0x4d,0xd1,0xff,0x20,0x58,0x4a,0x31,0x46,0x03,0x30,
+ 0x90,0x47,0x22,0x46,0x69,0x32,0x56,0x4b,0x1a,0x20,0x05,0x99,0x98,0x47,0x68,0x46,
+ 0x01,0x79,0x49,0x08,0x49,0x00,0x01,0x91,0x4f,0x4a,0x30,0x46,0x90,0x47,0x00,0x20,
+ 0xe8,0x70,0x8b,0xe0,0x78,0x78,0x0f,0x28,0x34,0xd1,0xff,0x20,0x4b,0x4a,0x31,0x46,
+ 0x03,0x30,0x90,0x47,0x20,0x46,0x60,0x30,0x41,0x7a,0xfd,0x22,0x11,0x40,0x41,0x72,
+ 0x48,0x49,0x05,0x98,0x88,0x47,0x03,0x28,0x26,0xd0,0x20,0x46,0x40,0x30,0x01,0x46,
+ 0x80,0x8b,0x42,0x06,0x10,0xd5,0x40,0x22,0x90,0x43,0x88,0x83,0x03,0x98,0x04,0x21,
+ 0x00,0x7f,0x08,0x40,0x00,0xd0,0x01,0x20,0x00,0x28,0x05,0xd0,0x22,0x69,0x28,0x32,
+ 0x3d,0x4b,0x1a,0x20,0x05,0x99,0x98,0x47,0x3c,0x4a,0x00,0x21,0x05,0x98,0x90,0x47,
+ 0x68,0x46,0x01,0x79,0x49,0x08,0x49,0x00,0x01,0x91,0x33,0x4a,0x30,0x46,0x90,0x47,
+ 0x00,0x20,0xe8,0x70,0x52,0xe0,0x41,0xe0,0x2b,0x49,0x04,0x98,0x08,0x58,0x00,0x68,
+ 0x02,0x21,0x01,0x70,0x32,0x49,0x88,0x47,0x48,0xe0,0x78,0x78,0x14,0x28,0x45,0xd1,
+ 0xff,0x20,0x2a,0x4a,0x31,0x46,0x03,0x30,0x90,0x47,0x01,0x20,0x40,0x34,0xa0,0x74,
+ 0x03,0x98,0x40,0x21,0x00,0x7f,0x08,0x40,0x00,0xd0,0x01,0x20,0x00,0x28,0x1a,0xd0,
+ 0xe0,0x7c,0x80,0x07,0x17,0xd4,0x0c,0x23,0x27,0x4f,0x3e,0x22,0x25,0x48,0x05,0x99,
+ 0xb8,0x47,0x07,0x21,0x01,0x70,0x05,0x99,0x41,0x80,0x21,0x89,0x01,0x81,0x21,0x8a,
+ 0x41,0x81,0xe1,0x88,0x81,0x80,0xe1,0x89,0xc1,0x80,0x20,0x49,0x88,0x47,0xe0,0x7c,
+ 0x02,0x21,0x08,0x43,0xe0,0x74,0x68,0x46,0x01,0x79,0x49,0x08,0x49,0x00,0x01,0x91,
+ 0x11,0x4a,0x30,0x46,0x90,0x47,0x00,0x20,0xe8,0x70,0x0f,0xe0,0x78,0x78,0x12,0x28,
+ 0x0c,0xd1,0x49,0x08,0x49,0x00,0x01,0x91,0x0b,0x4a,0x30,0x46,0x90,0x47,0x00,0x20,
+ 0xe8,0x70,0xff,0x20,0x09,0x4a,0x31,0x46,0x03,0x30,0x90,0x47,0x02,0x98,0x09,0xb0,
+ 0xf0,0xbd,0x00,0x00,0x0d,0x9f,0x00,0x00,0x64,0x69,0x00,0x20,0x25,0xc4,0x00,0x00,
+ 0xb8,0x68,0x00,0x20,0x05,0xa8,0x00,0x00,0x31,0x9f,0x00,0x00,0x89,0xa1,0x00,0x00,
+ 0x1d,0xb0,0x00,0x00,0x1d,0x0a,0x01,0x00,0x09,0xab,0x00,0x00,0x05,0xc4,0x00,0x00,
+ 0x31,0x9e,0x00,0x00,0x04,0x08,0x00,0x00,0xf5,0x9d,0x00,0x00,0xb5,0x8f,0x00,0x00
+ }
+};
+
+am_hal_ble_patch_t am_ble_buffer_patch_b0 =
+{
+ .ui32Type = 0xCC,
+ .ui32Length = 0x0720,
+ .ui32CRC = 0xefad,
+ .pui32Data = am_ble_buffer_patch_data_b0.words,
+};
+
+
+//*****************************************************************************
+//
+// Patch Name: Function PATCH v0.4 for Apollo3 B0
+// Reduce duration from TX to TX
+// Optimized 32K XO frequency calculation
+// Optimized AGC Table
+// Fixed Channelmap indication rejected issue
+// Fixed 800M Spur
+// Fixed feature issue
+// Date: 2019-05-15
+//*****************************************************************************
+//*****************************************************************************
+// Added one parameter for changing channel reassess duration
+// Date: 2020-09-12
+//*****************************************************************************
+
+
+am_hal_ble_buffer(0x00c7) am_ble_buffer_nvds_data_b0 =
+{
+ .bytes =
+ {
+ 0x4e,0x56,0x44,0x53, //NVDS_MAGIC_NUMBER
+ 0x01,0x06,0x06,0xef,0xbb,0x23,0x88,0x77,0x66, //bluetooth address
+ 0x02,0x06,0x0a,0x4e,0x5a,0x38,0x38,0x30,0x31,0x56,0x31,0x41,0x00, //device name
+ 0x03,0x06,0x01,0x00, //system clock frequency, 00=32MHz 01=24MHz others=16MHz
+ 0x07,0x06,0x02,0x00,0x00, //32K clock drift, 0x01f4 = 500 ppm
+ 0x0c,0x06,0x02,0x96,0x00, //sleep clock accuracy in ppm, default 0x0096 = 150 ppm
+ 0x08,0x06,0x01,0x00, //01 for BQB qualification, 00 for normal usage
+ 0x09,0x06,0x01,0x02, //clock source selection, 00 = internal RC32KHz, 02= use Apollo3 MCU 32.768KHz
+ 0x0a,0x06,0x04,0x00,0x00,0x00,0x00, //0x00000000 = auto detect and low frequency clock calibration
+ 0x0b,0x06,0x01,0x96, //rx_ifs 0x96 = 150us
+ 0x23,0x06,0x01,0x95, //tx_ifs 0x95 = 149us
+ 0x0d,0x06,0x02,0xe8,0x3, //duration allowed for XO32M stabilization from external wakeup
+ 0x0e,0x06,0x02,0xe8,0x3, //duration allowed for XO32M stabilization from internal wakeup signal
+ 0x0f,0x06,0x02,0x2c,0x01, //duration allowed for radio to leave low power mode
+ 0x10,0x06,0x04,0x00,0xc2,0x01,0x00, //set UART_BAUDRATE
+ 0x11,0x06,0x01,0x01, //sleep algorithm enabled
+ // 0x11,0x06,0x01,0x00, //sleep algorithm disabled
+ 0x12,0x06,0x01,0x01, //external wake-up support
+ 0x13,0x06,0x02,0x90,0x02, //duration of sleep and wake-up algorithm
+ 0x14,0x06,0x02,0xAC,0x09, // Ambiq's Company Identifier
+ 0x15,0x06,0x01,0x09, //BLE major version, support BLE 5.0
+ 0x16,0x06,0x01,0x03, //BLE minor version
+ 0x17,0x06,0x01,0x29, //BLE SW version build
+ 0x18,0x06,0x02,0xdc,0x05, //advertising interval (undirect)
+ 0x19,0x06,0x02,0xe2,0x04, //advertising interval (direct)
+ 0x20,0x06,0x01,0x01, //agc switch on
+ 0x21,0x06,0x01,0x02, //EA programming latency,set '2' with master mode
+ 0x22,0x06,0x01,0x00, //EA asap latency
+ 0x24,0x06,0x04,0x5C,0x09,0x6A,0x09, //radio TRX timing
+ 0x25,0x06,0x01,0x11, //modem polarity setting
+ 0x26,0x06,0x01,0x00, //modem sync setting
+ 0x27,0x06,0x01,0x02, //BLE reset delay
+ 0x2d,0x06,0x01,0x00, //2 byte mode switch, 01 to enable
+ 0x28,0x06,0x02,0xf6,0x2d, //initial agc gain setting
+ 0x29,0x06,0x01,0x0f, //initial Tx output power, 0x0f is +4dBm
+ 0x35,0x06,0x01,0x08, //maximum Tx ouput power setting
+ 0x37,0x06,0x01,0x00, //RC32K calibration control, 0xAA to enable
+ 0x05,0x06,0x02,0x34,0x00, //no use
+ 0x04,0x06,0x01,0x20, //internal dvdd voltage level control if using 0.9V from MCU side
+ 0x2e,0x06,0x01,0x00, //instant indication,set "0" to disbale instant reject
+ 0x40,0x06,0x02,0x10,0x27, //set channel reassess time duration 0x2710 means set to 10s
+ 0x00,0x00,0x00,0x00 //dummy
+ }
+};
+
+am_hal_ble_patch_t am_ble_nvds_patch_b0 =
+{
+ .ui32Type = 0xDD,
+ .ui32Length = 0x00c7,
+ .ui32CRC = 0x112b,
+ .pui32Data = am_ble_buffer_nvds_data_b0.words,
+};
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch_b0.h
similarity index 62%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h
rename to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch_b0.h
index c381b0f..72377a0 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_id.h
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_ble_patch_b0.h
@@ -1,30 +1,37 @@
//*****************************************************************************
//
-//! @file am_util_id.h
+//! @file am_hal_ble_patch_b0.h
//!
-//! @brief Identification of the Ambiq Micro device.
+//! @brief This is a binary patch for the BLE core.
+//!
+//! @addtogroup
+//! @ingroup
+//! @{
//
//*****************************************************************************
//*****************************************************************************
//
-// Copyright (c) 2017, Ambiq Micro
+// Copyright (c) 2021, Ambiq Micro, Inc.
// All rights reserved.
-//
+//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
-//
+//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
-//
+//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
-//
+//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
-//
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -37,13 +44,12 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
-// This is part of revision v1.2.10-2-gea660ad-hotfix2 of the AmbiqSuite Development Package.
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
//
//*****************************************************************************
-#ifndef AM_UTIL_ID_H
-#define AM_UTIL_ID_H
-#include "hal/am_hal_mcuctrl.h"
+#ifndef AM_HAL_BLE_PATCH_B0_H
+#define AM_HAL_BLE_PATCH_B0_H
#ifdef __cplusplus
extern "C"
@@ -52,73 +58,48 @@ extern "C"
//*****************************************************************************
//
-//! ID structure
+// Patch array pointer.
//
//*****************************************************************************
-typedef struct
-{
- //
- //! Contains the HAL hardware information about the device.
- //
- am_hal_mcuctrl_device_t sMcuCtrlDevice;
-
- //
- //! Device type (derived value, not a hardware value)
- //
- uint32_t ui32Device;
-
- //
- //! Vendor name from the MCUCTRL VENDORID register and stringized here.
- //
- const uint8_t *pui8VendorName;
-
- //
- //! Device name (derived value, not a hardware value)
- //
- const uint8_t *pui8DeviceName;
-
- //
- // Major chip revision (e.g. char 'A' or 'B')
- //
- uint8_t ui8ChipRevMaj;
-
- //
- // Minor chip revision (e.g. char '0', '1', ' ')
- //
- uint8_t ui8ChipRevMin;
-}
-am_util_id_t;
+extern am_hal_ble_patch_t **am_hal_ble_default_patches_b0;
+extern am_hal_ble_patch_t **am_hal_ble_default_copy_patches_b0;
+extern const uint32_t am_hal_ble_num_default_patches_b0;
//*****************************************************************************
//
-// Macros for MCUCTRL CHIP_INFO field.
-// Note - these macros are derived from the Apollo2 auto-generated register
-// definitions.
+// Pointers for specific patches.
//
//*****************************************************************************
-#define AM_UTIL_MCUCTRL_CHIP_INFO_PARTNUM_APOLLO2 0x03000000
-#define AM_UTIL_MCUCTRL_CHIP_INFO_PARTNUM_APOLLO 0x01000000
-#define AM_UTIL_MCUCTRL_CHIP_INFO_PARTNUM_PN_M 0xFF000000
+extern am_hal_ble_patch_t am_ble_performance_patch_b0;
+extern am_hal_ble_patch_t am_ble_nvds_patch_b0;
//*****************************************************************************
//
-// Macros for silicon identification
+// Default patch structure.
//
//*****************************************************************************
-#define AM_UTIL_ID_UNKNOWN 0
-#define AM_UTIL_ID_APOLLO 1
-#define AM_UTIL_ID_APOLLO2 2
+extern am_hal_ble_patch_t g_AMBLEDefaultPatchB0;
//*****************************************************************************
//
-// External function definitions
+// Macros for accessing specific NVDS parameters.
//
//*****************************************************************************
-extern uint32_t am_util_id_device(am_util_id_t *psIDDevice);
+#define AM_HAL_BLE_NVDS_CLOCKDRIFT_OFFSET 30
+#define AM_HAL_BLE_NVDS_SLEEPCLOCKDRIFT_OFFSET 35
+#define AM_HAL_BLE_NVDS_CLOCKSOURCE_OFFSET 44
+#define AM_HAL_BLE_NVDS_SLEEPENABLE_OFFSET 85
+#define AM_HAL_BLE_NVDS_AGC_OFFSET 125
#ifdef __cplusplus
}
#endif
-#endif // AM_UTIL_ID_H
+#endif // AM_HAL_BLE_PATCH_B0_H
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.c b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.c
new file mode 100644
index 0000000..0018050
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.c
@@ -0,0 +1,272 @@
+//*****************************************************************************
+//
+// am_hal_burst.c
+//! @file
+//!
+//! @brief Functions for controlling Burst Mode operation.
+//!
+//! @addtogroup burstmode3
+//! @ingroup apollo3hal
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "am_mcu_apollo.h"
+
+//
+// Globals.
+//
+bool g_am_hal_burst_mode_available = false;
+
+// ****************************************************************************
+//
+// am_hal_burst_mode_initialize()
+// Burst mode initialization function
+//
+// ****************************************************************************
+uint32_t
+am_hal_burst_mode_initialize(am_hal_burst_avail_e *peBurstAvail)
+{
+ uint32_t ui32Status;
+ //
+ // Check if the Burst Mode feature is available based on the SKU.
+ //
+ if ( 0 == MCUCTRL->SKU_b.ALLOWBURST )
+ {
+ //
+ // Burst mode is not available.
+ //
+ g_am_hal_burst_mode_available = false;
+ *peBurstAvail = AM_HAL_BURST_NOTAVAIL;
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Enable the Burst Feature Event (DEVPWREVENTEN).
+ //
+ PWRCTRL->DEVPWREVENTEN_b.BURSTEVEN = 1;
+
+ //
+ // Enable the Burst Functionality (FEATUREENABLE).
+ //
+ MCUCTRL->FEATUREENABLE_b.BURSTREQ = 1;
+
+ ui32Status = am_hal_flash_delay_status_check(10000,
+ (uint32_t)&MCUCTRL->FEATUREENABLE,
+ MCUCTRL_FEATUREENABLE_BURSTACK_Msk,
+ MCUCTRL_FEATUREENABLE_BURSTACK_Msk,
+ true);
+
+ if ( ui32Status != AM_HAL_STATUS_SUCCESS )
+ {
+ g_am_hal_burst_mode_available = false;
+ *peBurstAvail = AM_HAL_BURST_NOTAVAIL;
+ return ui32Status;
+ }
+
+ if ( 0 == MCUCTRL->FEATUREENABLE_b.BURSTAVAIL )
+ {
+ //
+ // Burst mode is not available.
+ //
+ g_am_hal_burst_mode_available = false;
+ *peBurstAvail = AM_HAL_BURST_NOTAVAIL;
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Check the ACK for the Burst Functionality.
+ //
+ if ( MCUCTRL->FEATUREENABLE_b.BURSTACK == 0 )
+ {
+ //
+ // If NACK, return status.
+ //
+ g_am_hal_burst_mode_available = false;
+ *peBurstAvail = AM_HAL_BURST_NOTAVAIL;
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Return Availability
+ //
+ g_am_hal_burst_mode_available = true;
+ *peBurstAvail = AM_HAL_BURST_AVAIL;
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+// ****************************************************************************
+//
+// am_hal_burst_mode_enable()
+// Burst mode enable function
+//
+// ****************************************************************************
+uint32_t
+am_hal_burst_mode_enable(am_hal_burst_mode_e *peBurstStatus)
+{
+ uint32_t ui32Status;
+
+ //
+ // Check if Burst Mode is allowed and return status if it is not.
+ //
+ if (!g_am_hal_burst_mode_available)
+ {
+ *peBurstStatus = AM_HAL_NORMAL_MODE;
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+
+ //
+ // Request Burst Mode Enable (FREQCTRL)
+ //
+ CLKGEN->FREQCTRL_b.BURSTREQ = CLKGEN_FREQCTRL_BURSTREQ_EN;
+
+// while (0 == AM_BFR(CLKGEN, FREQCTRL, BURSTACK));
+ ui32Status = am_hal_flash_delay_status_check(10000,
+ (uint32_t)&CLKGEN->FREQCTRL,
+ CLKGEN_FREQCTRL_BURSTSTATUS_Msk,
+ CLKGEN_FREQCTRL_BURSTSTATUS_Msk,
+ true);
+
+ if ( ui32Status != AM_HAL_STATUS_SUCCESS )
+ {
+ *peBurstStatus = AM_HAL_NORMAL_MODE;
+ return ui32Status;
+ }
+
+ //
+ // Check that the Burst Request was ACK'd.
+ //
+ if ( 0 == CLKGEN->FREQCTRL_b.BURSTACK )
+ {
+ *peBurstStatus = AM_HAL_NORMAL_MODE;
+ return AM_HAL_STATUS_FAIL;
+ }
+
+ //
+ // Check the Burst Mode Status (FREQCTRL)
+ //
+ if ( CLKGEN->FREQCTRL_b.BURSTSTATUS > 0)
+ {
+ *peBurstStatus = AM_HAL_BURST_MODE;
+ }
+ else
+ {
+ *peBurstStatus = AM_HAL_NORMAL_MODE;
+ }
+
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+// ****************************************************************************
+//
+// am_hal_burst_mode_disable()
+// Burst mode disable function
+//
+// ****************************************************************************
+uint32_t
+am_hal_burst_mode_disable(am_hal_burst_mode_e *peBurstStatus)
+{
+ uint32_t ui32Status;
+
+ //
+ // Request Burst Mode Enable (FREQCTRL)
+ //
+ //
+ // Safely disable burst mode.
+ //
+ AM_CRITICAL_BEGIN
+ am_hal_flash_store_ui32((uint32_t*)&CLKGEN->FREQCTRL, CLKGEN_FREQCTRL_BURSTREQ_DIS);
+ AM_CRITICAL_END
+
+ //
+ // Disable the Burst Feature Event (DEVPWREVENTEN).
+ //
+ PWRCTRL->DEVPWREVENTEN_b.BURSTEVEN = 0;
+
+ ui32Status = am_hal_flash_delay_status_check(10000,
+ (uint32_t)&CLKGEN->FREQCTRL,
+ CLKGEN_FREQCTRL_BURSTSTATUS_Msk,
+ 0,
+ true);
+
+ if ( ui32Status != AM_HAL_STATUS_SUCCESS )
+ {
+ *peBurstStatus = AM_HAL_NORMAL_MODE;
+ return ui32Status;
+ }
+
+ //
+ // Check the Burst Mode Status (FREQCTRL)
+ //
+ //
+ // Check the Burst Mode Status (FREQCTRL)
+ //
+ if ( CLKGEN->FREQCTRL_b.BURSTSTATUS > 0 )
+ {
+ *peBurstStatus = AM_HAL_BURST_MODE;
+ }
+ else
+ {
+ *peBurstStatus = AM_HAL_NORMAL_MODE;
+ }
+
+
+ return AM_HAL_STATUS_SUCCESS;
+}
+
+//*****************************************************************************
+//
+// am_hal_burst_mode_status() - Return current burst mode state.
+//
+// Implemented as a macro, this function returns the current burst mode state.
+// AM_HAL_BURST_MODE
+// AM_HAL_NORMAL_MODE
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.h b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.h
similarity index 56%
rename from hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.h
rename to hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.h
index ead61dd..42dd587 100644
--- a/hw/mcu/ambiq/src/ext/AmbiqSuite/utils/am_util_cmdline.h
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_burst.h
@@ -1,32 +1,38 @@
//*****************************************************************************
//
-//! @file am_util_cmdline.h
+// am_hal_burst.h
+//! @file
//!
-//! @brief Functions to implement a simple command line interface.
+//! @brief Functions for controlling Burst Mode operation.
//!
-//! Functions supporting a command-line interface.
+//! @addtogroup burstmode3
+//! @ingroup apollo3hal
+//! @{
//
//*****************************************************************************
//*****************************************************************************
//
-// Copyright (c) 2017, Ambiq Micro
+// Copyright (c) 2021, Ambiq Micro, Inc.
// All rights reserved.
-//
+//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
-//
+//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
-//
+//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
-//
+//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
-//
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -39,107 +45,104 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
-// This is part of revision v1.2.10-2-gea660ad-hotfix2 of the AmbiqSuite Development Package.
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
//
//*****************************************************************************
-#ifndef AM_UTIL_CMDLINE_H
-#define AM_UTIL_CMDLINE_H
+#ifndef AM_HAL_BURST_H
+#define AM_HAL_BURST_H
#ifdef __cplusplus
extern "C"
{
#endif
+
+
//*****************************************************************************
//
-// Macro definitions
+// Burst Mode Status enums
//
//*****************************************************************************
+//
+// Avail - the result of a feature availability interrogation.
+//
+typedef enum
+{
+ AM_HAL_BURST_AVAIL,
+ AM_HAL_BURST_NOTAVAIL
+} am_hal_burst_avail_e;
-//*****************************************************************************
//
-// Standard Command Function Pointer Type
+// Mode - the result of a change request.
//
-//*****************************************************************************
-typedef uint32_t (*am_util_cmdline_func_t)(char **args, uint32_t argc);
+typedef enum
+{
+ AM_HAL_BURST_MODE,
+ AM_HAL_NORMAL_MODE,
+} am_hal_burst_mode_e;
//*****************************************************************************
//
-// Command Structure.
+//! @brief Burst mode initialization function
+//!
+//! @param peBurstAvail - Availibility of feature
+//!
+//! This function initializes the Apollo3 MCU for Burst Mode operation. It does
+//! not set the MCU into Burst Mode. This should be called once at system
+//! initialization if Burst Mode is going to be used in the system.
+//!
+//! @return status of API call.
//
//*****************************************************************************
-typedef struct
-{
- char *pcCommand;
- am_util_cmdline_func_t pfnCommand;
- char *pcHelpString;
-}
-am_util_cmdline_command_t;
+extern uint32_t am_hal_burst_mode_initialize(am_hal_burst_avail_e *peBurstAvail);
//*****************************************************************************
//
-// Stucture defining how the cmdline utility may transmit or receive
-// characters.
+//! @brief Burst mode enable function
+//!
+//! @param peBurstStatus - resulting mode after call.
+//!
+//! This function enables the Apollo3 MCU into Burst Mode operation.
+//!
+//! @return status of API call.
//
//*****************************************************************************
-typedef struct
-{
- //
- // Function used to grab input characters.
- //
- uint32_t (*pfnGetChar)(char *pcChar);
-
- //
- // Function used to echo characters back to the output.
- //
- void (*pfnPutChar)(uint32_t ui32Module, char pcChar);
-
- //
- // List of supported commands, along with their associated function
- // pointers and help strings.
- //
- am_util_cmdline_command_t *psCommandList;
-
- //
- // Number of supported commands. Usually just:
- // sizeof(psCommandList) / sizeof(am_util_cmdline_command_t)
- //
- uint32_t ui32NumCommands;
-
- //
- // Buffer space to use for incoming commands.
- //
- char *psCommandData;
-
- //
- // Size of command buffer. Usually just: sizeof(psCommandData)
- //
- uint32_t ui32CommandDataLen;
-
- //
- // Prompt String
- //
- char *pcPromptString;
-}
-am_util_cmdline_interface_t;
+extern uint32_t am_hal_burst_mode_enable(am_hal_burst_mode_e *peBurstStatus);
//*****************************************************************************
//
-// External variable definitions
+//! @brief Burst mode disable function
+//!
+//! @param peBurstStatus - resulting mode after call.
+//!
+//! This function disables the Apollo3 MCU from Burst Mode operation. It returns
+//! the MCU to Normal Mode.
+//!
+//! @return status of API call.
//
//*****************************************************************************
+extern uint32_t am_hal_burst_mode_disable(am_hal_burst_mode_e *peBurstStatus);
//*****************************************************************************
//
-// External function definitions
+//! @brief Return current burst mode state
+//!
+//! Implemented as a macro, this function returns the current burst mode state.
+//! AM_HAL_BURST_MODE
+//! AM_HAL_NORMAL_MODE
//
//*****************************************************************************
-extern void am_util_cmdline_process_commands(void);
-extern void am_util_cmdline_init(am_util_cmdline_interface_t *psInterface);
-extern uint32_t am_util_cmdline_run_command(char **args, uint32_t argc);
+#define am_hal_burst_mode_status() \
+ (CLKGEN->FREQCTRL_b.BURSTSTATUS ? AM_HAL_BURST_MODE : AM_HAL_NORMAL_MODE)
#ifdef __cplusplus
}
#endif
-#endif // AM_UTIL_CMDLINE_H
+#endif // AM_HAL_BURST_H
+//*****************************************************************************
+//
+// End Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_cachectrl.c b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_cachectrl.c
new file mode 100644
index 0000000..001fae0
--- /dev/null
+++ b/hw/mcu/ambiq/apollo3/src/ext/AmbiqSuite/mcu/apollo3/hal/am_hal_cachectrl.c
@@ -0,0 +1,459 @@
+//*****************************************************************************
+//
+// am_hal_cachectrl.c
+//! @file
+//!
+//! @brief Functions for interfacing with the CACHE controller.
+//!
+//! @addtogroup cachectrl3 Cache Control (CACHE)
+//! @ingroup apollo3hal
+//! @{
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Copyright (c) 2021, Ambiq Micro, Inc.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from this
+// software without specific prior written permission.
+//
+// Third party software included in this distribution is subject to the
+// additional license terms as defined in the /docs/licenses directory.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// This is part of revision release_sdk_3_0_0-742e5ac27c of the AmbiqSuite Development Package.
+//
+//*****************************************************************************
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "am_mcu_apollo.h"
+
+//*****************************************************************************
+//
+// Default settings for the cache.
+//
+//*****************************************************************************
+const am_hal_cachectrl_config_t am_hal_cachectrl_defaults =
+{
+ .bLRU = 0,
+ .eDescript = AM_HAL_CACHECTRL_DESCR_1WAY_128B_1024E,
+ .eMode = AM_HAL_CACHECTRL_CONFIG_MODE_INSTR_DATA,
+};
+
+//*****************************************************************************
+//
+// Configure the cache with given and recommended settings, but do not enable.
+//
+//*****************************************************************************
+uint32_t
+am_hal_cachectrl_config(const am_hal_cachectrl_config_t *psConfig)
+{
+ //
+ // In the case where cache is currently enabled, we need to gracefully
+ // bow out of that configuration before reconfiguring. The best way to
+ // accomplish that is to shut down the ID bits, leaving the cache enabled.
+ // Once the instr and data caches have been disabled, we can safely set
+ // any new configuration, including disabling the controller.
+ //
+ AM_CRITICAL_BEGIN
+ CACHECTRL->CACHECFG &=
+ ~(CACHECTRL_CACHECFG_DCACHE_ENABLE_Msk |
+ CACHECTRL_CACHECFG_ICACHE_ENABLE_Msk);
+ AM_CRITICAL_END
+
+ CACHECTRL->CACHECFG =
+ _VAL2FLD(CACHECTRL_CACHECFG_ENABLE, 0) |
+ _VAL2FLD(CACHECTRL_CACHECFG_CACHE_CLKGATE, 1) |
+ _VAL2FLD(CACHECTRL_CACHECFG_CACHE_LS, 0) |
+ _VAL2FLD(CACHECTRL_CACHECFG_DATA_CLKGATE, 1) |
+ _VAL2FLD(CACHECTRL_CACHECFG_ENABLE_MONITOR, 0) |
+ _VAL2FLD(CACHECTRL_CACHECFG_LRU, psConfig->bLRU) |
+ _VAL2FLD(CACHECTRL_CACHECFG_CONFIG, psConfig->eDescript) |
+ ((psConfig->eMode << CACHECTRL_CACHECFG_ICACHE_ENABLE_Pos) &
+ (CACHECTRL_CACHECFG_DCACHE_ENABLE_Msk |
+ CACHECTRL_CACHECFG_ICACHE_ENABLE_Msk));
+
+ return AM_HAL_STATUS_SUCCESS;
+
+} // am_hal_cachectrl_config()
+
+//*****************************************************************************
+//
+// Enable the cache.
+//
+//*****************************************************************************
+uint32_t
+am_hal_cachectrl_enable(void)
+{
+ //
+ // Enable the cache
+ //
+ CACHECTRL->CACHECFG |= _VAL2FLD(CACHECTRL_CACHECFG_ENABLE, 1);
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_cachectrl_enable()
+
+//*****************************************************************************
+//
+// Disable the cache.
+//
+//*****************************************************************************
+uint32_t
+am_hal_cachectrl_disable(void)
+{
+ //
+ // Shut down as gracefully as possible.
+ // Disable the I/D cache enable bits first to allow a little time
+ // for any in-flight transactions to hand off to the line buffer.
+ // Then clear the enable.
+ //
+ AM_CRITICAL_BEGIN
+ CACHECTRL->CACHECFG &= ~(_VAL2FLD(CACHECTRL_CACHECFG_ICACHE_ENABLE, 1) |
+ _VAL2FLD(CACHECTRL_CACHECFG_DCACHE_ENABLE, 1));
+ CACHECTRL->CACHECFG &= ~_VAL2FLD(CACHECTRL_CACHECFG_ENABLE, 1);
+ AM_CRITICAL_END
+
+ return AM_HAL_STATUS_SUCCESS;
+} // am_hal_cachectrl_disable()
+
+//*****************************************************************************
+//
+// Control helper functions.
+//
+//*****************************************************************************
+static bool
+set_LPMMODE(uint32_t ui32value)
+{
+ uint32_t ui32Val;
+ uint32_t *pui32RegAddr;
+
+ if ( ui32value > (CACHECTRL_FLASHCFG_LPMMODE_Msk >> CACHECTRL_FLASHCFG_LPMMODE_Pos) )
+ {
+ return false;
+ }
+
+ //
+ // Compute register address (assumes each reg is 1 word offset).
+ //
+ pui32RegAddr = (uint32_t*)&CACHECTRL->FLASHCFG;
+
+ AM_CRITICAL_BEGIN
+ ui32Val = am_hal_flash_load_ui32(pui32RegAddr);
+ ui32Val &= ~(CACHECTRL_FLASHCFG_LPMMODE_Msk |
+ CACHECTRL_FLASHCFG_LPM_RD_WAIT_Msk);
+ ui32Val |= _VAL2FLD(CACHECTRL_FLASHCFG_LPMMODE, ui32value) |
+ _VAL2FLD(CACHECTRL_FLASHCFG_LPM_RD_WAIT, 0x7);
+ am_hal_flash_store_ui32(pui32RegAddr, ui32Val);
+ AM_CRITICAL_END
+
+ return true;
+} // set_LPMMODE()
+
+static bool
+set_SEDELAY(uint32_t ui32value)
+{
+ uint32_t ui32Val;
+ uint32_t *pui32RegAddr;
+
+ if ( ui32value > (CACHECTRL_FLASHCFG_SEDELAY_Msk >> CACHECTRL_FLASHCFG_SEDELAY_Pos) )
+ {
+ return false;
+ }
+
+ //
+ // Compute register address (assumes each reg is 1 word offset).
+ //
+ pui32RegAddr = (uint32_t*)&CACHECTRL->FLASHCFG;
+
+ AM_CRITICAL_BEGIN
+ ui32Val = am_hal_flash_load_ui32(pui32RegAddr);
+ ui32Val &= ~(CACHECTRL_FLASHCFG_SEDELAY_Msk |
+ CACHECTRL_FLASHCFG_LPM_RD_WAIT_Msk);
+ ui32Val |= _VAL2FLD(CACHECTRL_FLASHCFG_SEDELAY, ui32value) |
+ _VAL2FLD(CACHECTRL_FLASHCFG_LPM_RD_WAIT, 0x7);
+ am_hal_flash_store_ui32(pui32RegAddr, ui32Val);
+ AM_CRITICAL_END
+
+ return true;
+} // set_SEDELAY()
+
+static bool
+set_RDWAIT(uint32_t ui32value)
+{
+ uint32_t ui32Val;
+ uint32_t *pui32RegAddr;
+
+ if ( ui32value > (CACHECTRL_FLASHCFG_RD_WAIT_Msk >> CACHECTRL_FLASHCFG_RD_WAIT_Pos) )
+ {
+ return false;
+ }
+
+ //
+ // Compute register address (assumes each reg is 1 word offset).
+ //
+ pui32RegAddr = (uint32_t*)&CACHECTRL->FLASHCFG;
+
+ AM_CRITICAL_BEGIN
+ ui32Val = am_hal_flash_load_ui32(pui32RegAddr);
+ ui32Val &= ~(CACHECTRL_FLASHCFG_RD_WAIT_Msk |
+ CACHECTRL_FLASHCFG_LPM_RD_WAIT_Msk);
+ ui32Val |= _VAL2FLD(CACHECTRL_FLASHCFG_RD_WAIT, ui32value) |
+ _VAL2FLD(CACHECTRL_FLASHCFG_LPM_RD_WAIT, 0x7);
+ am_hal_flash_store_ui32(pui32RegAddr, ui32Val);
+ AM_CRITICAL_END
+
+ return true;
+} // set_RDWAIT()
+
+//*****************************************************************************
+//
+// Select the cache configuration type.
+//
+//*****************************************************************************
+uint32_t
+am_hal_cachectrl_control(am_hal_cachectrl_control_e eControl, void *pArgs)
+{
+ uint32_t ui32Arg;
+ uint32_t ui32SetMask = 0;
+
+ switch ( eControl )
+ {
+ case AM_HAL_CACHECTRL_CONTROL_FLASH_CACHE_INVALIDATE:
+ ui32SetMask = CACHECTRL_CTRL_INVALIDATE_Msk;
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_STATISTICS_RESET:
+ if ( !_FLD2VAL(CACHECTRL_CACHECFG_ENABLE_MONITOR, CACHECTRL->CACHECFG) )
+ {
+ //
+ // The monitor must be enabled for the reset to have any affect.
+ //
+ return AM_HAL_STATUS_INVALID_OPERATION;
+ }
+ else
+ {
+ ui32SetMask = CACHECTRL_CTRL_RESET_STAT_Msk;
+ }
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_FLASH_ALL_SLEEP_ENABLE:
+ ui32SetMask = CACHECTRL_CTRL_FLASH0_SLM_ENABLE_Msk |
+ CACHECTRL_CTRL_FLASH1_SLM_ENABLE_Msk;
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_FLASH_ALL_SLEEP_DISABLE:
+ ui32SetMask = CACHECTRL_CTRL_FLASH0_SLM_DISABLE_Msk |
+ CACHECTRL_CTRL_FLASH1_SLM_DISABLE_Msk;
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_FLASH0_SLEEP_ENABLE:
+ ui32SetMask = CACHECTRL_CTRL_FLASH0_SLM_ENABLE_Msk;
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_FLASH0_SLEEP_DISABLE:
+ ui32SetMask = CACHECTRL_CTRL_FLASH0_SLM_DISABLE_Msk;
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_FLASH1_SLEEP_ENABLE:
+ ui32SetMask = CACHECTRL_CTRL_FLASH1_SLM_ENABLE_Msk;
+ break;
+ case AM_HAL_CACHECTRL_CONTROL_FLASH1_SLEEP_DISABLE:
+ ui32SetMask = CACHECTRL_CTRL_FLASH1_SLM_DISABLE_Msk;
+ break;
... 39433 lines suppressed ...