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Posted to commits@impala.apache.org by st...@apache.org on 2020/04/07 21:52:29 UTC

[impala] 03/03: IMPALA-9545 Decide cacheline size of aarch64

This is an automated email from the ASF dual-hosted git repository.

stigahuang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/impala.git

commit dbd22365fdaf56b1a76ba8d3b6460222f809090f
Author: zhaorenhai <zh...@hotmail.com>
AuthorDate: Wed Mar 25 06:07:29 2020 +0000

    IMPALA-9545 Decide cacheline size of aarch64
    
    ARM64's L3 cacheline size is different according
     to CPU vendor's architecture. If user defined
     CACHELINESIZE_AARCH64 in impala-config-local.sh,
    then we will use that value, if user did not
     define it, then we will get the value from OS,
    if fail, then we will use the default value 64.
    
    Change-Id: Id56bfa63e4b6cd957c4997f10de78a5f4111f61f
    Reviewed-on: http://gerrit.cloudera.org:8080/15555
    Reviewed-by: Tim Armstrong <ta...@cloudera.com>
    Tested-by: Impala Public Jenkins <im...@cloudera.com>
---
 CMakeLists.txt      |  5 +++++
 be/CMakeLists.txt   |  8 ++++++++
 be/src/gutil/port.h |  2 ++
 buildall.sh         | 17 +++++++++++++++++
 4 files changed, 32 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 52a60ee..517717c 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -385,6 +385,11 @@ find_package(KRPC REQUIRED)
 
 # KuduClient can use GLOG
 add_definitions(-DKUDU_HEADERS_USE_GLOG)
+
+if (CMAKE_SYSTEM_NAME MATCHES "Linux" AND CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64")
+  add_definitions(-DCACHELINESIZE_AARCH64=${CACHELINESIZE_AARCH64})
+endif()
+
 if(NOT $ENV{KUDU_CLIENT_DIR} EQUAL "")
   set(kuduClient_DIR "$ENV{KUDU_CLIENT_DIR}/usr/local/share/kuduClient/cmake")
 else()
diff --git a/be/CMakeLists.txt b/be/CMakeLists.txt
index a892b1f..8575859 100644
--- a/be/CMakeLists.txt
+++ b/be/CMakeLists.txt
@@ -42,6 +42,9 @@ PROJECT(ASSEMBLER)
 #  -pthread: enable multithreaded malloc
 #  -DBOOST_DATE_TIME_POSIX_TIME_STD_CONFIG: enable nanosecond precision for boost
 #  -fno-omit-frame-pointers: Keep frame pointer for functions in register
+if (CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64")
+  SET(CXX_COMMON_FLAGS "${CXX_COMMON_FLAGS} -march=armv8-a+crc")
+endif()
 SET(CXX_COMMON_FLAGS "${CXX_COMMON_FLAGS} -Wall -Wno-sign-compare -Wno-unknown-pragmas -pthread")
 SET(CXX_COMMON_FLAGS "${CXX_COMMON_FLAGS} -fno-strict-aliasing -fno-omit-frame-pointer")
 SET(CXX_COMMON_FLAGS "${CXX_COMMON_FLAGS} -fsigned-char")
@@ -229,6 +232,11 @@ add_definitions(-DKUDU_HEADERS_USE_RICH_SLICE -DKUDU_HEADERS_NO_STUBS)
 set(CLANG_IR_CXX_FLAGS "-emit-llvm" "-c" "-std=c++14" "-DIR_COMPILE" "-DHAVE_INTTYPES_H"
   "-DHAVE_NETINET_IN_H" "-DBOOST_DATE_TIME_POSIX_TIME_STD_CONFIG" "-DBOOST_NO_EXCEPTIONS"
   "-fcolor-diagnostics" "-Wno-deprecated" "-Wno-return-type-c-linkage" "-O1")
+
+if (CMAKE_SYSTEM_NAME MATCHES "Linux" AND CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64")
+  set(CLANG_IR_CXX_FLAGS "${CLANG_IR_CXX_FLAGS}" "-DCACHELINESIZE_AARCH64=${CACHELINESIZE_AARCH64}")
+endif()
+
 # -Werror: compile warnings should be errors when using the toolchain compiler.
 set(CLANG_IR_CXX_FLAGS "${CLANG_IR_CXX_FLAGS}" "-Werror")
 
diff --git a/be/src/gutil/port.h b/be/src/gutil/port.h
index e258dba..964e009 100644
--- a/be/src/gutil/port.h
+++ b/be/src/gutil/port.h
@@ -325,6 +325,8 @@ inline void* memrchr(const void* bytes, int find_char, size_t len) {
 // TODO(user) This is the L1 D-cache line size of our Power7 machines.
 // Need to check if this is appropriate for other PowerPC64 systems.
 #define CACHELINE_SIZE 128
+#elif defined(__aarch64__) && defined(__linux__)
+#define CACHELINE_SIZE CACHELINESIZE_AARCH64
 #elif defined(__arm__)
 // Cache line sizes for ARM: These values are not strictly correct since
 // cache line sizes depend on implementations, not architectures.  There
diff --git a/buildall.sh b/buildall.sh
index 96b4abc..08dfa3b 100755
--- a/buildall.sh
+++ b/buildall.sh
@@ -461,6 +461,23 @@ generate_cmake_files() {
   else
     CMAKE_ARGS+=(-DCMAKE_TOOLCHAIN_FILE=$IMPALA_HOME/cmake_modules/toolchain.cmake)
   fi
+
+  # ARM64's L3 cacheline size is different according to CPU vendor's implementations of
+  # architecture. so here we will let use decide this value.
+  # If user defined CACHELINESIZE_AARCH64 in impala-config-local.sh, then we will use that
+  # value, if user did not define it, then we will get the value from OS, if fail, then
+  # we will use the default value 64.
+  if [[ "$(uname -p)" = "aarch64" &&  "$(uname -s)" = "Linux" ]]; then
+    local cachelinesize=$(cat /sys/devices/system/cpu/cpu0/cache/index3/coherency_line_size)
+    if [[ $cachelinesize -gt 0 ]]; then
+      CACHELINESIZE_AARCH64=${CACHELINESIZE_AARCH64-$cachelinesize}
+    else
+      CACHELINESIZE_AARCH64=${CACHELINESIZE_AARCH64-64}
+    fi
+    echo "CACHELINESIZE_AARCH64:$CACHELINESIZE_AARCH64"
+    CMAKE_ARGS+=(-DCACHELINESIZE_AARCH64=$CACHELINESIZE_AARCH64)
+  fi
+
   cmake . ${CMAKE_ARGS[@]}
 }