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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2021/03/31 18:35:11 UTC
[GitHub] [incubator-nuttx] acassis opened a new pull request #3261: esp32-c3: Add support to RNG peripheral
acassis opened a new pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261
## Summary
Add support to RNG peripheral
## Impact
Only ESP32-C3
## Testing
ESP32C3-Devkitc
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[GitHub] [incubator-nuttx] gustavonihei commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
gustavonihei commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605952598
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,273 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+static int esp32c3_rng_open(FAR struct file *filep);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+ /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+ /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+ _info("Initializing RNG\n");
+
+ memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+ nxsem_init(&g_rngdev.rd_sem, 0, 1);
+ nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+ esp32c3_rng_stop();
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+ /* O_NONBLOCK is not supported */
+
+ if (filep->f_oflags & O_NONBLOCK)
+ {
+ _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+ return -EPERM;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen)
+{
+ FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+ ssize_t read_len;
+ uint8_t *rd_buf = (uint8_t *)buffer;
+
+ if (nxsem_wait(&priv->rd_sem) != OK)
+ {
+ return -EBUSY;
+ }
+
+ read_len = buflen;
+
+ /* start RNG and wait until the buffer is filled */
+
+ esp32c3_rng_start();
+
+ /* Now, got data */
Review comment:
```suggestion
/* Now, got data */
```
This comment is not needed here, since the previous comment states that it will wait for the buffer to be filled, which will be done in the `while` loop.
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[GitHub] [incubator-nuttx] Ouss4 commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
Ouss4 commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605852432
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,289 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+ /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+ /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+ _info("Initializing RNG\n");
+
+ memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+ nxsem_init(&g_rngdev.rd_sem, 0, 1);
+ nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+ esp32c3_rng_stop();
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+ /* O_NONBLOCK is not supported */
+
+ if (filep->f_oflags & O_NONBLOCK)
+ {
+ _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+ return -EPERM;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen)
+{
+ FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+ ssize_t read_len;
+ uint8_t *rd_buf = (uint8_t *)buffer;
+
+ if (nxsem_wait(&priv->rd_sem) != OK)
+ {
+ return -EBUSY;
+ }
+
+ read_len = buflen;
+
+ /* start RNG and wait until the buffer is filled */
+
+ esp32c3_rng_start();
+
+ /* Now, got data */
+
+ while (buflen > 0)
+ {
+ uint32_t word = esp_random();
+ uint32_t to_copy = MIN(sizeof(word), buflen);
+
+ memcpy(rd_buf, &word, to_copy);
+ rd_buf += to_copy;
+ buflen -= to_copy;
+ }
+
+ /* Release rd_sem for next read */
+
+ nxsem_post(&priv->rd_sem);
+
+ return read_len;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ * Initialize the RNG hardware and register the /dev/random driver.
+ * Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+ static pthread_once_t once_control = PTHREAD_ONCE_INIT;
+ int ret;
+
+ ret = pthread_once(&once_control, esp32c3_rng_initialize);
Review comment:
This is not needed.
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[GitHub] [incubator-nuttx] acassis commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
acassis commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605875253
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,289 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+ /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+ /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+ _info("Initializing RNG\n");
+
+ memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+ nxsem_init(&g_rngdev.rd_sem, 0, 1);
+ nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+ esp32c3_rng_stop();
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+ /* O_NONBLOCK is not supported */
+
+ if (filep->f_oflags & O_NONBLOCK)
+ {
+ _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+ return -EPERM;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen)
+{
+ FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+ ssize_t read_len;
+ uint8_t *rd_buf = (uint8_t *)buffer;
+
+ if (nxsem_wait(&priv->rd_sem) != OK)
+ {
+ return -EBUSY;
+ }
+
+ read_len = buflen;
+
+ /* start RNG and wait until the buffer is filled */
+
+ esp32c3_rng_start();
+
+ /* Now, got data */
+
+ while (buflen > 0)
+ {
+ uint32_t word = esp_random();
+ uint32_t to_copy = MIN(sizeof(word), buflen);
+
+ memcpy(rd_buf, &word, to_copy);
+ rd_buf += to_copy;
+ buflen -= to_copy;
+ }
+
+ /* Release rd_sem for next read */
+
+ nxsem_post(&priv->rd_sem);
+
+ return read_len;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ * Initialize the RNG hardware and register the /dev/random driver.
+ * Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+ static pthread_once_t once_control = PTHREAD_ONCE_INIT;
+ int ret;
+
+ ret = pthread_once(&once_control, esp32c3_rng_initialize);
Review comment:
Yes, I think you are right. Probably it check to avoid running xxxx_rng_initialize() twice was added to ```arch/arm/src/nrf52/nrf52_rng.c because``` because someone thought it could be called from devrandom_register() and devurandom_register() during the boot, but the #ifndef is protecting it. I'll remove it!
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[GitHub] [incubator-nuttx] acassis commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
acassis commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r606204897
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,273 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+static int esp32c3_rng_open(FAR struct file *filep);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+ /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+ /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+ _info("Initializing RNG\n");
+
+ memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+ nxsem_init(&g_rngdev.rd_sem, 0, 1);
+ nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+ esp32c3_rng_stop();
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+ /* O_NONBLOCK is not supported */
+
+ if (filep->f_oflags & O_NONBLOCK)
+ {
+ _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+ return -EPERM;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen)
+{
+ FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+ ssize_t read_len;
+ uint8_t *rd_buf = (uint8_t *)buffer;
+
+ if (nxsem_wait(&priv->rd_sem) != OK)
+ {
+ return -EBUSY;
+ }
+
+ read_len = buflen;
+
+ /* start RNG and wait until the buffer is filled */
+
+ esp32c3_rng_start();
+
+ /* Now, got data */
Review comment:
Fixed!
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[GitHub] [incubator-nuttx] gustavonihei commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
gustavonihei commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605952598
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,273 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+static int esp32c3_rng_open(FAR struct file *filep);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+ /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+ /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+ _info("Initializing RNG\n");
+
+ memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+ nxsem_init(&g_rngdev.rd_sem, 0, 1);
+ nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+ esp32c3_rng_stop();
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+ /* O_NONBLOCK is not supported */
+
+ if (filep->f_oflags & O_NONBLOCK)
+ {
+ _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+ return -EPERM;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen)
+{
+ FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+ ssize_t read_len;
+ uint8_t *rd_buf = (uint8_t *)buffer;
+
+ if (nxsem_wait(&priv->rd_sem) != OK)
+ {
+ return -EBUSY;
+ }
+
+ read_len = buflen;
+
+ /* start RNG and wait until the buffer is filled */
+
+ esp32c3_rng_start();
+
+ /* Now, got data */
Review comment:
```suggestion
/* Now, got data */
```
This comment is not needed here, since the previous comment states that it will wait for the buffer to be filled.
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[GitHub] [incubator-nuttx] acassis commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
acassis commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605875253
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,289 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_start
+ ****************************************************************************/
+
+static void esp32c3_rng_start(void)
+{
+ /* Nothing to do, bootloader already did it */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_stop
+ ****************************************************************************/
+
+static void esp32c3_rng_stop(void)
+{
+ /* Nothing to do */
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_initialize
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void)
+{
+ _info("Initializing RNG\n");
+
+ memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
+
+ nxsem_init(&g_rngdev.rd_sem, 0, 1);
+ nxsem_set_protocol(&g_rngdev.rd_sem, SEM_PRIO_NONE);
+
+ esp32c3_rng_stop();
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
+
+static int esp32c3_rng_open(FAR struct file *filep)
+{
+ /* O_NONBLOCK is not supported */
+
+ if (filep->f_oflags & O_NONBLOCK)
+ {
+ _err("ESP32-C3 RNG doesn't support O_NONBLOCK mode.\n");
+ return -EPERM;
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_read
+ ****************************************************************************/
+
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen)
+{
+ FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev;
+ ssize_t read_len;
+ uint8_t *rd_buf = (uint8_t *)buffer;
+
+ if (nxsem_wait(&priv->rd_sem) != OK)
+ {
+ return -EBUSY;
+ }
+
+ read_len = buflen;
+
+ /* start RNG and wait until the buffer is filled */
+
+ esp32c3_rng_start();
+
+ /* Now, got data */
+
+ while (buflen > 0)
+ {
+ uint32_t word = esp_random();
+ uint32_t to_copy = MIN(sizeof(word), buflen);
+
+ memcpy(rd_buf, &word, to_copy);
+ rd_buf += to_copy;
+ buflen -= to_copy;
+ }
+
+ /* Release rd_sem for next read */
+
+ nxsem_post(&priv->rd_sem);
+
+ return read_len;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: devrandom_register
+ *
+ * Description:
+ * Initialize the RNG hardware and register the /dev/random driver.
+ * Must be called BEFORE devurandom_register.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_RANDOM
+void devrandom_register(void)
+{
+ static pthread_once_t once_control = PTHREAD_ONCE_INIT;
+ int ret;
+
+ ret = pthread_once(&once_control, esp32c3_rng_initialize);
Review comment:
Yes, I think you are right. Probably this check to avoid running xxxx_rng_initialize() twice was added to ```arch/arm/src/nrf52/nrf52_rng.c because``` because someone thought it could be called from devrandom_register() and devurandom_register() during the boot, but the #ifndef is protecting it. I'll remove it!
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[GitHub] [incubator-nuttx] xiaoxiang781216 merged pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261
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[GitHub] [incubator-nuttx] saramonteiro commented on a change in pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
saramonteiro commented on a change in pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#discussion_r605671429
##########
File path: arch/risc-v/src/esp32c3/esp32c3_rng.c
##########
@@ -0,0 +1,282 @@
+/****************************************************************************
+ * arch/risc-v/src/esp32c3/esp32c3_rng.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <debug.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/drivers/drivers.h>
+
+#include "riscv_arch.h"
+#include "esp32c3_attr.h"
+#include "hardware/wdev_reg.h"
+#include "esp32c3_clockconfig.h"
+
+#if defined(CONFIG_ESP32C3_RNG)
+#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef MIN
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int esp32c3_rng_initialize(void);
+static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer,
+ size_t buflen);
+static int esp32c3_rng_open(FAR struct file *filep);
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct rng_dev_s
+{
+ uint8_t *rd_buf;
+ sem_t rd_sem; /* semaphore for read RNG data */
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct rng_dev_s g_rngdev;
+
+static const struct file_operations g_rngops =
+{
+ .open = esp32c3_rng_open, /* open */
+ .read = esp32c3_rng_read, /* read */
+};
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32c3_random
+ ****************************************************************************/
+
+uint32_t IRAM_ATTR esp_random(void)
+{
+ /* The PRNG which implements WDEV_RANDOM register gets 2 bits
+ * of extra entropy from a hardware randomness source every APB clock cycle
+ * (provided WiFi or BT are enabled). To make sure entropy is not drained
+ * faster than it is added, this function needs to wait for at least 16 APB
+ * clock cycles after reading previous word. This implementation may
+ * actually wait a bit longer due to extra time spent in arithmetic and
+ * branch statements.
+ *
+ * As a (probably unnecessary) precaution to avoid returning the
+ * RNG state as-is, the result is XORed with additional
+ * WDEV_RND_REG reads while waiting.
+ */
+
+ uint32_t cpu_to_apb_freq_ratio = esp32c3_clk_cpu_freq() /
+ esp32c3_clk_apb_freq();
+
+ static uint32_t last_ccount = 0;
+ uint32_t ccount;
+ uint32_t result = 0;
+
+ do
+ {
+ ccount = esp32c3_cpu_cycle_count();
+ result ^= getreg32(WDEV_RND_REG);
+ }
+ while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
+
+ last_ccount = ccount;
+ return result ^ getreg32(WDEV_RND_REG);
+}
+
+/****************************************************************************
+ * Name: esp32c3_rng_open
+ ****************************************************************************/
Review comment:
```suggestion
```
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[GitHub] [incubator-nuttx] acassis commented on pull request #3261: esp32-c3: Add support to RNG peripheral
Posted by GitBox <gi...@apache.org>.
acassis commented on pull request #3261:
URL: https://github.com/apache/incubator-nuttx/pull/3261#issuecomment-812854183
@xiaoxiang781216 / @Ouss4 please merge it
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