You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@mynewt.apache.org by ma...@apache.org on 2016/05/19 16:51:19 UTC
[07/18] incubator-mynewt-core git commit: libs/os;
coredumps for Cortex-M0.
libs/os; coredumps for Cortex-M0.
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/e157f021
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/e157f021
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/e157f021
Branch: refs/heads/develop
Commit: e157f02130a7cea4f1467c68b9df4fa3a0640497
Parents: 61ca3db
Author: Marko Kiiskila <ma...@runtime.io>
Authored: Tue May 17 15:25:35 2016 -0700
Committer: Marko Kiiskila <ma...@runtime.io>
Committed: Thu May 19 09:34:27 2016 -0700
----------------------------------------------------------------------
libs/os/pkg.yml | 4 ++
libs/os/src/arch/cortex_m0/os_fault.c | 103 +++++++++++++++++++++++------
2 files changed, 87 insertions(+), 20 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e157f021/libs/os/pkg.yml
----------------------------------------------------------------------
diff --git a/libs/os/pkg.yml b/libs/os/pkg.yml
index 98eeb3c..85133e1 100644
--- a/libs/os/pkg.yml
+++ b/libs/os/pkg.yml
@@ -33,5 +33,9 @@ pkg.deps.SHELL:
- libs/shell
pkg.cflags.SHELL: -DSHELL_PRESENT
+pkg.deps.COREDUMP:
+ - sys/coredump
+pkg.cflags.COREDUMP: -DCOREDUMP_PRESENT
+
# Satisfy capability dependencies for the self-contained test executable.
pkg.deps.SELFTEST: libs/console/stub
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/e157f021/libs/os/src/arch/cortex_m0/os_fault.c
----------------------------------------------------------------------
diff --git a/libs/os/src/arch/cortex_m0/os_fault.c b/libs/os/src/arch/cortex_m0/os_fault.c
index c46f8a8..f3d1ffb 100644
--- a/libs/os/src/arch/cortex_m0/os_fault.c
+++ b/libs/os/src/arch/cortex_m0/os_fault.c
@@ -6,7 +6,7 @@
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
- *
+ *
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
@@ -19,30 +19,14 @@
#include <console/console.h>
#include <hal/hal_system.h>
+#ifdef COREDUMP_PRESENT
+#include <coredump/coredump.h>
+#endif
#include "os/os.h"
#include <stdint.h>
#include <unistd.h>
-int os_die_line;
-const char *os_die_module;
-
-void __assert_func(const char *file, int line, const char *func, const char *e);
-
-void
-__assert_func(const char *file, int line, const char *func, const char *e)
-{
- int sr;
-
- OS_ENTER_CRITICAL(sr);
- (void)sr;
- os_die_line = line;
- os_die_module = file;
- console_blocking_mode();
- console_printf("Assert %s; failed in %s:%d\n", e ? e : "", file, line);
- system_reset();
-}
-
struct exception_frame {
uint32_t r0;
uint32_t r1;
@@ -67,9 +51,84 @@ struct trap_frame {
uint32_t lr; /* this LR holds EXC_RETURN */
};
+struct coredump_regs {
+ uint32_t r0;
+ uint32_t r1;
+ uint32_t r2;
+ uint32_t r3;
+ uint32_t r4;
+ uint32_t r5;
+ uint32_t r6;
+ uint32_t r7;
+ uint32_t r8;
+ uint32_t r9;
+ uint32_t r10;
+ uint32_t r11;
+ uint32_t r12;
+ uint32_t sp;
+ uint32_t lr;
+ uint32_t pc;
+ uint32_t psr;
+};
+
+void __assert_func(const char *file, int line, const char *func, const char *e);
+
+#ifdef COREDUMP_PRESENT
+static void
+trap_to_coredump(struct trap_frame *tf, struct coredump_regs *regs)
+{
+ regs->r0 = tf->ef->r0;
+ regs->r1 = tf->ef->r1;
+ regs->r2 = tf->ef->r2;
+ regs->r3 = tf->ef->r3;
+ regs->r4 = tf->r4;
+ regs->r5 = tf->r5;
+ regs->r6 = tf->r6;
+ regs->r7 = tf->r7;
+ regs->r8 = tf->r8;
+ regs->r9 = tf->r9;
+ regs->r10 = tf->r10;
+ regs->r11 = tf->r11;
+ regs->r12 = tf->ef->r12;
+ /*
+ * SP just before exception for the coredump.
+ * See ARMv7-M Architecture Ref Manual, sections B1.5.6 - B1.5.8
+ * SP is adjusted by 0x20.
+ * If SCB->CCR.STKALIGN is set, SP is aligned to 8-byte boundary on
+ * exception entry.
+ * If this alignment adjustment happened, xPSR will have bit 9 set.
+ */
+ regs->sp = ((uint32_t)tf->ef) + 0x20;
+ if ((SCB->CCR & SCB_CCR_STKALIGN_Msk) & tf->ef->psr & (1 << 9)) {
+ regs->sp += 4;
+ }
+ regs->lr = tf->ef->lr;
+ regs->pc = tf->ef->pc;
+ regs->psr = tf->ef->psr;
+}
+#endif
+
+void
+__assert_func(const char *file, int line, const char *func, const char *e)
+{
+ int sr;
+
+ OS_ENTER_CRITICAL(sr);
+ (void)sr;
+ console_blocking_mode();
+ console_printf("Assert %s; failed in %s:%d\n", e ? e : "", file, line);
+ SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
+ /* Exception happens right away. Next line not executed. */
+ system_reset();
+}
+
void
os_default_irq(struct trap_frame *tf)
{
+#ifdef COREDUMP_PRESENT
+ struct coredump_regs regs;
+#endif
+
console_blocking_mode();
console_printf("Unhandled interrupt (%ld), exception sp 0x%08lx\n",
SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk, (uint32_t)tf->ef);
@@ -82,6 +141,10 @@ os_default_irq(struct trap_frame *tf)
console_printf("r12:0x%08lx lr:0x%08lx pc:0x%08lx psr:0x%08lx\n",
tf->ef->r12, tf->ef->lr, tf->ef->pc, tf->ef->psr);
console_printf("ICSR:0x%08lx\n", SCB->ICSR);
+#ifdef COREDUMP_PRESENT
+ trap_to_coredump(tf, ®s);
+ dump_core(®s, sizeof(regs));
+#endif
system_reset();
}