[jira] [Resolved] (MYNEWT-798) Check/fix controller on BSP with synthesized 32k clock

["Andrzej Kaczmarek (JIRA)" <ji...@apache.org>]

     [ https://issues.apache.org/jira/browse/MYNEWT-798?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ]

Andrzej Kaczmarek resolved MYNEWT-798.
--------------------------------------
       Resolution: Fixed
    Fix Version/s: v1_1_0_rel

synthesized 32k clock works as long as HFXO is running so microbit and bmd200 bsps are configured accordingly. also sca is set to 250ppm to match syntesized clock accuracy as per specs.

https://github.com/apache/mynewt-core/pull/410

> Check/fix controller on BSP with synthesized 32k clock
> ------------------------------------------------------
>
>                 Key: MYNEWT-798
>                 URL: https://issues.apache.org/jira/browse/MYNEWT-798
>             Project: Mynewt
>          Issue Type: Bug
>      Security Level: Public(Viewable by anyone) 
>          Components: Nimble
>            Reporter: Andrzej Kaczmarek
>            Assignee: Andrzej Kaczmarek
>             Fix For: v1_1_0_rel
>
>
> Since code for 1 MHz clock is removed from Nimble controller and the only supported option is 32768 kHz clock, we need to check if this works properly on BSPs that do not have 32k crystal and synthesize it instead (bbc micro, bmd200) as SCA is affected in this case most likely.



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