[GitHub] [tvm] FrozenGene commented on a change in pull request #7635: [Autoscheduler][Sparse] Add sparse dense end to end model tuning support for x86/arm cpu & Some bug fix

[GitBox <gi...@apache.org>]

FrozenGene commented on a change in pull request #7635:
URL: https://github.com/apache/tvm/pull/7635#discussion_r593042787



##########
File path: python/tvm/relay/op/strategy/arm_cpu.py
##########
@@ -135,6 +136,14 @@ def conv2d_strategy_arm_cpu(attrs, inputs, out_type, target):
                     name="conv2d_direct_simd.micro_dev",
                 )
             elif kernel_layout == "HWIO":
+                if is_auto_scheduler_enabled():

Review comment:
       For winograd, I have tested on ARM, the best value is ` 64 <= co < 512`.
   
   For depthwise convolution,  we shouldn't enter into `NCHWc`.  And should be:
   ```python
           elif layout == "NHWC":
               assert kernel_layout == "HWOI"
               from tvm.auto_scheduler import is_auto_scheduler_enabled
               if is_auto_scheduler_enabled():
                   strategy.add_implementation(
                       wrap_compute_conv2d(topi.nn.depthwise_conv2d_nhwc),
                       naive_schedule,
                       name="depthwise_conv2d_nhwc.arm_cpu",
                   )
               else:
                   strategy.add_implementation(
                       wrap_compute_conv2d(topi.arm_cpu.compute_depthwise_conv2d_nhwc),
                       wrap_topi_schedule(topi.arm_cpu.schedule_depthwise_conv2d_nhwc),
                       name="depthwise_conv2d_nhwc.arm_cpu",
                   )
   ```
                   
   




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