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Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/07/10 14:25:04 UTC
[nuttx] branch master updated (389df1ec1f -> 3ef9f4a0b7)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
from 389df1ec1f cmake: add intial support for nrf91
new 05578896e2 arch/arm/src/armv7-a/arm_timer.c: Fix nxstyle errors
new 7d69f8cbcd arch/arm/src/armv7-r/arm_timer.c: Fix nuttx coding style
new 6dc930b82b arch/arm/src/armv7-r/gic.h: Fix nuttx coding style
new d6182ee36e arch/arm/src/armv8-r/arm_arch_timer.h: Fix nuttx coding style
new 13924bb901 arch/arm/src/lc823450/lc823450_spifi2.h: Fix nuttx coding style
new 14b4d3b8ea arch/arm/src/lpc2378/lpc23xx_pinsel.h: Fix nuttx coding style
new 3ef9f4a0b7 arch/arm/src/lpc2378/lpc23xx_uart.h: Fix nuttx coding style
The 7 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/armv7-a/arm_timer.c | 6 ++---
arch/arm/src/armv7-r/arm_timer.c | 6 ++---
arch/arm/src/armv7-r/gic.h | 48 ++++++++++++++++-----------------
arch/arm/src/armv8-r/arm_arch_timer.h | 6 ++---
arch/arm/src/lc823450/lc823450_spifi2.h | 2 +-
arch/arm/src/lpc2378/lpc23xx_pinsel.h | 2 +-
arch/arm/src/lpc2378/lpc23xx_uart.h | 8 +++---
7 files changed, 39 insertions(+), 39 deletions(-)
[nuttx] 06/07: arch/arm/src/lpc2378/lpc23xx_pinsel.h: Fix nuttx coding style
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 14b4d3b8ea62d33166d872f931e2425708ee0433
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 13:14:10 2023 +0200
arch/arm/src/lpc2378/lpc23xx_pinsel.h: Fix nuttx coding style
Remove TABs
---
arch/arm/src/lpc2378/lpc23xx_pinsel.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/src/lpc2378/lpc23xx_pinsel.h b/arch/arm/src/lpc2378/lpc23xx_pinsel.h
index cace867f51..e4697a065f 100644
--- a/arch/arm/src/lpc2378/lpc23xx_pinsel.h
+++ b/arch/arm/src/lpc2378/lpc23xx_pinsel.h
@@ -596,7 +596,7 @@
#define PSEL6_P3_5_MASK (0x00000c00)
#define PSEL6_P3_6_GPIO (0x00000000)
-#define PSEL6_P3_6_D6 (0x00001000)
+#define PSEL6_P3_6_D6 (0x00001000)
#define PSEL6_P3_6_RSVD2 (0x00002000)
#define PSEL6_P3_6_RSVD3 (0x00003000)
#define PSEL6_P3_6_MASK (0x00003000)
[nuttx] 07/07: arch/arm/src/lpc2378/lpc23xx_uart.h: Fix nuttx coding style
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 3ef9f4a0b72cd1622e379382c0bdb4faa40b77f9
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 13:22:26 2023 +0200
arch/arm/src/lpc2378/lpc23xx_uart.h: Fix nuttx coding style
Remove TABs
---
arch/arm/src/lpc2378/lpc23xx_uart.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/src/lpc2378/lpc23xx_uart.h b/arch/arm/src/lpc2378/lpc23xx_uart.h
index d11fae561e..97cd3bb809 100644
--- a/arch/arm/src/lpc2378/lpc23xx_uart.h
+++ b/arch/arm/src/lpc2378/lpc23xx_uart.h
@@ -64,10 +64,10 @@
*/
/* Used only if CONFIG_UART_MULVAL is not defined */
-#define DIVADDVAL 0
-#define MULVAL 1
-#define DLMVAL 1
-#define DLLVAL 119
+#define DIVADDVAL 0
+#define MULVAL 1
+#define DLMVAL 1
+#define DLLVAL 119
/* UARTx PCLK divider valid values are 1,2,4 */
#define U0_PCLKDIV 1
[nuttx] 01/07: arch/arm/src/armv7-a/arm_timer.c: Fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 05578896e2894c3fdcf6228f9777d982cf709aeb
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 12:27:40 2023 +0200
arch/arm/src/armv7-a/arm_timer.c: Fix nxstyle errors
Remove TABs
---
arch/arm/src/armv7-a/arm_timer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/src/armv7-a/arm_timer.c b/arch/arm/src/armv7-a/arm_timer.c
index 0e86c2ca27..70f7f59412 100644
--- a/arch/arm/src/armv7-a/arm_timer.c
+++ b/arch/arm/src/armv7-a/arm_timer.c
@@ -36,9 +36,9 @@
* Pre-processor Definitions
****************************************************************************/
-#define ARM_TIMER_CTRL_ENABLE (1 << 0)
-#define ARM_TIMER_CTRL_INT_MASK (1 << 1)
-#define ARM_TIMER_CTRL_INT_STAT (1 << 2)
+#define ARM_TIMER_CTRL_ENABLE (1 << 0)
+#define ARM_TIMER_CTRL_INT_MASK (1 << 1)
+#define ARM_TIMER_CTRL_INT_STAT (1 << 2)
/****************************************************************************
* Private Types
[nuttx] 04/07: arch/arm/src/armv8-r/arm_arch_timer.h: Fix nuttx coding style
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit d6182ee36ef0b76ef860d3cef7c88b88e6dfab71
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 13:05:08 2023 +0200
arch/arm/src/armv8-r/arm_arch_timer.h: Fix nuttx coding style
Remove TABs
---
arch/arm/src/armv8-r/arm_arch_timer.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/src/armv8-r/arm_arch_timer.h b/arch/arm/src/armv8-r/arm_arch_timer.h
index 342bda7baa..36489f1f9f 100644
--- a/arch/arm/src/armv8-r/arm_arch_timer.h
+++ b/arch/arm/src/armv8-r/arm_arch_timer.h
@@ -44,9 +44,9 @@
#define CONFIG_ARM_TIMER_VIRTUAL_IRQ (GIC_PPI_INT_BASE + 11)
#define CONFIG_ARM_TIMER_HYP_IRQ (GIC_PPI_INT_BASE + 10)
-#define ARM_ARCH_TIMER_IRQ CONFIG_ARM_TIMER_VIRTUAL_IRQ
-#define ARM_ARCH_TIMER_PRIO IRQ_DEFAULT_PRIORITY
-#define ARM_ARCH_TIMER_FLAGS IRQ_TYPE_LEVEL
+#define ARM_ARCH_TIMER_IRQ CONFIG_ARM_TIMER_VIRTUAL_IRQ
+#define ARM_ARCH_TIMER_PRIO IRQ_DEFAULT_PRIORITY
+#define ARM_ARCH_TIMER_FLAGS IRQ_TYPE_LEVEL
/****************************************************************************
* Public Function Prototypes
[nuttx] 02/07: arch/arm/src/armv7-r/arm_timer.c: Fix nuttx coding style
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 7d69f8cbcdca7d1da4d1fc31d5d1f36c969360a8
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 12:39:18 2023 +0200
arch/arm/src/armv7-r/arm_timer.c: Fix nuttx coding style
Remove TABs
---
arch/arm/src/armv7-r/arm_timer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/src/armv7-r/arm_timer.c b/arch/arm/src/armv7-r/arm_timer.c
index 2486d90f2c..b5102e77ce 100644
--- a/arch/arm/src/armv7-r/arm_timer.c
+++ b/arch/arm/src/armv7-r/arm_timer.c
@@ -36,9 +36,9 @@
* Pre-processor Definitions
****************************************************************************/
-#define ARM_TIMER_CTRL_ENABLE (1 << 0)
-#define ARM_TIMER_CTRL_INT_MASK (1 << 1)
-#define ARM_TIMER_CTRL_INT_STAT (1 << 2)
+#define ARM_TIMER_CTRL_ENABLE (1 << 0)
+#define ARM_TIMER_CTRL_INT_MASK (1 << 1)
+#define ARM_TIMER_CTRL_INT_STAT (1 << 2)
/****************************************************************************
* Private Types
[nuttx] 03/07: arch/arm/src/armv7-r/gic.h: Fix nuttx coding style
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 6dc930b82b8384ac1d4eaa649769173c7a0fa3b1
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 12:59:25 2023 +0200
arch/arm/src/armv7-r/gic.h: Fix nuttx coding style
Remove TABs
Fix indentation
---
arch/arm/src/armv7-r/gic.h | 48 +++++++++++++++++++++++-----------------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm/src/armv7-r/gic.h b/arch/arm/src/armv7-r/gic.h
index da694bc089..6eda8e83fa 100644
--- a/arch/arm/src/armv7-r/gic.h
+++ b/arch/arm/src/armv7-r/gic.h
@@ -267,9 +267,9 @@
* levels. As a result, PMR settings make sense.
*/
-#define GIC_ICCPMR_SHIFT (0) /* Bits 0-7: Priority mask */
+#define GIC_ICCPMR_SHIFT (0) /* Bits 0-7: Priority mask */
#define GIC_ICCPMR_MASK (0xff << GIC_ICCPMR_SHIFT)
-#define GIC_ICCPMR_VALUE(n) ((uint32_t)(n) << GIC_ICCPMR_SHIFT)
+#define GIC_ICCPMR_VALUE(n) ((uint32_t)(n) << GIC_ICCPMR_SHIFT)
/* Bits 8-31: Reserved */
@@ -296,10 +296,10 @@
#define GIC_ICCIAR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICCIAR_INTID_MASK (0x3ff << GIC_ICCIAR_INTID_SHIFT)
-#define GIC_ICCIAR_INTID(n) ((uint32_t)(n) << GIC_ICCIAR_INTID_SHIFT)
+#define GIC_ICCIAR_INTID(n) ((uint32_t)(n) << GIC_ICCIAR_INTID_SHIFT)
#define GIC_ICCIAR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCIAR_CPUSRC_MASK (7 << GIC_ICCIAR_CPUSRC_SHIFT)
-#define GIC_ICCIAR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCIAR_CPUSRC_SHIFT)
+#define GIC_ICCIAR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCIAR_CPUSRC_SHIFT)
/* Bits 13-31: Reserved */
@@ -309,10 +309,10 @@
#define GIC_ICCEOIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICCEOIR_INTID_MASK (0x3ff << GIC_ICCEOIR_INTID_SHIFT)
-#define GIC_ICCEOIR_INTID(n) ((uint32_t)(n) << GIC_ICCEOIR_INTID_SHIFT)
+#define GIC_ICCEOIR_INTID(n) ((uint32_t)(n) << GIC_ICCEOIR_INTID_SHIFT)
#define GIC_ICCEOIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCEOIR_CPUSRC_MASK (7 << GIC_ICCEOIR_CPUSRC_SHIFT)
-#define GIC_ICCEOIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCEOIR_CPUSRC_SHIFT)
+#define GIC_ICCEOIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCEOIR_CPUSRC_SHIFT)
/* Bits 13-31: Reserved */
@@ -322,7 +322,7 @@
#define GIC_ICCRPR_PRIO_SHIFT (4) /* Bits 4-7: Priority mask */
#define GIC_ICCRPR_PRIO_MASK (15 << GIC_ICCRPR_PRIO_SHIFT)
-#define GIC_ICCRPR_PRIO_VALUE(n) ((uint32_t)(n) << GIC_ICCRPR_PRIO_SHIFT)
+#define GIC_ICCRPR_PRIO_VALUE(n) ((uint32_t)(n) << GIC_ICCRPR_PRIO_SHIFT)
/* Bits 8-31: Reserved */
@@ -330,10 +330,10 @@
#define GIC_ICCHPIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICCHPIR_INTID_MASK (0x3ff << GIC_ICCHPIR_INTID_SHIFT)
-#define GIC_ICCHPIR_INTID(n) ((uint32_t)(n) << GIC_ICCHPIR_INTID_SHIFT)
+#define GIC_ICCHPIR_INTID(n) ((uint32_t)(n) << GIC_ICCHPIR_INTID_SHIFT)
#define GIC_ICCHPIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCHPIR_CPUSRC_MASK (7 << GIC_ICCHPIR_CPUSRC_SHIFT)
-#define GIC_ICCHPIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCHPIR_CPUSRC_SHIFT)
+#define GIC_ICCHPIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCHPIR_CPUSRC_SHIFT)
/* Bits 13-31: Reserved */
@@ -391,7 +391,7 @@
* The corresponding bits in the ICDISERn are read as one, write ignored
*/
-#define GIC_ICDISER_INT(n) GIC_MASK32(n)
+#define GIC_ICDISER_INT(n) GIC_MASK32(n)
/* Interrupt Clear-Enable.
*
@@ -399,25 +399,25 @@
* The corresponding bits in the ICDICERn are read as one, write ignored
*/
-#define GIC_ICDICER_INT(n) GIC_MASK32(n)
+#define GIC_ICDICER_INT(n) GIC_MASK32(n)
/* Interrupt Set-Pending */
-#define GIC_ICDISPR_INT(n) GIC_MASK32(n)
+#define GIC_ICDISPR_INT(n) GIC_MASK32(n)
/* Interrupt Clear-Pending */
-#define GIC_ICDICPR_INT(n) GIC_MASK32(n)
+#define GIC_ICDICPR_INT(n) GIC_MASK32(n)
/* Interrupt Active Bit */
-#define GIC_ICDABR_INT(n) GIC_MASK32(n)
+#define GIC_ICDABR_INT(n) GIC_MASK32(n)
/* Interrupt Priority Registers */
-#define GIC_ICDIPR_ID_SHIFT(n) GIC_SHIFT4(n)
-#define GIC_ICDIPR_ID_MASK(n) GIC_MASK4(n)
-#define GIC_ICDIPR_ID(n, p) ((uint32_t)(p) << GIC_SHIFT4(n))
+#define GIC_ICDIPR_ID_SHIFT(n) GIC_SHIFT4(n)
+#define GIC_ICDIPR_ID_MASK(n) GIC_MASK4(n)
+#define GIC_ICDIPR_ID(n, p) ((uint32_t)(p) << GIC_SHIFT4(n))
/* Interrupt Processor Target Registers */
@@ -428,7 +428,7 @@
#define GIC_ICDIPTR_ID_SHIFT(n) GIC_SHIFT4(n)
#define GIC_ICDIPTR_ID_MASK(n) GIC_MASK4(n)
-#define GIC_ICDIPTR_ID(n, t) ((uint32_t)(t) <<GIC_SHIFT4(n))
+#define GIC_ICDIPTR_ID(n, t) ((uint32_t)(t) <<GIC_SHIFT4(n))
/* Interrupt Configuration Register */
@@ -439,7 +439,7 @@
#define GIC_ICDICFR_ID_SHIFT(n) GIC_SHIFT16(n)
#define GIC_ICDICFR_ID_MASK(n) GIC_MASK16(n)
-#define GIC_ICDICFR_ID(n, c) ((uint32_t)(c) << GIC_SHIFT16(n))
+#define GIC_ICDICFR_ID(n, c) ((uint32_t)(c) << GIC_SHIFT16(n))
/* PPI Status Register */
@@ -456,14 +456,14 @@
/* Software Generated Interrupt Register */
-#define GIC_ICDSGIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
-#define GIC_ICDSGIR_INTID_MASK (0x3ff << GIC_ICDSGIR_INTID_SHIFT)
+#define GIC_ICDSGIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
+#define GIC_ICDSGIR_INTID_MASK (0x3ff << GIC_ICDSGIR_INTID_SHIFT)
#define GIC_ICDSGIR_INTID(n) ((uint32_t)(n) << GIC_ICDSGIR_INTID_SHIFT)
/* Bits 10-15: Reserved */
-#define GIC_ICDSGIR_CPUTARGET_SHIFT (16) /* Bits 16-23: CPU target */
-#define GIC_ICDSGIR_CPUTARGET_MASK (0xff << GIC_ICDSGIR_CPUTARGET_SHIFT)
+#define GIC_ICDSGIR_CPUTARGET_SHIFT (16) /* Bits 16-23: CPU target */
+#define GIC_ICDSGIR_CPUTARGET_MASK (0xff << GIC_ICDSGIR_CPUTARGET_SHIFT)
#define GIC_ICDSGIR_CPUTARGET(n) ((uint32_t)(n) << GIC_ICDSGIR_CPUTARGET_SHIFT)
/* Bits 26-31: Reserved */
@@ -495,7 +495,7 @@
/* Each Cortex-A9 processor has private interrupts, ID0-ID15, that can only
* be triggered by software. These interrupts are aliased so that there is
* no requirement for a requesting Cortex-A9 processor to determine its own
- * CPU ID when it deals with SGIs. The priority of an SGI depends on the
+ * CPU ID when it deals with SGIs. The priority of an SGI depends on the
* value set by the receiving Cortex-A9 processor in the banked SGI priority
* registers, not the priority set by the sending Cortex-A9 processor.
*
[nuttx] 05/07: arch/arm/src/lc823450/lc823450_spifi2.h: Fix nuttx coding style
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 13924bb9014be5772abb3edf46c894d7bc50834e
Author: simbit18 <10...@users.noreply.github.com>
AuthorDate: Mon Jul 10 13:10:38 2023 +0200
arch/arm/src/lc823450/lc823450_spifi2.h: Fix nuttx coding style
Remove TABs
---
arch/arm/src/lc823450/lc823450_spifi2.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/src/lc823450/lc823450_spifi2.h b/arch/arm/src/lc823450/lc823450_spifi2.h
index aef7257106..91aa155ee8 100644
--- a/arch/arm/src/lc823450/lc823450_spifi2.h
+++ b/arch/arm/src/lc823450/lc823450_spifi2.h
@@ -78,7 +78,7 @@
#define SF_CMD_READ_JID 0x9f
#define SF_STATUS1_BUSY (1 << 0)
-#define SF_STATUS2_QE (1 << 1)
+#define SF_STATUS2_QE (1 << 1)
#define SF_JID_MID_MASK 0xff0000
#define SF_JID_MID_WINBOND 0xef0000