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Posted to commits@nuttx.apache.org by ac...@apache.org on 2026/10/13 18:23:10 UTC
(nuttx) 27/30: arch/arm/src/common/stm32: clear pending update flag before timer start
This is an automated email from the ASF dual-hosted git repository.
acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit c778b085b4fb7ffceb4c2d5e8ca75d7a6bcbec7e
Author: raiden00pl <ra...@railab.me>
AuthorDate: Sat Oct 10 13:24:41 2026 +0200
arch/arm/src/common/stm32: clear pending update flag before timer start
STM32_TIM_SETCLOCK enables the counter and generates an update event,
which sets the update interrupt flag. The timer lower-half then enabled
the update interrupt with the flag still set, so the first callback ran
right after start instead of after the first period.
Clear the update flag before enabling the interrupt.
Signed-off-by: raiden00pl <ra...@railab.me>
Assisted-by: Claude Code
---
arch/arm/src/common/stm32/stm32_tim_lowerhalf.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/src/common/stm32/stm32_tim_lowerhalf.c b/arch/arm/src/common/stm32/stm32_tim_lowerhalf.c
index 95b8ffcfdf3..bec7708d1c0 100644
--- a/arch/arm/src/common/stm32/stm32_tim_lowerhalf.c
+++ b/arch/arm/src/common/stm32/stm32_tim_lowerhalf.c
@@ -368,6 +368,7 @@ static int stm32_start(struct timer_lowerhalf_s *lower)
if (priv->callback != NULL)
{
STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
+ STM32_TIM_ACKINT(priv->tim, GTIM_SR_UIF);
STM32_TIM_ENABLEINT(priv->tim, GTIM_DIER_UIE);
}