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Posted to commits@harmony.apache.org by "Ilya Berezhniuk (JIRA)" <ji...@apache.org> on 2007/12/17 15:47:43 UTC
[jira] Created: (HARMONY-5321) [drlvm][NCAI][encoder] JVMTI
disassembler does not understand CMC opcode and D0/D1 shift opcodes
[drlvm][NCAI][encoder] JVMTI disassembler does not understand CMC opcode and D0/D1 shift opcodes
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Key: HARMONY-5321
URL: https://issues.apache.org/jira/browse/HARMONY-5321
Project: Harmony
Issue Type: Bug
Components: DRLVM
Reporter: Ilya Berezhniuk
Priority: Minor
When stepping through native code using NCAI, I've got several assertions in encoder.
It's because CMC opcode and D0/D1 shift opcodes are absent (or commented) in decoder tables.
Suggested patch fixes the problem. It adds CMC for decoding only.
D0/D1 opcodes are uncommented and 2nd constant operand was removed because there is no proper type for it, and only instruction length is needed for JVMTI disassembler.
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[jira] Updated: (HARMONY-5321) [drlvm][NCAI][encoder] JVMTI
disassembler does not understand CMC opcode and D0/D1 shift opcodes
Posted by "Ilya Berezhniuk (JIRA)" <ji...@apache.org>.
[ https://issues.apache.org/jira/browse/HARMONY-5321?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ]
Ilya Berezhniuk updated HARMONY-5321:
-------------------------------------
Attachment: H-5321.patch
> [drlvm][NCAI][encoder] JVMTI disassembler does not understand CMC opcode and D0/D1 shift opcodes
> ------------------------------------------------------------------------------------------------
>
> Key: HARMONY-5321
> URL: https://issues.apache.org/jira/browse/HARMONY-5321
> Project: Harmony
> Issue Type: Bug
> Components: DRLVM
> Reporter: Ilya Berezhniuk
> Priority: Minor
> Attachments: H-5321.patch
>
>
> When stepping through native code using NCAI, I've got several assertions in encoder.
> It's because CMC opcode and D0/D1 shift opcodes are absent (or commented) in decoder tables.
> Suggested patch fixes the problem. It adds CMC for decoding only.
> D0/D1 opcodes are uncommented and 2nd constant operand was removed because there is no proper type for it, and only instruction length is needed for JVMTI disassembler.
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[jira] Closed: (HARMONY-5321) [drlvm][NCAI][encoder] JVMTI
disassembler does not understand CMC opcode and D0/D1 shift opcodes
Posted by "Ilya Berezhniuk (JIRA)" <ji...@apache.org>.
[ https://issues.apache.org/jira/browse/HARMONY-5321?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ]
Ilya Berezhniuk closed HARMONY-5321.
------------------------------------
Thanks Gregory,
the patch was applied correctly.
> [drlvm][NCAI][encoder] JVMTI disassembler does not understand CMC opcode and D0/D1 shift opcodes
> ------------------------------------------------------------------------------------------------
>
> Key: HARMONY-5321
> URL: https://issues.apache.org/jira/browse/HARMONY-5321
> Project: Harmony
> Issue Type: Bug
> Components: DRLVM
> Reporter: Ilya Berezhniuk
> Assignee: Gregory Shimansky
> Priority: Minor
> Attachments: H-5321.patch
>
>
> When stepping through native code using NCAI, I've got several assertions in encoder.
> It's because CMC opcode and D0/D1 shift opcodes are absent (or commented) in decoder tables.
> Suggested patch fixes the problem. It adds CMC for decoding only.
> D0/D1 opcodes are uncommented and 2nd constant operand was removed because there is no proper type for it, and only instruction length is needed for JVMTI disassembler.
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[jira] Assigned: (HARMONY-5321) [drlvm][NCAI][encoder] JVMTI
disassembler does not understand CMC opcode and D0/D1 shift opcodes
Posted by "Gregory Shimansky (JIRA)" <ji...@apache.org>.
[ https://issues.apache.org/jira/browse/HARMONY-5321?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ]
Gregory Shimansky reassigned HARMONY-5321:
------------------------------------------
Assignee: Gregory Shimansky
> [drlvm][NCAI][encoder] JVMTI disassembler does not understand CMC opcode and D0/D1 shift opcodes
> ------------------------------------------------------------------------------------------------
>
> Key: HARMONY-5321
> URL: https://issues.apache.org/jira/browse/HARMONY-5321
> Project: Harmony
> Issue Type: Bug
> Components: DRLVM
> Reporter: Ilya Berezhniuk
> Assignee: Gregory Shimansky
> Priority: Minor
> Attachments: H-5321.patch
>
>
> When stepping through native code using NCAI, I've got several assertions in encoder.
> It's because CMC opcode and D0/D1 shift opcodes are absent (or commented) in decoder tables.
> Suggested patch fixes the problem. It adds CMC for decoding only.
> D0/D1 opcodes are uncommented and 2nd constant operand was removed because there is no proper type for it, and only instruction length is needed for JVMTI disassembler.
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[jira] Resolved: (HARMONY-5321) [drlvm][NCAI][encoder] JVMTI
disassembler does not understand CMC opcode and D0/D1 shift opcodes
Posted by "Gregory Shimansky (JIRA)" <ji...@apache.org>.
[ https://issues.apache.org/jira/browse/HARMONY-5321?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ]
Gregory Shimansky resolved HARMONY-5321.
----------------------------------------
Resolution: Fixed
Patch is applied at 605233.
> [drlvm][NCAI][encoder] JVMTI disassembler does not understand CMC opcode and D0/D1 shift opcodes
> ------------------------------------------------------------------------------------------------
>
> Key: HARMONY-5321
> URL: https://issues.apache.org/jira/browse/HARMONY-5321
> Project: Harmony
> Issue Type: Bug
> Components: DRLVM
> Reporter: Ilya Berezhniuk
> Assignee: Gregory Shimansky
> Priority: Minor
> Attachments: H-5321.patch
>
>
> When stepping through native code using NCAI, I've got several assertions in encoder.
> It's because CMC opcode and D0/D1 shift opcodes are absent (or commented) in decoder tables.
> Suggested patch fixes the problem. It adds CMC for decoding only.
> D0/D1 opcodes are uncommented and 2nd constant operand was removed because there is no proper type for it, and only instruction length is needed for JVMTI disassembler.
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