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Posted to commits@nuttx.apache.org by gn...@apache.org on 2020/05/04 14:32:34 UTC
[incubator-nuttx] branch master updated (32b79b2 -> aea90e7)
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 32b79b2 Rename pipe2/mkfifo2 to nx_pipe/nx_mkfifo
new a9871f5 Resolve linking issues with x86_64 port
new 19afc57 Fix null pointer reference in x86_64 rng
new 4c24d91 Surpress unused rtcb variable
new 2405901 Use mempy to perform type punning for setting gdt entry
new aea90e7 Clean code to match nxstyle requirements
The 5 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/x86_64/include/intel64/arch.h | 30 +++++++++++++++-----------
arch/x86_64/src/intel64/intel64_handlers.c | 21 +++++++++++++-----
arch/x86_64/src/intel64/intel64_lowsetup.c | 31 ++++++++++++++++++++-------
arch/x86_64/src/intel64/intel64_rng.c | 4 ++--
arch/x86_64/src/intel64/up_initialstate.c | 1 +
arch/x86_64/src/intel64/up_irq.c | 18 ++++++++++------
arch/x86_64/src/intel64/up_regdump.c | 10 +++------
arch/x86_64/src/intel64/up_releasestack.c | 3 ---
boards/x86_64/intel64/qemu-intel64/README.txt | 4 ++--
9 files changed, 76 insertions(+), 46 deletions(-)
[incubator-nuttx] 05/05: Clean code to match nxstyle requirements
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit aea90e7cf0af0017046aa4d002cc657d84f05223
Author: Brennan Ashton <ba...@brennanashton.com>
AuthorDate: Wed Apr 29 21:46:46 2020 -0700
Clean code to match nxstyle requirements
Signed-off-by: Brennan Ashton <ba...@brennanashton.com>
---
arch/x86_64/include/intel64/arch.h | 20 ++++++++++++--------
arch/x86_64/src/intel64/intel64_handlers.c | 20 ++++++++++++++++----
arch/x86_64/src/intel64/intel64_lowsetup.c | 8 +++++---
arch/x86_64/src/intel64/intel64_rng.c | 2 +-
arch/x86_64/src/intel64/up_irq.c | 15 +++++++++------
arch/x86_64/src/intel64/up_regdump.c | 10 +++-------
arch/x86_64/src/intel64/up_releasestack.c | 3 ---
7 files changed, 46 insertions(+), 32 deletions(-)
diff --git a/arch/x86_64/include/intel64/arch.h b/arch/x86_64/include/intel64/arch.h
index 26d127d..ae09753 100644
--- a/arch/x86_64/include/intel64/arch.h
+++ b/arch/x86_64/include/intel64/arch.h
@@ -231,7 +231,7 @@
# define IOAPIC_REG_ID 0x00 /* Register index: ID */
# define IOAPIC_REG_VER 0x01 /* Register index: version */
# define IOAPIC_REG_TABLE 0x10 /* Redirection table base */
-# define IOAPIC_PIN_DISABLE (1 << 16) /* Disable */
+# define IOAPIC_PIN_DISABLE (1 << 16) /* Disable */
/* PIC related Definitions */
@@ -257,8 +257,9 @@
/* IDT data structures ******************************************************
*
* The Interrupt Descriptor Table (IDT) is a data structure used by the x86
- * architecture to implement an interrupt vector table. The IDT is used by the
- * processor to determine the correct response to interrupts and exceptions.
+ * architecture to implement an interrupt vector table. The IDT is used by
+ * the processor to determine the correct response to interrupts and
+ * exceptions.
*/
begin_packed_struct struct idt_entry_s
@@ -286,7 +287,8 @@ begin_packed_struct struct idt_ptr_s
*
* The Global Descriptor Table (GDT) is a data structure used by the x86
* architecture to implement segments and privilege levels. The GDT is used
- * by the processor to determine current privilege level and memory access right.
+ * by the processor to determine current privilege level and memory access
+ * right.
*/
begin_packed_struct struct gdt_entry_s
@@ -321,8 +323,8 @@ begin_packed_struct struct gdt_ptr_s
/* IST data structures ******************************************************
*
* The Interrupt Stack Table (GDT) is a data structure used by the x86-64
- * architecture to automatically switch stack on interrupt and privilege change.
- * It allows setting up to 7 different stack for interrupts.
+ * architecture to automatically switch stack on interrupt and privilege
+ * change. It allows setting up to 7 different stack for interrupts.
*/
begin_packed_struct struct ist_s
@@ -342,7 +344,7 @@ begin_packed_struct struct ist_s
uint64_t reserved3; /* reserved */
uint64_t reserved4; /* reserved */
uint16_t reserved5; /* reserved */
- uint16_t IOPB_offset; /* IOPB_offset */
+ uint16_t IOPB_OFFSET; /* IOPB_offset */
} end_packed_struct;
/****************************************************************************
@@ -560,7 +562,9 @@ extern volatile uint8_t gdt64_low;
extern volatile uint8_t gdt64_ist_low;
extern volatile uint8_t gdt64_low_end;
-/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
+/* The actual address of the page table and gdt/ist after mapping the kernel
+ * in high address
+ */
extern volatile uint64_t *pdpt;
extern volatile uint64_t *pd;
diff --git a/arch/x86_64/src/intel64/intel64_handlers.c b/arch/x86_64/src/intel64/intel64_handlers.c
index 4dc1db7..c6963e9 100644
--- a/arch/x86_64/src/intel64/intel64_handlers.c
+++ b/arch/x86_64/src/intel64/intel64_handlers.c
@@ -136,8 +136,14 @@ uint64_t *isr_handler(uint64_t *regs, uint64_t irq)
{
#ifdef CONFIG_SUPPRESS_INTERRUPTS
board_autoled_on(LED_INIRQ);
- PANIC(); /* Doesn't return */
- return regs; /* To keep the compiler happy */
+
+ /* Doesn't return */
+
+ PANIC();
+
+ /* To keep the compiler happy */
+
+ return regs;
#else
DEBUGASSERT(g_current_regs == NULL);
@@ -191,8 +197,14 @@ uint64_t *irq_handler(uint64_t *regs, uint64_t irq_no)
{
#ifdef CONFIG_SUPPRESS_INTERRUPTS
board_autoled_on(LED_INIRQ);
- PANIC(); /* Doesn't return */
- return regs; /* To keep the compiler happy */
+
+ /* Doesn't return */
+
+ PANIC();
+
+ /* To keep the compiler happy */
+
+ return regs;
#else
uint64_t *ret;
int irq;
diff --git a/arch/x86_64/src/intel64/intel64_lowsetup.c b/arch/x86_64/src/intel64/intel64_lowsetup.c
index ff63b81..39c965e 100644
--- a/arch/x86_64/src/intel64/intel64_lowsetup.c
+++ b/arch/x86_64/src/intel64/intel64_lowsetup.c
@@ -41,7 +41,9 @@
* Public Data
****************************************************************************/
-/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
+/* The actual address of the page table and gdt/ist after mapping the kernel
+ * in high address.
+ */
volatile uint64_t *pdpt;
volatile uint64_t *pd;
@@ -69,11 +71,11 @@ volatile struct gdt_entry_s *gdt64;
void up_lowsetup(void)
{
- /* we should be in long mode at this point*/
+ /* we should be in long mode at this point */
/* GDT is loaded with 64bit GDT */
- /* Paging is enabled*/
+ /* Paging is enabled */
/* Setup pointers for accessing Page table and GDT in high address */
diff --git a/arch/x86_64/src/intel64/intel64_rng.c b/arch/x86_64/src/intel64/intel64_rng.c
index 23bb1e1..a68d6c3 100644
--- a/arch/x86_64/src/intel64/intel64_rng.c
+++ b/arch/x86_64/src/intel64/intel64_rng.c
@@ -70,7 +70,7 @@ static const struct file_operations g_rngops =
{
0, /* open */
0, /* close */
- x86_rngread, /* read */
+ x86_rngread, /* read */
0, /* write */
0, /* seek */
0 /* ioctl */
diff --git a/arch/x86_64/src/intel64/up_irq.c b/arch/x86_64/src/intel64/up_irq.c
index 7c34327..ac4eb19 100644
--- a/arch/x86_64/src/intel64/up_irq.c
+++ b/arch/x86_64/src/intel64/up_irq.c
@@ -176,8 +176,9 @@ static void up_ist_init(void)
memset(&tss_l, 0, sizeof(tss_l));
memset(&tss_h, 0, sizeof(tss_h));
- tss_l.limit_low = (((104 - 1) & 0xffff)); /* Segment limit = TSS size - 1 */
- tss_l.base_low = ((uintptr_t)ist64 & 0x00ffffff); /* Low address 1 */
+ tss_l.limit_low = (((104 - 1) & 0xffff)); /* Segment limit = TSS size - 1 */
+
+ tss_l.base_low = ((uintptr_t)ist64 & 0x00ffffff); /* Low address 1 */
tss_l.base_high = (((uintptr_t)ist64 & 0xff000000) >> 24); /* Low address 2 */
tss_l.P = 1;
@@ -193,7 +194,8 @@ static void up_ist_init(void)
/* memcpy used to handle type punning compiler warning */
- memcpy((void *)&gdt64[X86_GDT_ISTH_SEL_NUM], (void *)&tss_h, sizeof(gdt64[0]));
+ memcpy((void *)&gdt64[X86_GDT_ISTH_SEL_NUM],
+ (void *)&tss_h, sizeof(gdt64[0]));
ist64->IST1 = (uintptr_t)g_interrupt_stack_end;
ist64->IST2 = (uintptr_t)g_isr_stack_end;
@@ -317,7 +319,8 @@ static void up_apic_init(void)
* Name: legacy_pic_irq_handler
*
* Description:
- * This function will capture will legacy 8259 PIC IRQ using virtual wire mode
+ * This function will capture will legacy 8259 PIC IRQ using virtual wire
+ * mode
*
****************************************************************************/
@@ -375,8 +378,8 @@ static void up_idtentry(unsigned int index, uint64_t base, uint16_t sel,
entry->sel = sel;
entry->zero = 0;
- /* We must uncomment the OR below when we get to using user-mode. It sets the
- * interrupt gate's privilege level to 3.
+ /* We must uncomment the OR below when we get to using user-mode. It sets
+ * the interrupt gate's privilege level to 3.
*/
entry->flags = flags; /* | 0x60 */
diff --git a/arch/x86_64/src/intel64/up_regdump.c b/arch/x86_64/src/intel64/up_regdump.c
index 904f38e..70e8daf 100644
--- a/arch/x86_64/src/intel64/up_regdump.c
+++ b/arch/x86_64/src/intel64/up_regdump.c
@@ -74,7 +74,6 @@ void print_mem(void *sp, size_t size)
void backtrace(uint64_t rbp)
{
int i;
- int j;
_alert("Frame Dump (64 bytes):\n");
@@ -101,12 +100,8 @@ void backtrace(uint64_t rbp)
void up_registerdump(uint64_t *regs)
{
- int i;
- int j;
uint64_t mxcsr;
uint64_t cr2;
- uint64_t rbp;
- char buf[9];
asm volatile ("stmxcsr %0"::"m"(mxcsr):"memory");
asm volatile ("mov %%cr2, %%rax; mov %%rax, %0"::"m"(cr2):"memory", "rax");
@@ -138,11 +133,12 @@ void up_registerdump(uint64_t *regs)
if (regs[REG_RSP] > 0 && regs[REG_RSP] < 0x1000000)
{
- print_mem(regs[REG_RSP] - 512, 128 * 0x200000 - regs[REG_RSP] + 512);
+ print_mem((void *)regs[REG_RSP] - 512,
+ 128 * 0x200000 - regs[REG_RSP] + 512);
}
else
{
- print_mem(regs[REG_RSP] - 512, 1024);
+ print_mem((void *)regs[REG_RSP] - 512, 1024);
}
#ifdef CONFIG_DEBUG_NOOPT
diff --git a/arch/x86_64/src/intel64/up_releasestack.c b/arch/x86_64/src/intel64/up_releasestack.c
index 2a66060..a2a1a11 100644
--- a/arch/x86_64/src/intel64/up_releasestack.c
+++ b/arch/x86_64/src/intel64/up_releasestack.c
@@ -79,9 +79,6 @@
void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype)
{
- struct vma_s *ptr;
- int i;
-
/* Is there a stack allocated? */
if (dtcb->stack_alloc_ptr)
[incubator-nuttx] 04/05: Use mempy to perform type punning for
setting gdt entry
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 2405901bf2cd51bc9a418e21820e0d9c3ce354e7
Author: Brennan Ashton <ba...@brennanashton.com>
AuthorDate: Wed Apr 29 20:58:03 2020 -0700
Use mempy to perform type punning for setting gdt entry
Signed-off-by: Brennan Ashton <ba...@brennanashton.com>
---
arch/x86_64/src/intel64/up_irq.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86_64/src/intel64/up_irq.c b/arch/x86_64/src/intel64/up_irq.c
index c45987e..7c34327 100644
--- a/arch/x86_64/src/intel64/up_irq.c
+++ b/arch/x86_64/src/intel64/up_irq.c
@@ -190,7 +190,10 @@ static void up_ist_init(void)
tss_h = (((uintptr_t)ist64 >> 32) & 0xffffffff); /* High address */
gdt64[X86_GDT_ISTL_SEL_NUM] = tss_l;
- gdt64[X86_GDT_ISTH_SEL_NUM] = *((struct gdt_entry_s *)&tss_h);
+
+ /* memcpy used to handle type punning compiler warning */
+
+ memcpy((void *)&gdt64[X86_GDT_ISTH_SEL_NUM], (void *)&tss_h, sizeof(gdt64[0]));
ist64->IST1 = (uintptr_t)g_interrupt_stack_end;
ist64->IST2 = (uintptr_t)g_isr_stack_end;
[incubator-nuttx] 01/05: Resolve linking issues with x86_64 port
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit a9871f584ae54e87f411695bf270aba68c132398
Author: Brennan Ashton <ba...@brennanashton.com>
AuthorDate: Wed Apr 29 01:15:57 2020 -0700
Resolve linking issues with x86_64 port
Signed-off-by: Brennan Ashton <ba...@brennanashton.com>
---
arch/x86_64/include/intel64/arch.h | 10 +++++-----
arch/x86_64/src/intel64/intel64_handlers.c | 1 -
arch/x86_64/src/intel64/intel64_lowsetup.c | 25 +++++++++++++++++++------
boards/x86_64/intel64/qemu-intel64/README.txt | 4 ++--
4 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/arch/x86_64/include/intel64/arch.h b/arch/x86_64/include/intel64/arch.h
index ebfb3e2..26d127d 100644
--- a/arch/x86_64/include/intel64/arch.h
+++ b/arch/x86_64/include/intel64/arch.h
@@ -562,12 +562,12 @@ extern volatile uint8_t gdt64_low_end;
/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
-volatile uint64_t *pdpt;
-volatile uint64_t *pd;
-volatile uint64_t *pt;
+extern volatile uint64_t *pdpt;
+extern volatile uint64_t *pd;
+extern volatile uint64_t *pt;
-volatile struct ist_s *ist64;
-volatile struct gdt_entry_s *gdt64;
+extern volatile struct ist_s *ist64;
+extern volatile struct gdt_entry_s *gdt64;
/****************************************************************************
* Public Function Prototypes
diff --git a/arch/x86_64/src/intel64/intel64_handlers.c b/arch/x86_64/src/intel64/intel64_handlers.c
index 6743ad2..4dc1db7 100644
--- a/arch/x86_64/src/intel64/intel64_handlers.c
+++ b/arch/x86_64/src/intel64/intel64_handlers.c
@@ -139,7 +139,6 @@ uint64_t *isr_handler(uint64_t *regs, uint64_t irq)
PANIC(); /* Doesn't return */
return regs; /* To keep the compiler happy */
#else
- uint64_t *ret;
DEBUGASSERT(g_current_regs == NULL);
g_current_regs = regs;
diff --git a/arch/x86_64/src/intel64/intel64_lowsetup.c b/arch/x86_64/src/intel64/intel64_lowsetup.c
index ca9f074..ff63b81 100644
--- a/arch/x86_64/src/intel64/intel64_lowsetup.c
+++ b/arch/x86_64/src/intel64/intel64_lowsetup.c
@@ -38,6 +38,19 @@
****************************************************************************/
/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* The actual address of the page table and gdt/ist after mapping the kernel in high address*/
+
+volatile uint64_t *pdpt;
+volatile uint64_t *pd;
+volatile uint64_t *pt;
+
+volatile struct ist_s *ist64;
+volatile struct gdt_entry_s *gdt64;
+
+/****************************************************************************
* Private Functions
****************************************************************************/
@@ -64,16 +77,16 @@ void up_lowsetup(void)
/* Setup pointers for accessing Page table and GDT in high address */
- pdpt = &pdpt_low + X86_64_LOAD_OFFSET;
- pd = &pd_low + X86_64_LOAD_OFFSET;
- pt = &pt_low + X86_64_LOAD_OFFSET;
+ pdpt = (uint64_t *)((uintptr_t)&pdpt_low + X86_64_LOAD_OFFSET);
+ pd = (uint64_t *)((uintptr_t)&pd_low + X86_64_LOAD_OFFSET);
+ pt = (uint64_t *)((uintptr_t)&pt_low + X86_64_LOAD_OFFSET);
- ist64 = (struct ist_s *)((void *)&ist64_low + X86_64_LOAD_OFFSET);
- gdt64 = (struct gdt_entry_s *)((void *)&gdt64_low + X86_64_LOAD_OFFSET);
+ ist64 = (struct ist_s *)((uintptr_t)&ist64_low + X86_64_LOAD_OFFSET);
+ gdt64 = (struct gdt_entry_s *)((uintptr_t)&gdt64_low + X86_64_LOAD_OFFSET);
/* reload the GDTR with mapped high memory address */
- setgdt(gdt64, (uintptr_t)(&gdt64_low_end - &gdt64_low) - 1);
+ setgdt((void *)gdt64, (uintptr_t)(&gdt64_low_end - &gdt64_low) - 1);
/* Do some checking on CPU compatibilities */
diff --git a/boards/x86_64/intel64/qemu-intel64/README.txt b/boards/x86_64/intel64/qemu-intel64/README.txt
index 46e44d1..4f5b3b4 100644
--- a/boards/x86_64/intel64/qemu-intel64/README.txt
+++ b/boards/x86_64/intel64/qemu-intel64/README.txt
@@ -42,7 +42,7 @@ set timeout=0
set default=0
menuentry "kernel" {
multiboot2 /boot/nuttx.elf
- }
+}
```
##### Making the disk
@@ -79,7 +79,7 @@ Running QEMU
In the top-level NuttX directory:
- qemu -cpu host -enable-kvm -m 2GB -cdrom boot.iso -nographic -serial mon:stdio
+ qemu-system-x86_64 -cpu host -enable-kvm -m 2G -cdrom boot.iso -nographic -serial mon:stdio
This multiplex the qemu console and COM1 to your console.
Use control-a 1 and 2 to switch between.
[incubator-nuttx] 03/05: Surpress unused rtcb variable
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 4c24d91b4acedcd3c458c895dd4483866f3d3b2a
Author: Brennan Ashton <ba...@brennanashton.com>
AuthorDate: Wed Apr 29 20:02:51 2020 -0700
Surpress unused rtcb variable
Signed-off-by: Brennan Ashton <ba...@brennanashton.com>
---
arch/x86_64/src/intel64/up_initialstate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86_64/src/intel64/up_initialstate.c b/arch/x86_64/src/intel64/up_initialstate.c
index 3f4d0c8..a727b9b 100644
--- a/arch/x86_64/src/intel64/up_initialstate.c
+++ b/arch/x86_64/src/intel64/up_initialstate.c
@@ -85,6 +85,7 @@ void up_initial_state(struct tcb_s *tcb)
/* set page table to share space with current process */
rtcb = this_task();
+ UNUSED(rtcb);
/* Save the initial stack pointer... the value of the stackpointer before
* the "interrupt occurs."
[incubator-nuttx] 02/05: Fix null pointer reference in x86_64 rng
Posted by gn...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 19afc57eefa662cc375e267008dd5d7515a4d107
Author: Brennan Ashton <ba...@brennanashton.com>
AuthorDate: Wed Apr 29 19:54:58 2020 -0700
Fix null pointer reference in x86_64 rng
Signed-off-by: Brennan Ashton <ba...@brennanashton.com>
---
arch/x86_64/src/intel64/intel64_rng.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86_64/src/intel64/intel64_rng.c b/arch/x86_64/src/intel64/intel64_rng.c
index 3c65cc0..23bb1e1 100644
--- a/arch/x86_64/src/intel64/intel64_rng.c
+++ b/arch/x86_64/src/intel64/intel64_rng.c
@@ -141,7 +141,7 @@ static ssize_t x86_rngread(struct file *filep, char *buffer, size_t buflen)
{
unsigned short temp = 0;
- while (_rdrand16_step((unsigned short *)temp))
+ while (_rdrand16_step(&temp))
{
sched_yield();
}