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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/10/04 08:19:00 UTC
[incubator-nuttx] branch master updated: drivers/mtd/m25px.c: add
support for MT25Q256 SPI NOR
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 2e94631 drivers/mtd/m25px.c: add support for MT25Q256 SPI NOR
2e94631 is described below
commit 2e94631da4f7e495ca9f2932ea49d9b94a8484ec
Author: Jani Paalijarvi <ja...@unikie.com>
AuthorDate: Fri Oct 1 09:06:20 2021 +0300
drivers/mtd/m25px.c: add support for MT25Q256 SPI NOR
---
drivers/mtd/m25px.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/m25px.c b/drivers/mtd/m25px.c
index f551b15..f73c9da 100644
--- a/drivers/mtd/m25px.c
+++ b/drivers/mtd/m25px.c
@@ -83,6 +83,10 @@
# define CONFIG_MT25Q_MEMORY_TYPE 0xBA
#endif
+#ifndef CONFIG_MT25QU_MEMORY_TYPE
+# define CONFIG_MT25QU_MEMORY_TYPE 0xBB
+#endif
+
/* M25P Registers ***********************************************************/
/* Identification register values */
@@ -90,6 +94,7 @@
#define M25P_MANUFACTURER CONFIG_M25P_MANUFACTURER
#define M25P_MEMORY_TYPE CONFIG_M25P_MEMORY_TYPE
#define MT25Q_MEMORY_TYPE CONFIG_MT25Q_MEMORY_TYPE
+#define MT25QU_MEMORY_TYPE CONFIG_MT25QU_MEMORY_TYPE
#define M25P_RES_ID 0x13
#define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */
#define M25P_EN25F80_CAPACITY 0x14 /* 8 M-bit */
@@ -98,6 +103,7 @@
#define M25P_M25P64_CAPACITY 0x17 /* 64 M-bit */
#define M25P_M25P128_CAPACITY 0x18 /* 128 M-bit */
#define M25P_MT25Q128_CAPACITY 0x18 /* 128 M-bit */
+#define M25P_MT25Q256_CAPACITY 0x19 /* 256 M-bit */
#define M25P_MT25Q1G_CAPACITY 0x21 /* 1 G-bit */
/* M25P1 capacity is 131,072 bytes:
@@ -175,6 +181,17 @@
#define M25P_MT25Q128_NPAGES 65536
#define M25P_MT25Q128_SUBSECT_SHIFT 12 /* Sub-Sector size 1 << 12 = 4,096 */
+/* MT25Q256 capacity is 33,554,432 bytes:
+ * (512 sectors) * (65,536 bytes per sector)
+ * (131072 pages) * (256 bytes per page)
+ */
+
+#define M25P_MT25Q256_SECTOR_SHIFT 16 /* Sector size 1 << 16 = 65,536 */
+#define M25P_MT25Q256_NSECTORS 512
+#define M25P_MT25Q256_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */
+#define M25P_MT25Q256_NPAGES 131072
+#define M25P_MT25Q256_SUBSECT_SHIFT 12 /* Sub-Sector size 1 << 12 = 4,096 */
+
/* MT25Q1G capacity is 134,217,728 bytes:
* (2048 sectors) * (65,536 bytes per sector)
* (524288 pages) * (256 bytes per page)
@@ -454,7 +471,8 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
return OK;
}
}
- else if (manufacturer == M25P_MANUFACTURER && memory == MT25Q_MEMORY_TYPE)
+ else if (manufacturer == M25P_MANUFACTURER &&
+ (memory == MT25Q_MEMORY_TYPE || memory == MT25QU_MEMORY_TYPE))
{
/* Also okay.. is it a FLASH capacity that we understand? */
@@ -474,6 +492,19 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
#endif
return OK;
}
+ else if (capacity == M25P_MT25Q256_CAPACITY)
+ {
+ /* Save the FLASH geometry */
+
+ priv->sectorshift = M25P_MT25Q256_SECTOR_SHIFT;
+ priv->nsectors = M25P_MT25Q256_NSECTORS;
+ priv->pageshift = M25P_MT25Q256_PAGE_SHIFT;
+ priv->npages = M25P_MT25Q256_NPAGES;
+#ifdef CONFIG_M25P_SUBSECTOR_ERASE
+ priv->subsectorshift = M25P_MT25Q256_SUBSECT_SHIFT;
+#endif
+ return OK;
+ }
else if (capacity == M25P_MT25Q1G_CAPACITY)
{
/* Save the FLASH geometry */