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Posted to commits@mynewt.apache.org by ut...@apache.org on 2018/04/18 21:56:23 UTC
[mynewt-core] branch master updated (bac5f88 -> 9f4fc4a)
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git.
from bac5f88 Sensors/BMA2XX - New PR from PR #699 comments (#1018)
new a9e286f Comment on nucleo-f401 i2c usage
new 33f28dc Initial stm32 common i2c based on stm32f4x
new e418a77 Fix i2c config naming for all f4 bsps
new a3852bd Add missing i2c addr shift left in probe
new 847cbcb Undo previously applied i2c patch to stm32cube
new 9e0d1ef stm32l1 i2c support
new 6de6d41 Enable I2C module for stm32f3 bsps
new 0ebe880 Add initial stm32f3 mcu i2c config
new 0f84660 Add stm32f3discovery i2c config
new 20e796d Add i2c driver for F3/F7
new da66d08 Add i2c support for stm32f7
new a97f283 Fix stm32f3/f7 restart issues, add timingr
new 9f4fc4a Initial stm32f1 i2c support + olimex-p103 config
The 13 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.../nucleo-f303k8/include/bsp/stm32f3xx_hal_conf.h | 2 +-
.../nucleo-f303re/include/bsp/stm32f3xx_hal_conf.h | 2 +-
hw/bsp/nucleo-f401re/src/hal_bsp.c | 30 +-
hw/bsp/nucleo-f413re/src/hal_bsp.c | 2 +-
hw/bsp/nucleo-f413zh/src/hal_bsp.c | 2 +-
hw/bsp/olimex-p103/src/hal_bsp.c | 11 +-
hw/bsp/olimex_stm32-e407_devboard/src/hal_bsp.c | 2 +-
.../include/bsp/stm32f3xx_hal_conf.h | 2 +-
hw/bsp/stm32f3discovery/src/hal_bsp.c | 21 +
hw/bsp/stm32f4discovery/src/hal_bsp.c | 2 +-
hw/bsp/stm32f767-nucleo/src/hal_bsp.c | 28 +-
hw/bsp/stm32l152discovery/src/hal_bsp.c | 2 +-
.../stm/{stm32f4xx => stm32_common}/src/hal_i2c.c | 142 +-
.../stm/stm32_common/src/stm32_driver_mod_i2c_v1.c | 857 ++++
.../stm/stm32_common/src/stm32_driver_mod_i2c_v2.c | 664 +++
hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h | 5 +
.../stm32f1xx/include/mcu/stm32f1xx_mynewt_hal.h | 4 +-
hw/mcu/stm/stm32f1xx/src/hal_i2c.c | 174 -
hw/mcu/stm/stm32f1xx/syscfg.yml | 8 +-
hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h | 5 +
.../stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h | 12 +
hw/mcu/stm/stm32f3xx/syscfg.yml | 4 +
hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h | 5 +
.../stm32f4xx/include/mcu/stm32f4xx_mynewt_hal.h | 2 +-
hw/mcu/stm/stm32f4xx/pkg.yml | 1 -
hw/mcu/stm/stm32f4xx/src/stm32_driver_mod_i2c.c | 5353 --------------------
hw/mcu/stm/stm32f4xx/syscfg.yml | 10 +-
hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h | 5 +
.../stm32f7xx/include/mcu/stm32f7xx_mynewt_hal.h | 4 +-
hw/mcu/stm/stm32f7xx/src/hal_i2c.c | 177 -
hw/mcu/stm/stm32f7xx/syscfg.yml | 3 +
hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h | 5 +
.../stm32l1xx/include/mcu/stm32l1xx_mynewt_hal.h | 2 +-
.../STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h | 6 +-
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c | 85 +-
hw/mcu/stm/stm32l1xx/src/hal_i2c.c | 172 -
36 files changed, 1784 insertions(+), 6027 deletions(-)
rename hw/mcu/stm/{stm32f4xx => stm32_common}/src/hal_i2c.c (51%)
create mode 100644 hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v1.c
create mode 100644 hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c
delete mode 100644 hw/mcu/stm/stm32f1xx/src/hal_i2c.c
delete mode 100644 hw/mcu/stm/stm32f4xx/src/stm32_driver_mod_i2c.c
delete mode 100644 hw/mcu/stm/stm32f7xx/src/hal_i2c.c
delete mode 100644 hw/mcu/stm/stm32l1xx/src/hal_i2c.c
--
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[mynewt-core] 07/13: Enable I2C module for stm32f3 bsps
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 6de6d41080cb5a93d77b834fd6f4e45e06e3eda8
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 14:49:05 2018 -0300
Enable I2C module for stm32f3 bsps
---
hw/bsp/nucleo-f303k8/include/bsp/stm32f3xx_hal_conf.h | 2 +-
hw/bsp/nucleo-f303re/include/bsp/stm32f3xx_hal_conf.h | 2 +-
hw/bsp/stm32f3discovery/include/bsp/stm32f3xx_hal_conf.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/bsp/nucleo-f303k8/include/bsp/stm32f3xx_hal_conf.h b/hw/bsp/nucleo-f303k8/include/bsp/stm32f3xx_hal_conf.h
index 788febc..dea1dd6 100644
--- a/hw/bsp/nucleo-f303k8/include/bsp/stm32f3xx_hal_conf.h
+++ b/hw/bsp/nucleo-f303k8/include/bsp/stm32f3xx_hal_conf.h
@@ -64,7 +64,7 @@
/* #define HAL_PCCARD_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
/* #define HAL_HRTIM_MODULE_ENABLED */
-/* #define HAL_I2C_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
diff --git a/hw/bsp/nucleo-f303re/include/bsp/stm32f3xx_hal_conf.h b/hw/bsp/nucleo-f303re/include/bsp/stm32f3xx_hal_conf.h
index 788febc..dea1dd6 100644
--- a/hw/bsp/nucleo-f303re/include/bsp/stm32f3xx_hal_conf.h
+++ b/hw/bsp/nucleo-f303re/include/bsp/stm32f3xx_hal_conf.h
@@ -64,7 +64,7 @@
/* #define HAL_PCCARD_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
/* #define HAL_HRTIM_MODULE_ENABLED */
-/* #define HAL_I2C_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
diff --git a/hw/bsp/stm32f3discovery/include/bsp/stm32f3xx_hal_conf.h b/hw/bsp/stm32f3discovery/include/bsp/stm32f3xx_hal_conf.h
index bc90027..5640df6 100644
--- a/hw/bsp/stm32f3discovery/include/bsp/stm32f3xx_hal_conf.h
+++ b/hw/bsp/stm32f3discovery/include/bsp/stm32f3xx_hal_conf.h
@@ -64,7 +64,7 @@
/* #define HAL_PCCARD_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
/* #define HAL_HRTIM_MODULE_ENABLED */
-/* #define HAL_I2C_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
--
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[mynewt-core] 01/13: Comment on nucleo-f401 i2c usage
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit a9e286f0a6abce2cbf440fb84bac57f7a81ae762
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Wed Mar 21 17:07:39 2018 -0300
Comment on nucleo-f401 i2c usage
---
hw/bsp/nucleo-f401re/src/hal_bsp.c | 30 ++++++++++++++++++------------
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/hw/bsp/nucleo-f401re/src/hal_bsp.c b/hw/bsp/nucleo-f401re/src/hal_bsp.c
index d86d7e7..60640bc 100644
--- a/hw/bsp/nucleo-f401re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-f401re/src/hal_bsp.c
@@ -49,10 +49,10 @@ static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
.suc_uart = USART2,
.suc_rcc_reg = &RCC->APB1ENR,
.suc_rcc_dev = RCC_APB1ENR_USART2EN,
- .suc_pin_tx = MCU_GPIO_PORTA(2), /* PA2 */
- .suc_pin_rx = MCU_GPIO_PORTA(3), /* PA3 */
- .suc_pin_rts = MCU_GPIO_PORTA(1), /* PA1 */
- .suc_pin_cts = MCU_GPIO_PORTA(0), /* PA0 */
+ .suc_pin_tx = MCU_GPIO_PORTA(2), /* PA2 */
+ .suc_pin_rx = MCU_GPIO_PORTA(3), /* PA3 */
+ .suc_pin_rts = MCU_GPIO_PORTA(1), /* PA1 */
+ .suc_pin_cts = MCU_GPIO_PORTA(0), /* PA0 */
.suc_pin_af = GPIO_AF7_USART2,
.suc_irqn = USART2_IRQn
}
@@ -67,24 +67,30 @@ static const struct hal_bsp_mem_dump dump_cfg[] = {
};
#if MYNEWT_VAL(I2C_0)
+/*
+ * The PB8 and PB9 pins are connected through jumpers in the board to
+ * both AIN and I2C pins. To enable I2C functionality SB51/SB56 need to
+ * be removed (they are the default connections) and SB46/SB52 need to
+ * be added.
+ */
static struct stm32f4_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
- .hic_pin_sda = MCU_GPIO_PORTB(9), /* PB9 */
- .hic_pin_scl = MCU_GPIO_PORTB(8), /* PB8 */
+ .hic_pin_sda = MCU_GPIO_PORTB(9), /* PB9 - D14 on CN5 */
+ .hic_pin_scl = MCU_GPIO_PORTB(8), /* PB8 - D15 on CN5 */
.hic_pin_af = GPIO_AF4_I2C1,
.hic_10bit = 0,
- .hic_speed = 100000 /* 100kHz */
+ .hic_speed = 100000, /* 100kHz */
};
#endif
#if MYNEWT_VAL(SPI_0_SLAVE) || MYNEWT_VAL(SPI_0_MASTER)
-struct stm32_hal_spi_cfg spi0_cfg = {
- .ss_pin = MCU_GPIO_PORTA(4), /* PA4 */
- .sck_pin = MCU_GPIO_PORTA(5), /* PA5 */
- .miso_pin = MCU_GPIO_PORTA(6), /* PA6 */
- .mosi_pin = MCU_GPIO_PORTA(7), /* PA7 */
+struct stm32f4_hal_spi_cfg spi0_cfg = {
+ .ss_pin = MCU_GPIO_PORTA(4), /* PA4 */
+ .sck_pin = MCU_GPIO_PORTA(5), /* PA5 */
+ .miso_pin = MCU_GPIO_PORTA(6), /* PA6 */
+ .mosi_pin = MCU_GPIO_PORTB(5), /* PB5 */
.irq_prio = 2
};
#endif
--
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[mynewt-core] 02/13: Initial stm32 common i2c based on stm32f4x
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 33f28dcd83170603e6f63402dc4a6f653b785b2e
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Wed Mar 21 17:09:18 2018 -0300
Initial stm32 common i2c based on stm32f4x
I2C customized routines copied from STM32Cube HAL; Mynewt HAL only uses
custom routines now
---
.../stm/{stm32f4xx => stm32_common}/src/hal_i2c.c | 60 +-
hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c | 855 ++++
hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h | 5 +
hw/mcu/stm/stm32f4xx/pkg.yml | 1 -
hw/mcu/stm/stm32f4xx/src/stm32_driver_mod_i2c.c | 5353 --------------------
5 files changed, 883 insertions(+), 5391 deletions(-)
diff --git a/hw/mcu/stm/stm32f4xx/src/hal_i2c.c b/hw/mcu/stm/stm32_common/src/hal_i2c.c
similarity index 69%
rename from hw/mcu/stm/stm32f4xx/src/hal_i2c.c
rename to hw/mcu/stm/stm32_common/src/hal_i2c.c
index 73c6a5c..0f829e6 100644
--- a/hw/mcu/stm/stm32f4xx/src/hal_i2c.c
+++ b/hw/mcu/stm/stm32_common/src/hal_i2c.c
@@ -26,38 +26,34 @@
#include <hal/hal_i2c.h>
#include <hal/hal_gpio.h>
-#include "stm32f4xx.h"
-#include "stm32f4xx_hal_dma.h"
-#include "stm32f4xx_hal_i2c.h"
-#include "stm32f4xx_hal_gpio.h"
-#include "stm32f4xx_hal_rcc.h"
-#include "mcu/stm32f4xx_mynewt_hal.h"
-#include "mcu/stm32f4_bsp.h"
+#include <mcu/stm32_hal.h>
-#define HAL_I2C_MAX_DEVS 3
+#define HAL_I2C_MAX_DEVS 3
-#define I2C_ADDRESS 0xae
+#define I2C_ADDRESS 0xae
-extern HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c,
- uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-extern HAL_StatusTypeDef HAL_I2C_Master_Receive_NoStop(I2C_HandleTypeDef *hi2c,
- uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+extern HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout,
+ uint8_t LastOp);
+extern HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout,
+ uint8_t LastOp);
-struct stm32f4_hal_i2c {
+struct stm32_hal_i2c {
I2C_HandleTypeDef hid_handle;
};
#if MYNEWT_VAL(I2C_0)
-static struct stm32f4_hal_i2c i2c0;
+static struct stm32_hal_i2c i2c0;
#endif
#if MYNEWT_VAL(I2C_1)
-static struct stm32f4_hal_i2c i2c1;
+static struct stm32_hal_i2c i2c1;
#endif
#if MYNEWT_VAL(I2C_2)
-static struct stm32f4_hal_i2c i2c2;
+static struct stm32_hal_i2c i2c2;
#endif
-static struct stm32f4_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
+static struct stm32_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
#if MYNEWT_VAL(I2C_0)
&i2c0,
#else
@@ -79,8 +75,8 @@ static struct stm32f4_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
int
hal_i2c_init(uint8_t i2c_num, void *usercfg)
{
- struct stm32f4_hal_i2c_cfg *cfg = (struct stm32f4_hal_i2c_cfg *)usercfg;
- struct stm32f4_hal_i2c *dev;
+ struct stm32_hal_i2c_cfg *cfg = (struct stm32_hal_i2c_cfg *)usercfg;
+ struct stm32_hal_i2c *dev;
I2C_InitTypeDef *init;
int rc;
@@ -129,44 +125,34 @@ int
hal_i2c_master_write(uint8_t i2c_num, struct hal_i2c_master_data *data,
uint32_t timo, uint8_t last_op)
{
- struct stm32f4_hal_i2c *dev;
+ struct stm32_hal_i2c *dev;
if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
return -1;
}
- if (!last_op) {
- return HAL_I2C_Master_Transmit_NoStop(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- } else {
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- }
+ return HAL_I2C_Master_Transmit_Custom(&dev->hid_handle, data->address << 1,
+ data->buffer, data->len, timo, last_op);
}
int
hal_i2c_master_read(uint8_t i2c_num, struct hal_i2c_master_data *pdata,
uint32_t timo, uint8_t last_op)
{
- struct stm32f4_hal_i2c *dev;
+ struct stm32_hal_i2c *dev;
if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
return -1;
}
- if (!last_op) {
- return HAL_I2C_Master_Receive_NoStop(&dev->hid_handle,
- pdata->address << 1, pdata->buffer, pdata->len, timo);
- } else {
- return HAL_I2C_Master_Receive(&dev->hid_handle, pdata->address << 1,
- pdata->buffer, pdata->len, timo);
- }
+ return HAL_I2C_Master_Receive_Custom(&dev->hid_handle, pdata->address << 1,
+ pdata->buffer, pdata->len, timo, last_op);
}
int
hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
{
- struct stm32f4_hal_i2c *dev;
+ struct stm32_hal_i2c *dev;
int rc;
if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
diff --git a/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c
new file mode 100644
index 0000000..367e09f
--- /dev/null
+++ b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c
@@ -0,0 +1,855 @@
+/**
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+#include <mcu/stm32_hal.h>
+#include <syscfg/syscfg.h>
+
+#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
+#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
+
+#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
+#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
+#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
+#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
+
+static const uint8_t HAL_I2C_MODE_MASTER_SEL = 0x11;
+
+/**
+ * @brief This function handles I2C Communication Timeout.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for I2C module
+ * @param Flag specifies the I2C flag to check.
+ * @param Status The new Flag status (SET or RESET).
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
+ uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
+{
+ /* Wait until flag is set */
+ while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
+ {
+ /* Check for the Timeout */
+ if(Timeout != HAL_MAX_DELAY)
+ {
+ if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for Master addressing phase.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for I2C module
+ * @param Flag specifies the I2C flag to check.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
+ uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
+{
+ while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
+ {
+ if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+
+ /* Clear AF Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
+
+ hi2c->ErrorCode = HAL_I2C_ERROR_AF;
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if(Timeout != HAL_MAX_DELAY)
+ {
+ if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
+ {
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+ return HAL_OK;
+}
+
+
+
+/**
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for I2C module
+ * @param DevAddress Target device address The device 7 bits address value
+ * in datasheet must be shifted to the left before calling the interface
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
+{
+ /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
+ uint32_t CurrentXferOptions = hi2c->XferOptions;
+
+ /* Generate Start condition if first transfer */
+ if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
+ {
+ /* Generate Start */
+ hi2c->Instance->CR1 |= I2C_CR1_START;
+ }
+ else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
+ {
+ /* Generate ReStart */
+ hi2c->Instance->CR1 |= I2C_CR1_START;
+ }
+
+ /* Wait until SB flag is set */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
+ {
+ /* Send slave address */
+ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
+ }
+ else
+ {
+ /* Send header of slave address */
+ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
+
+ /* Wait until ADD10 flag is set */
+ if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Send slave address */
+ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
+ }
+
+ /* Wait until ADDR flag is set */
+ if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles Acknowledge failed detection during an I2C Communication.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
+{
+ if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
+ {
+ /* Clear NACKF Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
+
+ hi2c->ErrorCode = HAL_I2C_ERROR_AF;
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
+ {
+ /* Check if a NACK is detected */
+ if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if(Timeout != HAL_MAX_DELAY)
+ {
+ if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
+ {
+ /* Check if a NACK is detected */
+ if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if(Timeout != HAL_MAX_DELAY)
+ {
+ if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
+ {
+ /* Check if a STOPF is detected */
+ if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
+ {
+ /* Clear STOP Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ hi2c->PreviousState = I2C_STATE_NONE;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ hi2c->State= HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ return HAL_OK;
+}
+
+
+
+/**
+ * @brief Transmits in master mode an amount of data in blocking mode.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param DevAddress Target device address The device 7 bits address value
+ * in datasheet must be shifted to the left before calling the interface
+ * @param pData Pointer to data buffer
+ * @param Size Amount of data to be sent
+ * @param Timeout Timeout duration
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout,
+ uint8_t LastOp)
+{
+ uint32_t tickstart = 0x00U;
+
+ /* Init tickstart for timeout management*/
+ tickstart = HAL_GetTick();
+
+ if(hi2c->State == HAL_I2C_STATE_READY)
+ {
+ if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL)
+ {
+ /* Wait until BUSY flag is reset */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
+ {
+ return HAL_BUSY;
+ }
+ }
+
+ /* Process Locked */
+ __HAL_LOCK(hi2c);
+
+ /* Check if the I2C is already enabled */
+ if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
+ {
+ /* Enable I2C peripheral */
+ __HAL_I2C_ENABLE(hi2c);
+ }
+
+ /* Disable Pos */
+ hi2c->Instance->CR1 &= ~I2C_CR1_POS;
+
+ hi2c->State = HAL_I2C_STATE_BUSY_TX;
+ hi2c->Mode = HAL_I2C_MODE_MASTER;
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+
+ /* Prepare transfer parameters */
+ hi2c->pBuffPtr = pData;
+ hi2c->XferCount = Size;
+ hi2c->XferOptions = I2C_NO_OPTION_FRAME;
+ hi2c->XferSize = hi2c->XferCount;
+
+ /* Send Slave Address */
+ if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+ return HAL_ERROR;
+ }
+ else
+ {
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Clear ADDR flag */
+ __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+
+ while(hi2c->XferSize > 0U)
+ {
+ /* Wait until TXE flag is set */
+ if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Write data to DR */
+ hi2c->Instance->DR = (*hi2c->pBuffPtr++);
+ hi2c->XferCount--;
+ hi2c->XferSize--;
+
+ if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
+ {
+ /* Write data to DR */
+ hi2c->Instance->DR = (*hi2c->pBuffPtr++);
+ hi2c->XferCount--;
+ hi2c->XferSize--;
+ }
+
+ /* Wait until BTF flag is set */
+ if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+
+ hi2c->State = HAL_I2C_STATE_READY;
+
+ if (LastOp)
+ {
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ }
+ else
+ {
+ hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
+ }
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_OK;
+ }
+ else
+ {
+ return HAL_BUSY;
+ }
+}
+
+/**
+ * @brief Master sends target device address for read request.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for I2C module
+ * @param DevAddress Target device address The device 7 bits address value
+ * in datasheet must be shifted to the left before calling the interface
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
+{
+ /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
+ uint32_t CurrentXferOptions = hi2c->XferOptions;
+
+ /* Enable Acknowledge */
+ hi2c->Instance->CR1 |= I2C_CR1_ACK;
+
+ /* Generate Start condition if first transfer */
+ if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
+ {
+ /* Generate Start */
+ hi2c->Instance->CR1 |= I2C_CR1_START;
+ }
+ else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
+ {
+ /* Generate ReStart */
+ hi2c->Instance->CR1 |= I2C_CR1_START;
+ }
+
+ /* Wait until SB flag is set */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
+ {
+ /* Send slave address */
+ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
+ }
+ else
+ {
+ /* Send header of slave address */
+ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
+
+ /* Wait until ADD10 flag is set */
+ if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Send slave address */
+ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
+
+ /* Wait until ADDR flag is set */
+ if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Clear ADDR flag */
+ __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+
+ /* Generate Restart */
+ hi2c->Instance->CR1 |= I2C_CR1_START;
+
+ /* Wait until SB flag is set */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ /* Send header of slave address */
+ hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
+ }
+
+ /* Wait until ADDR flag is set */
+ if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ return HAL_OK;
+}
+
+/**
+ * @brief Receives in master mode an amount of data in blocking mode.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param DevAddress Target device address The device 7 bits address value
+ * in datasheet must be shifted to the left before calling the interface
+ * @param pData Pointer to data buffer
+ * @param Size Amount of data to be sent
+ * @param Timeout Timeout duration
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout,
+ uint8_t LastOp)
+{
+ uint32_t tickstart = 0x00U;
+
+ /* Init tickstart for timeout management*/
+ tickstart = HAL_GetTick();
+
+ if(hi2c->State == HAL_I2C_STATE_READY)
+ {
+ if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL)
+ {
+ /* Wait until BUSY flag is reset */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
+ {
+ return HAL_BUSY;
+ }
+ }
+
+ /* Process Locked */
+ __HAL_LOCK(hi2c);
+
+ /* Check if the I2C is already enabled */
+ if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
+ {
+ /* Enable I2C peripheral */
+ __HAL_I2C_ENABLE(hi2c);
+ }
+
+ /* Disable Pos */
+ hi2c->Instance->CR1 &= ~I2C_CR1_POS;
+
+ hi2c->State = HAL_I2C_STATE_BUSY_RX;
+ hi2c->Mode = HAL_I2C_MODE_MASTER;
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+
+ /* Prepare transfer parameters */
+ hi2c->pBuffPtr = pData;
+ hi2c->XferCount = Size;
+ hi2c->XferOptions = I2C_NO_OPTION_FRAME;
+ hi2c->XferSize = hi2c->XferCount;
+
+ /* Send Slave Address */
+ if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+ return HAL_ERROR;
+ }
+ else
+ {
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+ return HAL_TIMEOUT;
+ }
+ }
+
+ if(hi2c->XferSize == 0U)
+ {
+ /* Clear ADDR flag */
+ __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+
+ if (LastOp)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ }
+ }
+ else if(hi2c->XferSize == 1U)
+ {
+ /* Disable Acknowledge */
+ hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
+
+ /* Clear ADDR flag */
+ __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+
+ if (LastOp)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ }
+ }
+ else if(hi2c->XferSize == 2U)
+ {
+ /* Disable Acknowledge */
+ hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
+
+ /* Enable Pos */
+ hi2c->Instance->CR1 |= I2C_CR1_POS;
+
+ /* Clear ADDR flag */
+ __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+ }
+ else
+ {
+ /* Enable Acknowledge */
+ hi2c->Instance->CR1 |= I2C_CR1_ACK;
+
+ /* Clear ADDR flag */
+ __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
+ }
+
+ while(hi2c->XferSize > 0U)
+ {
+ if(hi2c->XferSize <= 3U)
+ {
+ /* One byte */
+ if(hi2c->XferSize == 1U)
+ {
+ /* Wait until RXNE flag is set */
+ if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
+ {
+ return HAL_TIMEOUT;
+ }
+ else
+ {
+ return HAL_ERROR;
+ }
+ }
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+ }
+ /* Two bytes */
+ else if(hi2c->XferSize == 2U)
+ {
+ /* Wait until BTF flag is set */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ if (LastOp)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ }
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+ }
+ /* 3 Last bytes */
+ else
+ {
+ /* Wait until BTF flag is set */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ /* Disable Acknowledge */
+ hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+
+ /* Wait until BTF flag is set */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ if (LastOp)
+ {
+ /* Generate Stop */
+ hi2c->Instance->CR1 |= I2C_CR1_STOP;
+ }
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+ }
+ }
+ else
+ {
+ /* Wait until RXNE flag is set */
+ if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
+ {
+ return HAL_TIMEOUT;
+ }
+ else
+ {
+ return HAL_ERROR;
+ }
+ }
+
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+
+ if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
+ {
+ /* Read data from DR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+ }
+ }
+ }
+
+ hi2c->State = HAL_I2C_STATE_READY;
+
+ if (LastOp) {
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ } else {
+ hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
+ }
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_OK;
+ }
+ else
+ {
+ return HAL_BUSY;
+ }
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h
index c3d3f46..1dee100 100644
--- a/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f4xx/include/mcu/stm32_hal.h
@@ -58,6 +58,11 @@ struct stm32_hal_spi_cfg {
int irq_prio;
};
+/* hal_i2c */
+#include "stm32f4xx_hal_i2c.h"
+#include "mcu/stm32f4xx_mynewt_hal.h"
+#include "mcu/stm32f4_bsp.h"
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f4xx/pkg.yml b/hw/mcu/stm/stm32f4xx/pkg.yml
index 98938f5..d08025b 100644
--- a/hw/mcu/stm/stm32f4xx/pkg.yml
+++ b/hw/mcu/stm/stm32f4xx/pkg.yml
@@ -35,7 +35,6 @@ pkg.type: sdk
# to be improved.
pkg.ign_files:
- ".*template.*"
- - "stm32f4xx_hal_i2c.c"
pkg.ign_dirs:
- "Device"
diff --git a/hw/mcu/stm/stm32f4xx/src/stm32_driver_mod_i2c.c b/hw/mcu/stm/stm32f4xx/src/stm32_driver_mod_i2c.c
deleted file mode 100644
index a3ed0fe..0000000
--- a/hw/mcu/stm/stm32f4xx/src/stm32_driver_mod_i2c.c
+++ /dev/null
@@ -1,5353 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_i2c.c
- * @author MCD Application Team
- * @version V1.5.1
- * @date 01-July-2016
- * @brief I2C HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Inter Integrated Circuit (I2C) peripheral:
- * + Initialization and de-initialization functions
- * + IO operation functions
- * + Peripheral Control functions
- * + Peripheral State functions
- *
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The I2C HAL driver can be used as follows:
-
- (#) Declare a I2C_HandleTypeDef handle structure, for example:
- I2C_HandleTypeDef hi2c;
-
- (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
- (##) Enable the I2Cx interface clock
- (##) I2C pins configuration
- (+++) Enable the clock for the I2C GPIOs
- (+++) Configure I2C pins as alternate function open-drain
- (##) NVIC configuration if you need to use interrupt process
- (+++) Configure the I2Cx interrupt priority
- (+++) Enable the NVIC I2C IRQ Channel
- (##) DMA Configuration if you need to use DMA process
- (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
- (+++) Enable the DMAx interface clock using
- (+++) Configure the DMA handle parameters
- (+++) Configure the DMA Tx or Rx Stream
- (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
- (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
- the DMA Tx or Rx Stream
-
- (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
- Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
-
- (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
- (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
-
- (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
-
- (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
-
- *** Polling mode IO operation ***
- =================================
- [..]
- (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
- (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
- (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
- (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
-
- *** Polling mode IO MEM operation ***
- =====================================
- [..]
- (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
- (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
-
-
- *** Interrupt mode IO operation ***
- ===================================
- [..]
- (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
- (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
- (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
- (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
- (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
- (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
- (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
- (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback
-
- *** Interrupt mode IO sequential operation ***
- ==============================================
- [..]
- (+@) These interfaces allow to manage a sequential transfer with a repeated start condition
- when a direction change during transfer
- (+) A specific option manage the different steps of a sequential transfer
- (+) Differents steps option I2C_XferOptions_definition are listed below :
- (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
- (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a start condition with data to transfer without a final stop condition
- (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a restart condition with new data to transfer if the direction change or
- manage only the new data to transfer if no direction change and without a final stop condition in both cases
- (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a restart condition with new data to transfer if the direction change or
- manage only the new data to transfer if no direction change and with a final stop condition in both cases
-
- (+) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
- (++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
- (+) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
- (++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
- (++) The associated previous transfer callback is called at the end of abort process
- (++) mean HAL_I2C_MasterTxCpltCallback() in case of previous state was master transmit
- (++) mean HAL_I2c_MasterRxCpltCallback() in case of previous state was master receive
- (+) Enable/disable the Address listen mode in slave I2C mode
- using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
- (++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
- add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
- (++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
- (+) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
- (++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
- (+) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
- (++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-
-
- *** Interrupt mode IO MEM operation ***
- =======================================
- [..]
- (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
- HAL_I2C_Mem_Write_IT()
- (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
- (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
- HAL_I2C_Mem_Read_IT()
- (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback
-
- *** DMA mode IO operation ***
- ==============================
- [..]
- (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
- HAL_I2C_Master_Transmit_DMA()
- (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
- (+) Receive in master mode an amount of data in non blocking mode (DMA) using
- HAL_I2C_Master_Receive_DMA()
- (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
- (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
- HAL_I2C_Slave_Transmit_DMA()
- (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
- (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
- HAL_I2C_Slave_Receive_DMA()
- (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback
-
- *** DMA mode IO MEM operation ***
- =================================
- [..]
- (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
- HAL_I2C_Mem_Write_DMA()
- (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
- (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
- HAL_I2C_Mem_Read_DMA()
- (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback
-
-
- *** I2C HAL driver macros list ***
- ==================================
- [..]
- Below the list of most used macros in I2C HAL driver.
-
- (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
- (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
- (+) __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
- (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
- (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
- (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
-
- [..]
- (@) You can refer to the I2C HAL driver header file for more useful macros
-
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup I2C I2C
- * @brief I2C HAL module driver
- * @{
- */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup I2C_Private_Constants
- * @{
- */
-#define I2C_TIMEOUT_FLAG ((uint32_t)35U) /*!< Timeout 35 ms */
-#define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000U) /*!< Timeout 10 s */
-#define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)25U) /*!< Timeout 25 ms */
-#define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U) /*!< XferOptions default value */
-
-/* Private define for @ref PreviousState usage */
-#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
-#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
-#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
-
-/**
- * @}
- */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup I2C_Private_Functions
- * @{
- */
-/* Private functions to handle DMA transfer */
-static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMAError(DMA_HandleTypeDef *hdma);
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
-
-static void I2C_ITError(I2C_HandleTypeDef *hi2c);
-
-static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
-
-/* Private functions for I2C transfer IRQ handler */
-static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
-
-static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup I2C_Exported_Functions I2C Exported Functions
- * @{
- */
-
-/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and de-initialization functions #####
- ===============================================================================
- [..] This subsection provides a set of functions allowing to initialize and
- de-initialize the I2Cx peripheral:
-
- (+) User must Implement HAL_I2C_MspInit() function in which he configures
- all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
-
- (+) Call the function HAL_I2C_Init() to configure the selected device with
- the selected configuration:
- (++) Communication Speed
- (++) Duty cycle
- (++) Addressing mode
- (++) Own Address 1
- (++) Dual Addressing mode
- (++) Own Address 2
- (++) General call mode
- (++) Nostretch mode
-
- (+) Call the function HAL_I2C_DeInit() to restore the default configuration
- of the selected I2Cx peripheral.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Initializes the I2C according to the specified parameters
- * in the I2C_InitTypeDef and create the associated handle.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
-{
- uint32_t freqrange = 0U;
- uint32_t pclk1 = 0U;
-
- /* Check the I2C handle allocation */
- if(hi2c == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
- assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
- assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
- assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
- assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
- assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
- assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
- assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
- assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
-
- if(hi2c->State == HAL_I2C_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- hi2c->Lock = HAL_UNLOCKED;
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- HAL_I2C_MspInit(hi2c);
- }
-
- hi2c->State = HAL_I2C_STATE_BUSY;
-
- /* Disable the selected I2C peripheral */
- __HAL_I2C_DISABLE(hi2c);
-
- /* Get PCLK1 frequency */
- pclk1 = HAL_RCC_GetPCLK1Freq();
-
- /* Calculate frequency range */
- freqrange = I2C_FREQRANGE(pclk1);
-
- /*---------------------------- I2Cx CR2 Configuration ----------------------*/
- /* Configure I2Cx: Frequency range */
- hi2c->Instance->CR2 = freqrange;
-
- /*---------------------------- I2Cx TRISE Configuration --------------------*/
- /* Configure I2Cx: Rise Time */
- hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
-
- /*---------------------------- I2Cx CCR Configuration ----------------------*/
- /* Configure I2Cx: Speed */
- hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
-
- /*---------------------------- I2Cx CR1 Configuration ----------------------*/
- /* Configure I2Cx: Generalcall and NoStretch mode */
- hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
-
- /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
- /* Configure I2Cx: Own Address1 and addressing mode */
- hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
-
- /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
- /* Configure I2Cx: Dual mode and Own Address2 */
- hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
-
- /* Enable the selected I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
-
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the I2C peripheral.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
-{
- /* Check the I2C handle allocation */
- if(hi2c == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-
- hi2c->State = HAL_I2C_STATE_BUSY;
-
- /* Disable the I2C Peripheral Clock */
- __HAL_I2C_DISABLE(hi2c);
-
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- HAL_I2C_MspDeInit(hi2c);
-
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->State = HAL_I2C_STATE_RESET;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Release Lock */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
-}
-
-/**
- * @brief I2C MSP Init.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
- __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_I2C_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief I2C MSP DeInit
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
- __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_I2C_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Exported_Functions_Group2 IO operation functions
- * @brief Data transfers functions
- *
-@verbatim
- ===============================================================================
- ##### IO operation functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to manage the I2C data
- transfers.
-
- (#) There are two modes of transfer:
- (++) Blocking mode : The communication is performed in the polling mode.
- The status of all data processing is returned by the same function
- after finishing transfer.
- (++) No-Blocking mode : The communication is performed using Interrupts
- or DMA. These functions return the status of the transfer startup.
- The end of the data processing will be indicated through the
- dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
- using DMA mode.
-
- (#) Blocking mode functions are :
- (++) HAL_I2C_Master_Transmit()
- (++) HAL_I2C_Master_Receive()
- (++) HAL_I2C_Slave_Transmit()
- (++) HAL_I2C_Slave_Receive()
- (++) HAL_I2C_Mem_Write()
- (++) HAL_I2C_Mem_Read()
- (++) HAL_I2C_IsDeviceReady()
-
- (#) No-Blocking mode functions with Interrupt are :
- (++) HAL_I2C_Master_Transmit_IT()
- (++) HAL_I2C_Master_Receive_IT()
- (++) HAL_I2C_Slave_Transmit_IT()
- (++) HAL_I2C_Slave_Receive_IT()
- (++) HAL_I2C_Master_Sequential_Transmit_IT()
- (++) HAL_I2C_Master_Sequential_Receive_IT()
- (++) HAL_I2C_Slave_Sequential_Transmit_IT()
- (++) HAL_I2C_Slave_Sequential_Receive_IT()
- (++) HAL_I2C_Mem_Write_IT()
- (++) HAL_I2C_Mem_Read_IT()
-
- (#) No-Blocking mode functions with DMA are :
- (++) HAL_I2C_Master_Transmit_DMA()
- (++) HAL_I2C_Master_Receive_DMA()
- (++) HAL_I2C_Slave_Transmit_DMA()
- (++) HAL_I2C_Slave_Receive_DMA()
- (++) HAL_I2C_Mem_Write_DMA()
- (++) HAL_I2C_Mem_Read_DMA()
-
- (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
- (++) HAL_I2C_MemTxCpltCallback()
- (++) HAL_I2C_MemRxCpltCallback()
- (++) HAL_I2C_MasterTxCpltCallback()
- (++) HAL_I2C_MasterRxCpltCallback()
- (++) HAL_I2C_SlaveTxCpltCallback()
- (++) HAL_I2C_SlaveRxCpltCallback()
- (++) HAL_I2C_ErrorCallback()
- (++) HAL_I2C_AbortCpltCallback()
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Transmits in master mode an amount of data in blocking mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, uint8_t sendStop)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address */
- if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- while(Size > 0U)
- {
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Write data to DR */
- hi2c->Instance->DR = (*pData++);
- Size--;
-
- if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*pData++);
- Size--;
- }
-
- /* Wait until BTF flag is set */
- if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Generate Stop */
- if (sendStop) {
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- } else {
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Transmit_Common(hi2c, DevAddress, pData, Size,
- Timeout, 1);
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Transmit_Common(hi2c, DevAddress, pData, Size,
- Timeout, 0);
-}
-
-/**
- * @brief Receives in master mode an amount of data in blocking mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, int sendStop)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address */
- if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- if(Size == 0U)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- if (sendStop) {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- }
- else if(Size == 1U)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- if (sendStop) {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- }
- else if(Size == 2U)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Enable Pos */
- hi2c->Instance->CR1 |= I2C_CR1_POS;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- while(Size > 0U)
- {
- if(Size <= 3U)
- {
- /* One byte */
- if(Size == 1U)
- {
- /* Wait until RXNE flag is set */
- if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
- {
- return HAL_TIMEOUT;
- }
- else
- {
- return HAL_ERROR;
- }
- }
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- /* Two bytes */
- else if(Size == 2U)
- {
- /* Wait until BTF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- if (sendStop) {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- /* 3 Last bytes */
- else
- {
- /* Wait until BTF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- /* Wait until BTF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- if (sendStop) {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- }
- else
- {
- /* Wait until RXNE flag is set */
- if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
- {
- return HAL_TIMEOUT;
- }
- else
- {
- return HAL_ERROR;
- }
- }
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
- {
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- }
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
- if (!sendStop) {
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- } else {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Receive_Common(hi2c, DevAddress, pData, Size,
- Timeout, 1);
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Receive_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Receive_Common(hi2c, DevAddress, pData, Size,
- Timeout, 0);
-}
-
-/**
- * @brief Transmits in slave mode an amount of data in blocking mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* If 10bit addressing mode is selected */
- if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
- {
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- while(Size > 0U)
- {
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Write data to DR */
- hi2c->Instance->DR = (*pData++);
- Size--;
-
- if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*pData++);
- Size--;
- }
- }
-
- /* Wait until AF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Disable Address Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in slave mode an amount of data in blocking mode
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- while(Size > 0U)
- {
- /* Wait until RXNE flag is set */
- if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
- {
- return HAL_TIMEOUT;
- }
- else
- {
- return HAL_ERROR;
- }
- }
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
- {
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- }
-
- /* Wait until STOP flag is set */
- if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear STOP flag */
- __HAL_I2C_CLEAR_STOPFLAG(hi2c);
-
- /* Disable Address Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
-
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential transmit in master mode an amount of data in no-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- uint32_t Prev_State = 0x00U;
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Check Busy Flag only if FIRST call of Master interface */
- if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = XferOptions;
- hi2c->Devaddress = DevAddress;
-
- Prev_State = hi2c->PreviousState;
-
- /* Generate Start */
- if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
- {
- /* Generate Start condition if first transfer */
- if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- else if(Prev_State == I2C_STATE_MASTER_BUSY_RX)
- {
- /* Generate ReStart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential receive in master mode an amount of data in no-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- uint32_t Prev_State = 0x00U;
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Check Busy Flag only if FIRST call of Master interface */
- if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = XferOptions;
- hi2c->Devaddress = DevAddress;
-
- Prev_State = hi2c->PreviousState;
-
- if((Prev_State == I2C_STATE_MASTER_BUSY_TX) || (Prev_State == I2C_STATE_NONE))
- {
- /* Generate Start condition if first transfer */
- if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- else if(Prev_State == I2C_STATE_MASTER_BUSY_TX)
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate ReStart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if(hi2c->State == HAL_I2C_STATE_LISTEN)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = XferOptions;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential receive in slave mode an amount of data in no-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if(hi2c->State == HAL_I2C_STATE_LISTEN)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = XferOptions;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Enable the Address listen mode with Interrupt.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
-{
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Disable the Address listen mode with Interrupt.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of tmp to prevent undefined behavior of volatile usage */
- uint32_t tmp;
-
- /* Disable Address listen mode only if a transfer is not ongoing */
- if(hi2c->State == HAL_I2C_STATE_LISTEN)
- {
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Disable Address Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Disable EVT and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- uint32_t tickstart = 0x00U;
-
- __IO uint32_t count = 0U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- if(hi2c->XferSize > 0U)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferM1CpltCallback = NULL;
- hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA Stream */
- HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
-
- /* Send Slave Address */
- if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
- }
- else
- {
- /* Send Slave Address */
- if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->State = HAL_I2C_STATE_READY;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in master mode an amount of data in no-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- uint32_t tickstart = 0x00U;
-
- __IO uint32_t count = 0U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- if(hi2c->XferSize > 0U)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferM1CpltCallback = NULL;
- hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA Stream */
- HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
-
- /* Send Slave Address */
- if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- if(Size == 1U)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- }
- else
- {
- /* Enable Last DMA bit */
- hi2c->Instance->CR2 |= I2C_CR2_LAST;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
- }
- else
- {
- /* Send Slave Address */
- if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- }
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Abort a master I2C process communication with Interrupt.
- * @note This abort can be called only if state is ready
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
-{
- /* Abort Master transfer during Receive or Transmit process */
- if(hi2c->Mode == HAL_I2C_MODE_MASTER)
- {
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_ABORT;
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->XferCount = 0U;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- if(hi2c->State == HAL_I2C_STATE_ABORT)
- {
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Call the Abort Complete callback */
- HAL_I2C_AbortCpltCallback(hi2c);
- }
-
- return HAL_OK;
- }
- else
- {
- /* Wrong usage of abort function */
- /* This function should be used only in case of abort monitored by master device */
- return HAL_ERROR;
- }
-}
-
-/**
- * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferM1CpltCallback = NULL;
- hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA Stream */
- HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
-
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Wait until ADDR flag is set */
- count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
-
- /* If 7bit addressing mode is selected */
- if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until ADDR flag is set */
- count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- if((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferM1CpltCallback = NULL;
- hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA Stream */
- HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
-
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
-
- /* Enable Address Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Wait until ADDR flag is set */
- count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-/**
- * @brief Write an amount of data in blocking mode to a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address and Memory Address */
- if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- while(Size > 0U)
- {
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Write data to DR */
- hi2c->Instance->DR = (*pData++);
- Size--;
-
- if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*pData++);
- Size--;
- }
- }
-
- /* Wait until BTF flag is set */
- if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Read an amount of data in blocking mode from a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address and Memory Address */
- if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- if(Size == 0U)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- else if(Size == 1U)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- else if(Size == 2U)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Enable Pos */
- hi2c->Instance->CR1 |= I2C_CR1_POS;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- while(Size > 0U)
- {
- if(Size <= 3U)
- {
- /* One byte */
- if(Size== 1U)
- {
- /* Wait until RXNE flag is set */
- if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
- {
- return HAL_TIMEOUT;
- }
- else
- {
- return HAL_ERROR;
- }
- }
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- /* Two bytes */
- else if(Size == 2U)
- {
- /* Wait until BTF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- /* 3 Last bytes */
- else
- {
- /* Wait until BTF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- /* Wait until BTF flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- }
- else
- {
- /* Wait until RXNE flag is set */
- if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
- {
- return HAL_TIMEOUT;
- }
- else
- {
- return HAL_ERROR;
- }
- }
-
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
-
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
- {
- /* Read data from DR */
- (*pData++) = hi2c->Instance->DR;
- Size--;
- }
- }
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
- hi2c->Memaddress = MemAddress;
- hi2c->MemaddSize = MemAddSize;
- hi2c->EventCount = 0U;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
- hi2c->Memaddress = MemAddress;
- hi2c->MemaddSize = MemAddSize;
- hi2c->EventCount = 0U;
-
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- if(hi2c->XferSize > 0U)
- {
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
- }
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- if(hi2c->XferSize > 0U)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferM1CpltCallback = NULL;
- hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA Stream */
- HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
-
- /* Send Slave Address and Memory Address */
- if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
- }
- else
- {
- /* Send Slave Address and Memory Address */
- if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->State = HAL_I2C_STATE_READY;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be read
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- uint32_t tickstart = 0x00U;
-
- /* Init tickstart for timeout management*/
- tickstart = HAL_GetTick();
-
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
- do
- {
- if(count-- == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- hi2c->pBuffPtr = pData;
- hi2c->XferSize = Size;
- hi2c->XferCount = Size;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- if(hi2c->XferSize > 0U)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferM1CpltCallback = NULL;
- hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA Stream */
- HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
-
- /* Send Slave Address and Memory Address */
- if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- if(Size == 1U)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- }
- else
- {
- /* Enable Last DMA bit */
- hi2c->Instance->CR2 |= I2C_CR2_LAST;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
- }
- else
- {
- /* Send Slave Address and Memory Address */
- if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_ERROR;
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- }
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Checks if target device is ready for communication.
- * @note This function is used with Memory devices
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param Trials Number of trials
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
- uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- if(hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Pos */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- hi2c->State = HAL_I2C_STATE_BUSY;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- do
- {
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
-
- /* Wait until ADDR or AF flag are set */
- /* Get tick */
- tickstart = HAL_GetTick();
-
- tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
- tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
- tmp3 = hi2c->State;
- while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
- {
- if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
- {
- hi2c->State = HAL_I2C_STATE_TIMEOUT;
- }
- tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
- tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
- tmp3 = hi2c->State;
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Check if the ADDR flag has been set */
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- /* Clear ADDR Flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- /* Clear AF Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
- }
- }while(I2C_Trials++ < Trials);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief This function handles I2C event interrupt request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
- uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
- uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
- uint32_t itsources = READ_REG(hi2c->Instance->CR2);
-
- uint32_t CurrentMode = hi2c->Mode;
-
- /* Master or Memory mode selected */
- if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
- {
- /* SB Set ----------------------------------------------------------------*/
- if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_Master_SB(hi2c);
- }
- /* ADD10 Set -------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_Master_ADD10(hi2c);
- }
- /* ADDR Set --------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_Master_ADDR(hi2c);
- }
-
- /* I2C in mode Transmitter -----------------------------------------------*/
- if((sr2itflags & I2C_FLAG_TRA) != RESET)
- {
- /* TXE set and BTF reset -----------------------------------------------*/
- if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
- {
- I2C_MasterTransmit_TXE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_MasterTransmit_BTF(hi2c);
- }
- }
- /* I2C in mode Receiver --------------------------------------------------*/
- else
- {
- /* RXNE set and BTF reset -----------------------------------------------*/
- if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
- {
- I2C_MasterReceive_RXNE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_MasterReceive_BTF(hi2c);
- }
- }
- }
- /* Slave mode selected */
- else
- {
- /* ADDR set --------------------------------------------------------------*/
- if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_Slave_ADDR(hi2c);
- }
- /* STOPF set --------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_Slave_STOPF(hi2c);
- }
- /* I2C in mode Transmitter -----------------------------------------------*/
- else if((sr2itflags & I2C_FLAG_TRA) != RESET)
- {
- /* TXE set and BTF reset -----------------------------------------------*/
- if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
- {
- I2C_SlaveTransmit_TXE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_SlaveTransmit_BTF(hi2c);
- }
- }
- /* I2C in mode Receiver --------------------------------------------------*/
- else
- {
- /* RXNE set and BTF reset ----------------------------------------------*/
- if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
- {
- I2C_SlaveReceive_RXNE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
- {
- I2C_SlaveReceive_BTF(hi2c);
- }
- }
- }
-}
-
-/**
- * @brief This function handles I2C error interrupt request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
- uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
- uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
- uint32_t itsources = READ_REG(hi2c->Instance->CR2);
-
- /* I2C Bus error interrupt occurred ----------------------------------------*/
- if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
-
- /* Clear BERR flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
- }
-
- /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
- if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
-
- /* Clear ARLO flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
- }
-
- /* I2C Acknowledge failure error interrupt occurred ------------------------*/
- if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
- {
- tmp1 = hi2c->Mode;
- tmp2 = hi2c->XferCount;
- tmp3 = hi2c->State;
- tmp4 = hi2c->PreviousState;
- if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
- ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
- ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
- {
- I2C_Slave_AF(hi2c);
- }
- else
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- }
- }
-
- /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
- if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
- /* Clear OVR flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
- }
-
- /* Call the Error Callback in case of Error detected -----------------------*/
- if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
- {
- I2C_ITError(hi2c);
- }
-}
-
-/**
- * @brief Master Tx Transfer completed callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief Master Rx Transfer completed callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
- */
-}
-
-/** @brief Slave Tx Transfer completed callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief Slave Rx Transfer completed callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief Slave Address Match callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
- * @param AddrMatchCode Address Match Code
- * @retval None
- */
-__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- UNUSED(TransferDirection);
- UNUSED(AddrMatchCode);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_AddrCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief Listen Complete callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_ListenCpltCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief Memory Tx Transfer completed callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MemTxCpltCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief Memory Rx Transfer completed callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MemRxCpltCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief I2C error callbacks.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_ErrorCallback can be implemented in the user file
- */
-}
-
-/**
- * @brief I2C abort callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_AbortCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
- * @brief Peripheral State and Errors functions
- *
-@verbatim
- ===============================================================================
- ##### Peripheral State, Mode and Errors functions #####
- ===============================================================================
- [..]
- This subsection permits to get in run-time the status of the peripheral
- and the data flow.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Returns the I2C state.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL state
- */
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
-{
- return hi2c->State;
-}
-
-/**
- * @brief Returns the I2C Master, Slave, Memory or no mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL mode
- */
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
-{
- return hi2c->Mode;
-}
-
-/**
- * @brief Return the I2C error code
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval I2C Error Code
- */
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
-{
- return hi2c->ErrorCode;
-}
-
-/**
- * @}
- */
-
-/**
- * @brief Handle TXE flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t CurrentState = hi2c->State;
- uint32_t CurrentMode = hi2c->Mode;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
- uint32_t tmp;
-
- if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
- {
- /* Call TxCpltCallback() directly if no stop mode is set */
- if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
- {
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
- HAL_I2C_MasterTxCpltCallback(hi2c);
- }
- else /* Generate Stop condition then Call TxCpltCallback() */
- {
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- HAL_I2C_MemTxCpltCallback(hi2c);
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- HAL_I2C_MasterTxCpltCallback(hi2c);
- }
- }
- }
- else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
- ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
- {
- if(hi2c->XferCount == 0U)
- {
- /* Disable BUF interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
- }
- else
- {
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- if(hi2c->EventCount == 0)
- {
- /* If Memory address size is 8Bit */
- if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
-
- hi2c->EventCount += 2;
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
-
- hi2c->EventCount++;
- }
- }
- else if(hi2c->EventCount == 1)
- {
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
-
- hi2c->EventCount++;
- }
- else if(hi2c->EventCount == 2)
- {
- if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
- {
- /* Generate Restart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*hi2c->pBuffPtr++);
- hi2c->XferCount--;
- }
- }
- }
- else
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*hi2c->pBuffPtr++);
- hi2c->XferCount--;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle BTF flag for Master transmitter
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t tmp;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
- {
- if(hi2c->XferCount != 0U)
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*hi2c->pBuffPtr++);
- hi2c->XferCount--;
- }
- else
- {
- /* Call TxCpltCallback() directly if no stop mode is set */
- if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
- {
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
- HAL_I2C_MasterTxCpltCallback(hi2c);
- }
- else /* Generate Stop condition then Call TxCpltCallback() */
- {
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_MemTxCpltCallback(hi2c);
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_MasterTxCpltCallback(hi2c);
- }
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle RXNE flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
-{
- if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
- {
- uint32_t tmp = 0U;
-
- tmp = hi2c->XferCount;
- if(tmp > 3U)
- {
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
- }
- else if((tmp == 2U) || (tmp == 3U))
- {
- if(hi2c->XferOptions != I2C_NEXT_FRAME)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Enable Pos */
- hi2c->Instance->CR1 |= I2C_CR1_POS;
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
- }
-
- /* Disable BUF interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
- }
- else
- {
- if(hi2c->XferOptions != I2C_NEXT_FRAME)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
- }
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
-
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->State = HAL_I2C_STATE_READY;
-
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- HAL_I2C_MemRxCpltCallback(hi2c);
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- HAL_I2C_MasterRxCpltCallback(hi2c);
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle BTF flag for Master receiver
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t tmp;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- if(hi2c->XferCount == 3U)
- {
- if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- }
-
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
- }
- else if(hi2c->XferCount == 2U)
- {
- /* Prepare next transfer or stop current transfer */
- if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
- {
- if(CurrentXferOptions != I2C_NEXT_FRAME)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
- }
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- }
- else
- {
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
-
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
-
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
-
- /* Disable EVT and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_MemRxCpltCallback(hi2c);
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_MasterRxCpltCallback(hi2c);
- }
- }
- else
- {
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle SB flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-
-static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
-{
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- if(hi2c->EventCount == 0U)
- {
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
- }
- else
- {
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
- }
- }
- else
- {
- if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Send slave 7 Bits address */
- if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
- {
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
- }
- else
- {
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
- }
- }
- else
- {
- if(hi2c->EventCount == 0U)
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
- }
- else if(hi2c->EventCount == 1U)
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
- }
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Handle ADD10 flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
-{
- /* Send slave address */
- hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
-
- return HAL_OK;
-}
-
-/**
- * @brief Handle ADDR flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentMode = hi2c->Mode;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
- uint32_t Prev_State = hi2c->PreviousState;
-
- if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
- {
- if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Restart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- hi2c->EventCount++;
- }
- else
- {
- if(hi2c->XferCount == 0U)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- else if(hi2c->XferCount == 1U)
- {
- /* Prepare next transfer or stop current transfer */
- if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
- && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
- {
- if(hi2c->XferOptions != I2C_NEXT_FRAME)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- }
- }
- else if(hi2c->XferCount == 2U)
- {
- if(hi2c->XferOptions != I2C_NEXT_FRAME)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Enable Pos */
- hi2c->Instance->CR1 |= I2C_CR1_POS;
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- /* Reset Event counter */
- hi2c->EventCount = 0;
- }
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Handle TXE flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t tmp;
- uint32_t CurrentState = hi2c->State;
-
- if(hi2c->XferCount != 0U)
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*hi2c->pBuffPtr++);
- hi2c->XferCount--;
-
- if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
- {
- /* Last Byte is received, disable Interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
-
- /* Set state at HAL_I2C_STATE_LISTEN */
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the Tx complete callback to inform upper layer of the end of receive process */
- HAL_I2C_SlaveTxCpltCallback(hi2c);
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle BTF flag for Slave transmitter
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
-{
- if(hi2c->XferCount != 0U)
- {
- /* Write data to DR */
- hi2c->Instance->DR = (*hi2c->pBuffPtr++);
- hi2c->XferCount--;
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle RXNE flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t tmp;
- uint32_t CurrentState = hi2c->State;
-
- if(hi2c->XferCount != 0U)
- {
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
-
- if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
- {
- /* Last Byte is received, disable Interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
-
- /* Set state at HAL_I2C_STATE_LISTEN */
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the Rx complete callback to inform upper layer of the end of receive process */
- HAL_I2C_SlaveRxCpltCallback(hi2c);
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle BTF flag for Slave receiver
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
-{
- if(hi2c->XferCount != 0U)
- {
- /* Read data from DR */
- (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
- hi2c->XferCount--;
- }
- return HAL_OK;
-}
-
-/**
- * @brief Handle ADD flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
-{
- uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
- uint16_t SlaveAddrCode = 0U;
-
- /* Transfer Direction requested by Master */
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
- {
- TransferDirection = I2C_DIRECTION_TRANSMIT;
- }
-
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
- {
- SlaveAddrCode = hi2c->Init.OwnAddress1;
- }
- else
- {
- SlaveAddrCode = hi2c->Init.OwnAddress2;
- }
-
- /* Call Slave Addr callback */
- HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
-
- return HAL_OK;
-}
-
-/**
- * @brief Handle STOPF flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentState = hi2c->State;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Clear STOPF flag */
- __HAL_I2C_CLEAR_STOPFLAG(hi2c);
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
- (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
- HAL_I2C_ListenCpltCallback(hi2c);
- }
- else
- {
- if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_SlaveRxCpltCallback(hi2c);
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t CurrentState = hi2c->State;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
- uint32_t tmp;
-
- if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
- (CurrentState == HAL_I2C_STATE_LISTEN))
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
- HAL_I2C_ListenCpltCallback(hi2c);
- }
- else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- HAL_I2C_SlaveTxCpltCallback(hi2c);
- }
- else
- {
- /* Clear AF flag only */
- /* State Listen, but XferOptions == FIRST or NEXT */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief I2C interrupts error process
- * @param hi2c I2C handle.
- * @retval None
- */
-static void I2C_ITError(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentState = hi2c->State;
-
- if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
- {
- /* keep HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_LISTEN;
- }
- else
- {
- /* If state is an abort treatment on going, don't change state */
- /* This change will be do later */
- if(hi2c->State != HAL_I2C_STATE_ABORT)
- {
- hi2c->State = HAL_I2C_STATE_READY;
- }
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- }
-
- /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
-
- /* Abort DMA transfer */
- if((hi2c->Instance->CR1 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
-
- if(hi2c->hdmatx != NULL)
- {
- /* Set the DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
- if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
- }
- }
- else if(hi2c->hdmarx != NULL)
- {
- /* Set the DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
- if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
- {
- /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
- }
- }
- }
- else if(hi2c->State == HAL_I2C_STATE_ABORT)
- {
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
- HAL_I2C_AbortCpltCallback(hi2c);
- }
- else
- {
- /* Call user error callback */
- HAL_I2C_ErrorCallback(hi2c);
- }
- /* STOP Flag is not set after a NACK reception */
- /* So may inform upper layer that listen phase is stopped */
- /* during NACK error treatment */
- if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
- HAL_I2C_ListenCpltCallback(hi2c);
- }
-}
-
-/**
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- /* Generate Start condition if first transfer */
- if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- {
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
- {
- /* Generate ReStart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
- }
- else
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
-
- /* Wait until ADD10 flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
- }
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Master sends target device address for read request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shift at right before call interface
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- /* Generate Start condition if first transfer */
- if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
- else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
- {
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate ReStart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
- }
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
- }
- else
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
-
- /* Wait until ADD10 flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Restart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
- }
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Master sends target device address followed by internal memory address for write request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* If Memory address size is 8Bit */
- if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
-
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Master sends target device address followed by internal memory address for read request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Enable Acknowledge */
- hi2c->Instance->CR1 |= I2C_CR1_ACK;
-
- /* Generate Start */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* If Memory address size is 8Bit */
- if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
-
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
-
- /* Wait until TXE flag is set */
- if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Generate Restart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- /* Wait until SB flag is set */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
-
- /* Wait until ADDR flag is set */
- if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief DMA I2C process complete callback.
- * @param hdma DMA handle
- * @retval None
- */
-static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
-{
- I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentState = hi2c->State;
- uint32_t CurrentMode = hi2c->Mode;
-
- if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
- {
- /* Disable DMA Request */
- hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
-
- hi2c->XferCount = 0U;
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
- }
- else
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- /* Disable Last DMA */
- hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
-
- /* Disable DMA Request */
- hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
-
- hi2c->XferCount = 0U;
-
- /* Check if Errors has been detected during transfer */
- if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
- {
- HAL_I2C_ErrorCallback(hi2c);
- }
- else
- {
- hi2c->State = HAL_I2C_STATE_READY;
-
- if(hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_MemRxCpltCallback(hi2c);
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- HAL_I2C_MasterRxCpltCallback(hi2c);
- }
- }
- }
-}
-
-/**
- * @brief DMA I2C communication error callback.
- * @param hdma DMA handle
- * @retval None
- */
-static void I2C_DMAError(DMA_HandleTypeDef *hdma)
-{
- I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- hi2c->XferCount = 0U;
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- HAL_I2C_ErrorCallback(hi2c);
-}
-
-/**
- * @brief DMA I2C communication abort callback
- * (To be called at end of DMA Abort procedure).
- * @param hdma: DMA handle.
- * @retval None
- */
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
-{
- I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- hi2c->XferCount = 0U;
-
- /* Reset XferAbortCallback */
- hi2c->hdmatx->XferAbortCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Check if come from abort from user */
- if(hi2c->State == HAL_I2C_STATE_ABORT)
- {
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
- HAL_I2C_AbortCpltCallback(hi2c);
- }
- else
- {
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
- HAL_I2C_ErrorCallback(hi2c);
- }
-}
-
-/**
- * @brief This function handles I2C Communication Timeout.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param Flag specifies the I2C flag to check.
- * @param Status The new Flag status (SET or RESET).
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Wait until flag is set */
- while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
- {
- /* Check for the Timeout */
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for Master addressing phase.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param Flag specifies the I2C flag to check.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
-{
- while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
- {
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- {
- /* Generate Stop */
- hi2c->Instance->CR1 |= I2C_CR1_STOP;
-
- /* Clear AF Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- hi2c->ErrorCode = HAL_I2C_ERROR_AF;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
- {
- /* Check if a NACK is detected */
- if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
- {
- /* Check if a NACK is detected */
- if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- {
- /* Check if a NACK is detected */
- if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-
- while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
- {
- /* Check if a STOPF is detected */
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
- {
- /* Clear STOP Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_TIMEOUT;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles Acknowledge failed detection during an I2C Communication.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
-{
- if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- {
- /* Clear NACKF Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- hi2c->ErrorCode = HAL_I2C_ERROR_AF;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State= HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- return HAL_OK;
-}
-/**
- * @}
- */
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--
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[mynewt-core] 06/13: stm32l1 i2c support
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 9e0d1ef42a7cbbe5776559c03fb4527e46d108f9
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 09:51:09 2018 -0300
stm32l1 i2c support
---
hw/bsp/stm32l152discovery/src/hal_bsp.c | 2 +-
hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h | 5 +++++
hw/mcu/stm/stm32l1xx/include/mcu/stm32l1xx_mynewt_hal.h | 2 +-
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/bsp/stm32l152discovery/src/hal_bsp.c b/hw/bsp/stm32l152discovery/src/hal_bsp.c
index 0e8d521..42f88e3 100644
--- a/hw/bsp/stm32l152discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32l152discovery/src/hal_bsp.c
@@ -69,7 +69,7 @@ static const struct stm32l1_uart_cfg uart_cfg[UART_CNT] = {
#endif
#if MYNEWT_VAL(I2C_0)
-static struct stm32l1_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
diff --git a/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
index ae557e6..77e1435 100644
--- a/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
@@ -58,6 +58,11 @@ struct stm32_hal_spi_cfg {
int irq_prio;
};
+/* hal_i2c */
+#include "stm32l1xx_hal_i2c.h"
+#include "mcu/stm32l1xx_mynewt_hal.h"
+#include "mcu/stm32l1_bsp.h"
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32l1xx/include/mcu/stm32l1xx_mynewt_hal.h b/hw/mcu/stm/stm32l1xx/include/mcu/stm32l1xx_mynewt_hal.h
index 987b46d..7651c5e 100644
--- a/hw/mcu/stm/stm32l1xx/include/mcu/stm32l1xx_mynewt_hal.h
+++ b/hw/mcu/stm/stm32l1xx/include/mcu/stm32l1xx_mynewt_hal.h
@@ -48,7 +48,7 @@ extern "C" {
int hal_gpio_init_stm(int pin, GPIO_InitTypeDef *cfg);
int hal_gpio_deinit_stm(int pin, GPIO_InitTypeDef *cfg);
-struct stm32l1_hal_i2c_cfg {
+struct stm32_hal_i2c_cfg {
I2C_TypeDef *hic_i2c;
volatile uint32_t *hic_rcc_reg; /* RCC register to modify */
uint32_t hic_rcc_dev; /* RCC device ID */
--
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[mynewt-core] 11/13: Add i2c support for stm32f7
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit da66d08859b45e6a62e27e70a6955c8b5a15cae8
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Fri Mar 23 09:49:54 2018 -0300
Add i2c support for stm32f7
- Added i2c config for nucleo f767
---
hw/bsp/nucleo-f401re/src/hal_bsp.c | 2 +-
hw/bsp/stm32f767-nucleo/src/hal_bsp.c | 28 +++-
hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h | 5 +
.../stm32f7xx/include/mcu/stm32f7xx_mynewt_hal.h | 4 +-
hw/mcu/stm/stm32f7xx/src/hal_i2c.c | 177 ---------------------
hw/mcu/stm/stm32f7xx/syscfg.yml | 3 +
6 files changed, 38 insertions(+), 181 deletions(-)
diff --git a/hw/bsp/nucleo-f401re/src/hal_bsp.c b/hw/bsp/nucleo-f401re/src/hal_bsp.c
index 65eaf42..05fb6ce 100644
--- a/hw/bsp/nucleo-f401re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-f401re/src/hal_bsp.c
@@ -68,7 +68,7 @@ static const struct hal_bsp_mem_dump dump_cfg[] = {
#if MYNEWT_VAL(I2C_0)
/*
- * The PB8 and PB9 pins are connected through jumpers in the board to
+ * NOTE: The PB8 and PB9 pins are connected through jumpers in the board to
* both AIN and I2C pins. To enable I2C functionality SB51/SB56 need to
* be removed (they are the default connections) and SB46/SB52 need to
* be added.
diff --git a/hw/bsp/stm32f767-nucleo/src/hal_bsp.c b/hw/bsp/stm32f767-nucleo/src/hal_bsp.c
index f79ec4d..838aaa0 100644
--- a/hw/bsp/stm32f767-nucleo/src/hal_bsp.c
+++ b/hw/bsp/stm32f767-nucleo/src/hal_bsp.c
@@ -27,6 +27,7 @@
#include <hal/hal_bsp.h>
#include <hal/hal_gpio.h>
+#include "hal/hal_i2c.h"
#include <hal/hal_flash_int.h>
#include <hal/hal_system.h>
#include <hal/hal_timer.h>
@@ -39,6 +40,7 @@
#include <stm32f7xx_hal_gpio_ex.h>
#include "mcu/stm32_hal.h"
#include <mcu/stm32f7_bsp.h>
+#include <mcu/stm32f7xx_mynewt_hal.h>
#if MYNEWT_VAL(ETH_0)
#include <stm32_eth/stm32_eth.h>
@@ -71,7 +73,26 @@ struct stm32_hal_spi_cfg spi0_cfg = {
.miso_pin = MCU_GPIO_PORTA(6), /* D12 on CN7 */
.mosi_pin = MCU_GPIO_PORTA(7), /* D11 on CN7 */
.ss_pin = MCU_GPIO_PORTD(14), /* D10 on CN7 */
- .irq_prio = 2
+ .irq_prio = 2,
+};
+#endif
+
+#if MYNEWT_VAL(I2C_0)
+/*
+ * The PB8 and PB9 pins are connected through jumpers in the board to
+ * both ADC_IN and I2C pins. To enable I2C functionality SB147/SB157 need
+ * to be removed (they are the default connections) and SB138/SB143 need
+ * to be shorted.
+ */
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
+ .hic_i2c = I2C1,
+ .hic_rcc_reg = &RCC->APB1ENR,
+ .hic_rcc_dev = RCC_APB1ENR_I2C1EN,
+ .hic_pin_sda = MCU_GPIO_PORTB(9), /* D14 on CN7 */
+ .hic_pin_scl = MCU_GPIO_PORTB(8), /* D15 on CN7 */
+ .hic_pin_af = GPIO_AF4_I2C1,
+ .hic_10bit = 0,
+ .hic_timingr = 0x30420F13, /* 100KHz at 16MHz of SysCoreClock */
};
#endif
@@ -170,6 +191,11 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
+#if MYNEWT_VAL(I2C_0)
+ rc = hal_i2c_init(0, &i2c_cfg0);
+ assert(rc == 0);
+#endif
+
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM1);
#endif
diff --git a/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
index 1e77343..758c476 100644
--- a/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
@@ -62,6 +62,11 @@ struct stm32_hal_spi_cfg {
int irq_prio;
};
+/* hal_i2c */
+#include "stm32f7xx_hal_i2c.h"
+#include "mcu/stm32f7xx_mynewt_hal.h"
+#include "mcu/stm32f7_bsp.h"
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f7xx/include/mcu/stm32f7xx_mynewt_hal.h b/hw/mcu/stm/stm32f7xx/include/mcu/stm32f7xx_mynewt_hal.h
index 01a3092..0cd7721 100644
--- a/hw/mcu/stm/stm32f7xx/include/mcu/stm32f7xx_mynewt_hal.h
+++ b/hw/mcu/stm/stm32f7xx/include/mcu/stm32f7xx_mynewt_hal.h
@@ -48,7 +48,7 @@ extern "C" {
int hal_gpio_init_stm(int pin, GPIO_InitTypeDef *cfg);
int hal_gpio_deinit_stm(int pin, GPIO_InitTypeDef *cfg);
-struct stm32f7_hal_i2c_cfg {
+struct stm32_hal_i2c_cfg {
I2C_TypeDef *hic_i2c;
volatile uint32_t *hic_rcc_reg; /* RCC register to modify */
uint32_t hic_rcc_dev; /* RCC device ID */
@@ -56,7 +56,7 @@ struct stm32f7_hal_i2c_cfg {
uint8_t hic_pin_scl;
uint8_t hic_pin_af;
uint8_t hic_10bit;
- uint32_t hic_speed;
+ uint32_t hic_timingr; /* TIMINGR register */
};
#ifdef __cplusplus
diff --git a/hw/mcu/stm/stm32f7xx/src/hal_i2c.c b/hw/mcu/stm/stm32f7xx/src/hal_i2c.c
deleted file mode 100644
index 1eef619..0000000
--- a/hw/mcu/stm/stm32f7xx/src/hal_i2c.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <hal/hal_i2c.h>
-#include <hal/hal_gpio.h>
-
-#include "stm32f7xx.h"
-#include "stm32f7xx_hal_dma.h"
-#include "stm32f7xx_hal_i2c.h"
-#include "stm32f7xx_hal_gpio.h"
-#include "stm32f7xx_hal_rcc.h"
-#include "mcu/stm32f7xx_mynewt_hal.h"
-#include "mcu/stm32f7_bsp.h"
-
-#define HAL_I2C_MAX_DEVS 3
-
-#define I2C_ADDRESS 0xae
-
-struct stm32f7_hal_i2c {
- I2C_HandleTypeDef hid_handle;
-};
-
-#if MYNEWT_VAL(I2C_0)
-static struct stm32f7_hal_i2c i2c0;
-#endif
-#if MYNEWT_VAL(I2C_1)
-static struct stm32f7_hal_i2c i2c1;
-#endif
-#if MYNEWT_VAL(I2C_2)
-static struct stm32f7_hal_i2c i2c2;
-#endif
-
-static struct stm32f7_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
-#if MYNEWT_VAL(I2C_0)
- &i2c0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_1)
- &i2c1,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_2)
- &i2c2,
-#else
- NULL,
-#endif
-};
-
-int
-hal_i2c_init(uint8_t i2c_num, void *usercfg)
-{
- struct stm32f7_hal_i2c_cfg *cfg = (struct stm32f7_hal_i2c_cfg *)usercfg;
- struct stm32f7_hal_i2c *dev;
- I2C_InitTypeDef *init;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- init = &dev->hid_handle.Init;
- dev->hid_handle.Instance = cfg->hic_i2c;
- //init->ClockSpeed = cfg->hic_speed;
- init->Timing = cfg->hic_speed;
- if (cfg->hic_10bit) {
- init->AddressingMode = I2C_ADDRESSINGMODE_10BIT;
- } else {
- init->AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- }
- init->OwnAddress1 = I2C_ADDRESS;
- init->OwnAddress2 = 0xFE;
-
- /*
- * Configure GPIO pins for I2C.
- * Enable clock routing for I2C.
- */
- rc = hal_gpio_init_af(cfg->hic_pin_sda, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- rc = hal_gpio_init_af(cfg->hic_pin_scl, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- *cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
- rc = HAL_I2C_Init(&dev->hid_handle);
- if (rc) {
- goto err;
- }
-
- return 0;
-err:
- *cfg->hic_rcc_reg &= ~cfg->hic_rcc_dev;
- return rc;
-}
-
-int
-hal_i2c_master_write(uint8_t i2c_num, struct hal_i2c_master_data *data,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32f7_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- //FIXME: NoStop
- //return HAL_I2C_Master_Transmit_NoStop(&dev->hid_handle,
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- } else {
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- }
-}
-
-int
-hal_i2c_master_read(uint8_t i2c_num, struct hal_i2c_master_data *pdata,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32f7_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- //FIXME: NoStop
- //return HAL_I2C_Master_Receive_NoStop(&dev->hid_handle,
- return HAL_I2C_Master_Receive(&dev->hid_handle,
- pdata->address << 1, pdata->buffer, pdata->len, timo);
- } else {
- return HAL_I2C_Master_Receive(&dev->hid_handle, pdata->address << 1,
- pdata->buffer, pdata->len, timo);
- }
-}
-
-int
-hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
-{
- struct stm32f7_hal_i2c *dev;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address, 1, timo);
- return rc;
-}
diff --git a/hw/mcu/stm/stm32f7xx/syscfg.yml b/hw/mcu/stm/stm32f7xx/syscfg.yml
index 08606f5..0a39551 100644
--- a/hw/mcu/stm/stm32f7xx/syscfg.yml
+++ b/hw/mcu/stm/stm32f7xx/syscfg.yml
@@ -41,3 +41,6 @@ syscfg.defs:
value: 0
restrictions:
- "!SPI_0_MASTER"
+ I2C_0:
+ description: 'I2C (TWI) interface 0'
+ value: 0
--
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[mynewt-core] 12/13: Fix stm32f3/f7 restart issues, add timingr
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit a97f28399322528dcab1eec691cefa6a6989f07c
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Fri Mar 23 09:52:45 2018 -0300
Fix stm32f3/f7 restart issues, add timingr
---
hw/bsp/stm32f3discovery/src/hal_bsp.c | 2 +-
hw/mcu/stm/stm32_common/src/hal_i2c.c | 5 ++-
.../stm/stm32_common/src/stm32_driver_mod_i2c_v2.c | 51 ++++++++++++++--------
.../stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h | 2 +-
4 files changed, 40 insertions(+), 20 deletions(-)
diff --git a/hw/bsp/stm32f3discovery/src/hal_bsp.c b/hw/bsp/stm32f3discovery/src/hal_bsp.c
index 0d77cff..cd6f5b7 100644
--- a/hw/bsp/stm32f3discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f3discovery/src/hal_bsp.c
@@ -104,7 +104,7 @@ static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_pin_scl = MCU_GPIO_PORTB(8),
.hic_pin_af = GPIO_AF4_I2C1,
.hic_10bit = 0,
- .hic_speed = 100000,
+ .hic_timingr = 0x10420F13, /* 100KHz at 8MHz of SysCoreClock */
};
#endif
diff --git a/hw/mcu/stm/stm32_common/src/hal_i2c.c b/hw/mcu/stm/stm32_common/src/hal_i2c.c
index 7716f2f..a9c4cf4 100644
--- a/hw/mcu/stm/stm32_common/src/hal_i2c.c
+++ b/hw/mcu/stm/stm32_common/src/hal_i2c.c
@@ -71,7 +71,6 @@ static struct stm32_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
#endif
};
-
int
hal_i2c_init(uint8_t i2c_num, void *usercfg)
{
@@ -86,7 +85,11 @@ hal_i2c_init(uint8_t i2c_num, void *usercfg)
init = &dev->hid_handle.Init;
dev->hid_handle.Instance = cfg->hic_i2c;
+#if defined(STM32F3) || defined(STM32F7)
+ init->Timing = cfg->hic_timingr;
+#else
init->ClockSpeed = cfg->hic_speed;
+#endif
if (cfg->hic_10bit) {
init->AddressingMode = I2C_ADDRESSINGMODE_10BIT;
} else {
diff --git a/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c
index b24ee86..1ad2a10 100644
--- a/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c
+++ b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c
@@ -37,6 +37,7 @@
#define MAX_NBYTE_SIZE 255U
static const uint8_t HAL_I2C_MODE_MASTER_SEL = 0x11;
+static const uint8_t HAL_NACK = HAL_TIMEOUT + 1;
/**
* @brief This function handles I2C Communication Timeout.
@@ -280,6 +281,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
uint8_t LastOp)
{
uint32_t tickstart = 0U;
+ uint8_t prev_mode = 0;
if (hi2c->State == HAL_I2C_STATE_READY)
{
@@ -289,18 +291,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
- if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL)
+ prev_mode = hi2c->Mode;
+ if (prev_mode != HAL_I2C_MODE_MASTER_SEL)
{
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
{
return HAL_TIMEOUT;
}
}
- else
- {
- /* FIXME: with not stop must wait here! why? timing config? */
- os_time_delay(1);
- }
hi2c->State = HAL_I2C_STATE_BUSY_TX;
hi2c->Mode = HAL_I2C_MODE_MASTER;
@@ -329,6 +327,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
}
+ /*
+ * Wait RESTART to be accepted
+ */
+ if (prev_mode == HAL_I2C_MODE_MASTER_SEL)
+ {
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
while (hi2c->XferCount > 0U)
{
/* Wait until TXIS flag is set */
@@ -435,18 +444,22 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
* @param Tickstart Tick start value
* @retval HAL status
*/
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart, uint8_t prev_mode)
{
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
{
/* Check if a NACK is detected */
if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
{
- return HAL_ERROR;
+ return HAL_NACK;
}
+ /*
+ * FIXME: need to re-check if what is supposed to be a RESTART is not also
+ * triggering a STOP along...
+ */
/* Check if a STOPF is detected */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
+ if (prev_mode != HAL_I2C_MODE_MASTER_SEL && __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
{
/* Clear STOP Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
@@ -496,27 +509,25 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
uint8_t LastOp)
{
uint32_t tickstart = 0U;
+ uint8_t prev_mode = 0;
+ HAL_StatusTypeDef rc;
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hi2c);
- /* Init tickstart for timeout management*/
+ /* Init tickstart for timeout management */
tickstart = HAL_GetTick();
- if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL)
+ prev_mode = hi2c->Mode;
+ if (prev_mode != HAL_I2C_MODE_MASTER_SEL)
{
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
{
return HAL_TIMEOUT;
}
}
- else
- {
- /* FIXME: with not stop must wait here! why? timing config? */
- os_time_delay(1);
- }
hi2c->State = HAL_I2C_STATE_BUSY_RX;
hi2c->Mode = HAL_I2C_MODE_MASTER;
@@ -548,7 +559,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
while (hi2c->XferCount > 0U)
{
/* Wait until RXNE flag is set */
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ rc = I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart, prev_mode);
+ if (rc != HAL_OK && rc != HAL_NACK)
{
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
{
@@ -565,6 +577,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
hi2c->XferSize--;
hi2c->XferCount--;
+ if (rc == HAL_NACK)
+ {
+ break;
+ }
+
if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
{
/* Wait until TCR flag is set */
diff --git a/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h b/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h
index b4465c0..104b3c3 100644
--- a/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h
+++ b/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h
@@ -55,7 +55,7 @@ struct stm32_hal_i2c_cfg {
uint8_t hic_pin_scl;
uint8_t hic_pin_af;
uint8_t hic_10bit;
- uint32_t hic_speed;
+ uint32_t hic_timingr; /* TIMINGR register */
};
#ifdef __cplusplus
--
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[mynewt-core] 09/13: Add stm32f3discovery i2c config
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 0f84660414f8497da48a96d0bc277a48c9087ccf
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 14:54:08 2018 -0300
Add stm32f3discovery i2c config
---
hw/bsp/stm32f3discovery/src/hal_bsp.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/hw/bsp/stm32f3discovery/src/hal_bsp.c b/hw/bsp/stm32f3discovery/src/hal_bsp.c
index 95a3e87..0d77cff 100644
--- a/hw/bsp/stm32f3discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f3discovery/src/hal_bsp.c
@@ -32,6 +32,7 @@
#include <hal/hal_bsp.h>
#include <hal/hal_flash_int.h>
#include <hal/hal_gpio.h>
+#include <hal/hal_i2c.h>
#include <hal/hal_system.h>
#if MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_0_SLAVE) || \
@@ -46,6 +47,8 @@
#include "mcu/stm32_hal.h"
#include "bsp/bsp.h"
+#include "mcu/mcu.h"
+#include "os/os_cputime.h"
#if MYNEWT_VAL(UART_0)
static struct uart_dev hal_uart[1];
@@ -92,6 +95,19 @@ struct stm32_hal_spi_cfg spi1_cfg = {
};
#endif
+#if MYNEWT_VAL(I2C_0)
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
+ .hic_i2c = I2C1,
+ .hic_rcc_reg = &RCC->APB1ENR,
+ .hic_rcc_dev = RCC_APB1ENR_I2C1EN,
+ .hic_pin_sda = MCU_GPIO_PORTB(9),
+ .hic_pin_scl = MCU_GPIO_PORTB(8),
+ .hic_pin_af = GPIO_AF4_I2C1,
+ .hic_10bit = 0,
+ .hic_speed = 100000,
+};
+#endif
+
static const struct hal_bsp_mem_dump dump_cfg[] = {
[0] = {
.hbmd_start = &_sram_start,
@@ -153,6 +169,11 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
+#if MYNEWT_VAL(I2C_0)
+ rc = hal_i2c_init(0, &i2c_cfg0);
+ assert(rc == 0);
+#endif
+
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, TIM15);
assert(rc == 0);
--
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[mynewt-core] 04/13: Add missing i2c addr shift left in probe
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit a3852bd18ff2761f0781f005ccd25df2c9c06ae3
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 08:52:55 2018 -0300
Add missing i2c addr shift left in probe
---
hw/mcu/stm/stm32_common/src/hal_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mcu/stm/stm32_common/src/hal_i2c.c b/hw/mcu/stm/stm32_common/src/hal_i2c.c
index 0f829e6..7716f2f 100644
--- a/hw/mcu/stm/stm32_common/src/hal_i2c.c
+++ b/hw/mcu/stm/stm32_common/src/hal_i2c.c
@@ -159,6 +159,6 @@ hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
return -1;
}
- rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address, 1, timo);
+ rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address << 1, 1, timo);
return rc;
}
--
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[mynewt-core] 05/13: Undo previously applied i2c patch to stm32cube
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 847cbcb27205f5ce97704095dfacac3fc597d60c
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 09:23:03 2018 -0300
Undo previously applied i2c patch to stm32cube
---
.../STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h | 6 +-
.../STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c | 85 +++-------
hw/mcu/stm/stm32l1xx/src/hal_i2c.c | 172 ---------------------
3 files changed, 21 insertions(+), 242 deletions(-)
diff --git a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
index 2e67480..3e97f68 100644
--- a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
+++ b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_i2c.h
@@ -165,8 +165,7 @@ typedef enum
HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
- HAL_I2C_MODE_MEM = 0x40U, /*!< I2C communication is in Memory Mode */
- HAL_I2C_MODE_MASTER_SEL = 0x11U /*!< I2C communication is in Master Mode, no stop sent */
+ HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
}HAL_I2C_ModeTypeDef;
@@ -514,9 +513,6 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Master_Receive_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-
/******* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
diff --git a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c
index 3509ce9..02ab64b 100644
--- a/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c
+++ b/hw/mcu/stm/stm32l1xx/src/ext/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_i2c.c
@@ -592,7 +592,7 @@ HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
* @param Timeout Timeout duration
* @retval HAL status
*/
-static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, uint8_t sendStop)
+HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint32_t tickstart = 0x00U;
@@ -601,12 +601,10 @@ static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c,
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL) {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
+ /* Wait until BUSY flag is reset */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
+ {
+ return HAL_BUSY;
}
/* Process Locked */
@@ -699,15 +697,11 @@ static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c,
}
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- hi2c->Mode = HAL_I2C_MODE_NONE;
- } else {
- hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
hi2c->State = HAL_I2C_STATE_READY;
-
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
@@ -719,18 +713,6 @@ static HAL_StatusTypeDef HAL_I2C_Master_Transmit_Common(I2C_HandleTypeDef *hi2c,
}
}
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Transmit_Common(hi2c, DevAddress, pData, Size,
- Timeout, 1);
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Transmit_Common(hi2c, DevAddress, pData, Size,
- Timeout, 0);
-}
-
/**
* @brief Receives in master mode an amount of data in blocking mode.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@@ -742,7 +724,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_NoStop(I2C_HandleTypeDef *hi2c, uint16
* @param Timeout Timeout duration
* @retval HAL status
*/
-static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, uint8_t sendStop)
+HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint32_t tickstart = 0x00U;
@@ -751,12 +733,10 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
if(hi2c->State == HAL_I2C_STATE_READY)
{
- if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL) {
- /* Wait until BUSY flag is reset */
- if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
+ /* Wait until BUSY flag is reset */
+ if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
+ {
+ return HAL_BUSY;
}
/* Process Locked */
@@ -805,10 +785,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
/* Generate Stop */
- if (sendStop) {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
}
else if(hi2c->XferSize == 1U)
{
@@ -819,9 +796,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
}
else if(hi2c->XferSize == 2U)
{
@@ -829,9 +804,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Enable Pos */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
@@ -880,9 +853,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
@@ -918,9 +889,7 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
/* Generate Stop */
- if (sendStop) {
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
+ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
@@ -964,12 +933,8 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
hi2c->State = HAL_I2C_STATE_READY;
- if (!sendStop) {
- hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
- } else {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- }
-
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
@@ -981,16 +946,6 @@ static HAL_StatusTypeDef HAL_I2C_Master_Receive_Common(I2C_HandleTypeDef *hi2c,
}
}
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Receive_Common(hi2c, DevAddress, pData, Size, Timeout, 1);
-}
-
-HAL_StatusTypeDef HAL_I2C_Master_Receive_NoStop(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- return HAL_I2C_Master_Receive_Common(hi2c, DevAddress, pData, Size, Timeout, 0);
-}
-
/**
* @brief Transmits in slave mode an amount of data in blocking mode.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
diff --git a/hw/mcu/stm/stm32l1xx/src/hal_i2c.c b/hw/mcu/stm/stm32l1xx/src/hal_i2c.c
deleted file mode 100644
index 939c3b3..0000000
--- a/hw/mcu/stm/stm32l1xx/src/hal_i2c.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <hal/hal_i2c.h>
-#include <hal/hal_gpio.h>
-
-#include "stm32l1xx.h"
-#include "stm32l1xx_hal_dma.h"
-#include "stm32l1xx_hal_i2c.h"
-#include "stm32l1xx_hal_gpio.h"
-#include "stm32l1xx_hal_rcc.h"
-#include "mcu/stm32l1xx_mynewt_hal.h"
-#include "mcu/stm32l1_bsp.h"
-
-#define HAL_I2C_MAX_DEVS 3
-
-#define I2C_ADDRESS 0xae
-
-struct stm32l1_hal_i2c {
- I2C_HandleTypeDef hid_handle;
-};
-
-#if MYNEWT_VAL(I2C_0)
-static struct stm32l1_hal_i2c i2c0;
-#endif
-#if MYNEWT_VAL(I2C_1)
-static struct stm32l1_hal_i2c i2c1;
-#endif
-#if MYNEWT_VAL(I2C_2)
-static struct stm32l1_hal_i2c i2c2;
-#endif
-
-static struct stm32l1_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
-#if MYNEWT_VAL(I2C_0)
- &i2c0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_1)
- &i2c1,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_2)
- &i2c2,
-#else
- NULL,
-#endif
-};
-
-int
-hal_i2c_init(uint8_t i2c_num, void *usercfg)
-{
- struct stm32l1_hal_i2c_cfg *cfg = (struct stm32l1_hal_i2c_cfg *)usercfg;
- struct stm32l1_hal_i2c *dev;
- I2C_InitTypeDef *init;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- init = &dev->hid_handle.Init;
- dev->hid_handle.Instance = cfg->hic_i2c;
- init->ClockSpeed = cfg->hic_speed;
- if (cfg->hic_10bit) {
- init->AddressingMode = I2C_ADDRESSINGMODE_10BIT;
- } else {
- init->AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- }
- init->OwnAddress1 = I2C_ADDRESS;
- init->OwnAddress2 = 0xFE;
-
- /*
- * Configure GPIO pins for I2C.
- * Enable clock routing for I2C.
- */
- rc = hal_gpio_init_af(cfg->hic_pin_sda, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- rc = hal_gpio_init_af(cfg->hic_pin_scl, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- *cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
- rc = HAL_I2C_Init(&dev->hid_handle);
- if (rc) {
- goto err;
- }
-
- return 0;
-err:
- *cfg->hic_rcc_reg &= ~cfg->hic_rcc_dev;
- return rc;
-}
-
-int
-hal_i2c_master_write(uint8_t i2c_num, struct hal_i2c_master_data *data,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32l1_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- return HAL_I2C_Master_Transmit_NoStop(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- } else {
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- }
-}
-
-int
-hal_i2c_master_read(uint8_t i2c_num, struct hal_i2c_master_data *pdata,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32l1_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- return HAL_I2C_Master_Receive_NoStop(&dev->hid_handle,
- pdata->address << 1, pdata->buffer, pdata->len, timo);
- } else {
- return HAL_I2C_Master_Receive(&dev->hid_handle, pdata->address << 1,
- pdata->buffer, pdata->len, timo);
- }
-}
-
-int
-hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
-{
- struct stm32l1_hal_i2c *dev;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address, 1, timo);
- return rc;
-}
--
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[mynewt-core] 13/13: Initial stm32f1 i2c support + olimex-p103
config
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 9f4fc4aaf90791b060a64bafa3184e8623b8f387
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Fri Mar 23 11:22:45 2018 -0300
Initial stm32f1 i2c support + olimex-p103 config
---
hw/bsp/nucleo-f401re/src/hal_bsp.c | 2 +-
hw/bsp/olimex-p103/src/hal_bsp.c | 11 +-
hw/mcu/stm/stm32_common/src/hal_i2c.c | 77 +++++++++
hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h | 5 +
.../stm32f1xx/include/mcu/stm32f1xx_mynewt_hal.h | 4 +-
hw/mcu/stm/stm32f1xx/src/hal_i2c.c | 190 ---------------------
hw/mcu/stm/stm32f1xx/syscfg.yml | 8 +-
7 files changed, 94 insertions(+), 203 deletions(-)
diff --git a/hw/bsp/nucleo-f401re/src/hal_bsp.c b/hw/bsp/nucleo-f401re/src/hal_bsp.c
index 05fb6ce..3c43d19 100644
--- a/hw/bsp/nucleo-f401re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-f401re/src/hal_bsp.c
@@ -86,7 +86,7 @@ static struct stm32_hal_i2c_cfg i2c_cfg0 = {
#endif
#if MYNEWT_VAL(SPI_0_SLAVE) || MYNEWT_VAL(SPI_0_MASTER)
-struct stm32f4_hal_spi_cfg spi0_cfg = {
+struct stm32_hal_spi_cfg spi0_cfg = {
.ss_pin = MCU_GPIO_PORTA(4), /* PA4 */
.sck_pin = MCU_GPIO_PORTA(5), /* PA5 */
.miso_pin = MCU_GPIO_PORTA(6), /* PA6 */
diff --git a/hw/bsp/olimex-p103/src/hal_bsp.c b/hw/bsp/olimex-p103/src/hal_bsp.c
index f06eb71..1c64825 100644
--- a/hw/bsp/olimex-p103/src/hal_bsp.c
+++ b/hw/bsp/olimex-p103/src/hal_bsp.c
@@ -90,16 +90,15 @@ struct stm32_hal_spi_cfg spi1_cfg = {
#endif
#if MYNEWT_VAL(I2C_0)
-/* TODO */
-static struct stm32f1_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
- .hic_pin_sda = MCU_GPIO_PORTB(9), /* PB9 */
- .hic_pin_scl = MCU_GPIO_PORTB(8), /* PB8 */
- .hic_pin_af = GPIO_AF4_I2C1,
+ .hic_pin_sda = MCU_GPIO_PORTB(7),
+ .hic_pin_scl = MCU_GPIO_PORTB(6),
+ .hic_pin_remap_fn = LL_GPIO_AF_DisableRemap_I2C1,
.hic_10bit = 0,
- .hic_speed = 100000 /* 100kHz */
+ .hic_speed = 100000,
};
#endif
diff --git a/hw/mcu/stm/stm32_common/src/hal_i2c.c b/hw/mcu/stm/stm32_common/src/hal_i2c.c
index a9c4cf4..83d4fe5 100644
--- a/hw/mcu/stm/stm32_common/src/hal_i2c.c
+++ b/hw/mcu/stm/stm32_common/src/hal_i2c.c
@@ -71,12 +71,26 @@ static struct stm32_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
#endif
};
+#if defined(STM32F1)
+static void
+i2c_reset(I2C_HandleTypeDef *hi2c)
+{
+ __HAL_I2C_DISABLE(hi2c);
+ hi2c->Instance->CR1 |= I2C_CR1_SWRST;
+ hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
+ __HAL_I2C_ENABLE(hi2c);
+}
+#endif
+
int
hal_i2c_init(uint8_t i2c_num, void *usercfg)
{
struct stm32_hal_i2c_cfg *cfg = (struct stm32_hal_i2c_cfg *)usercfg;
struct stm32_hal_i2c *dev;
I2C_InitTypeDef *init;
+#if defined(STM32F1)
+ GPIO_InitTypeDef gpio;
+#endif
int rc;
if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
@@ -102,6 +116,7 @@ hal_i2c_init(uint8_t i2c_num, void *usercfg)
* Configure GPIO pins for I2C.
* Enable clock routing for I2C.
*/
+#if !defined(STM32F1)
rc = hal_gpio_init_af(cfg->hic_pin_sda, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
1);
if (rc) {
@@ -112,7 +127,62 @@ hal_i2c_init(uint8_t i2c_num, void *usercfg)
if (rc) {
goto err;
}
+
+ *cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
+#else
+ /* For STM32F1x initialize I2C clock before GPIOs */
*cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
+
+ if (cfg->hic_pin_remap_fn != NULL) {
+ cfg->hic_pin_remap_fn();
+ }
+
+ /*
+ * The block below applies a workaround described in 2.13.7
+ * of the STM32F103 errata (also described on F105/107 errata).
+ */
+ gpio.Mode = GPIO_MODE_OUTPUT_OD;
+ gpio.Speed = GPIO_SPEED_FREQ_LOW;
+ gpio.Pull = GPIO_NOPULL;
+
+ hal_gpio_init_stm(cfg->hic_pin_sda, &gpio);
+ hal_gpio_write(cfg->hic_pin_sda, 1);
+ hal_gpio_init_stm(cfg->hic_pin_scl, &gpio);
+ hal_gpio_write(cfg->hic_pin_scl, 1);
+
+ assert(hal_gpio_read(cfg->hic_pin_sda) == 1);
+ assert(hal_gpio_read(cfg->hic_pin_scl) == 1);
+
+ hal_gpio_write(cfg->hic_pin_sda, 0);
+ assert(hal_gpio_read(cfg->hic_pin_sda) == 0);
+
+ hal_gpio_write(cfg->hic_pin_scl, 0);
+ assert(hal_gpio_read(cfg->hic_pin_scl) == 0);
+
+ hal_gpio_write(cfg->hic_pin_scl, 1);
+ assert(hal_gpio_read(cfg->hic_pin_scl) == 1);
+
+ hal_gpio_write(cfg->hic_pin_sda, 1);
+ assert(hal_gpio_read(cfg->hic_pin_sda) == 1);
+
+ /*
+ * Normal I2C PIN initialization
+ */
+ gpio.Mode = GPIO_MODE_AF_OD;
+ gpio.Speed = GPIO_SPEED_FREQ_HIGH;
+ /* NOTE: Pull is not used in AF mode */
+ gpio.Pull = GPIO_NOPULL;
+
+ hal_gpio_init_stm(cfg->hic_pin_scl, &gpio);
+ hal_gpio_init_stm(cfg->hic_pin_sda, &gpio);
+
+ /*
+ * Reset I2C
+ */
+ dev->hid_handle.Instance->CR1 = I2C_CR1_SWRST;
+ dev->hid_handle.Instance->CR1 = 0;
+#endif
+
rc = HAL_I2C_Init(&dev->hid_handle);
if (rc) {
goto err;
@@ -163,5 +233,12 @@ hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
}
rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address << 1, 1, timo);
+
+#if defined(STM32F1)
+ if (rc == HAL_BUSY) {
+ i2c_reset(&dev->hid_handle);
+ }
+#endif
+
return rc;
}
diff --git a/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h
index 238888e..9694e72 100644
--- a/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f1xx/include/mcu/stm32_hal.h
@@ -54,6 +54,11 @@ struct stm32_hal_spi_cfg {
int irq_prio;
};
+/* hal_i2c */
+#include "stm32f1xx_hal_i2c.h"
+#include "mcu/stm32f1xx_mynewt_hal.h"
+#include "mcu/stm32f1_bsp.h"
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f1xx/include/mcu/stm32f1xx_mynewt_hal.h b/hw/mcu/stm/stm32f1xx/include/mcu/stm32f1xx_mynewt_hal.h
index e0eb123..437a3fd 100644
--- a/hw/mcu/stm/stm32f1xx/include/mcu/stm32f1xx_mynewt_hal.h
+++ b/hw/mcu/stm/stm32f1xx/include/mcu/stm32f1xx_mynewt_hal.h
@@ -48,13 +48,13 @@ extern "C" {
int hal_gpio_init_stm(int pin, GPIO_InitTypeDef *cfg);
int hal_gpio_deinit_stm(int pin, GPIO_InitTypeDef *cfg);
-struct stm32f1_hal_i2c_cfg {
+struct stm32_hal_i2c_cfg {
I2C_TypeDef *hic_i2c;
volatile uint32_t *hic_rcc_reg; /* RCC register to modify */
uint32_t hic_rcc_dev; /* RCC device ID */
uint8_t hic_pin_sda;
uint8_t hic_pin_scl;
- uint8_t hic_pin_af;
+ void (*hic_pin_remap_fn)(void);
uint8_t hic_10bit;
uint32_t hic_speed;
};
diff --git a/hw/mcu/stm/stm32f1xx/src/hal_i2c.c b/hw/mcu/stm/stm32f1xx/src/hal_i2c.c
deleted file mode 100644
index 0d8d8f8..0000000
--- a/hw/mcu/stm/stm32f1xx/src/hal_i2c.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-#include <string.h>
-#include <stdlib.h>
-#include <assert.h>
-
-#include "os/mynewt.h"
-
-#include <hal/hal_i2c.h>
-#include <hal/hal_gpio.h>
-
-#include "stm32f1xx.h"
-#include "stm32f1xx_hal_dma.h"
-#include "stm32f1xx_hal_i2c.h"
-#include "stm32f1xx_hal_gpio.h"
-#include "stm32f1xx_hal_rcc.h"
-#include "mcu/stm32f1xx_mynewt_hal.h"
-#include "mcu/stm32f1_bsp.h"
-
-#define HAL_I2C_MAX_DEVS 3
-
-#define I2C_ADDRESS 0xae
-
-struct stm32f1_hal_i2c {
- I2C_HandleTypeDef hid_handle;
-};
-
-#if MYNEWT_VAL(I2C_0)
-static struct stm32f1_hal_i2c i2c0;
-#endif
-#if MYNEWT_VAL(I2C_1)
-static struct stm32f1_hal_i2c i2c1;
-#endif
-#if MYNEWT_VAL(I2C_2)
-static struct stm32f1_hal_i2c i2c2;
-#endif
-
-static struct stm32f1_hal_i2c *hal_i2c_devs[HAL_I2C_MAX_DEVS] = {
-#if MYNEWT_VAL(I2C_0)
- &i2c0,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_1)
- &i2c1,
-#else
- NULL,
-#endif
-#if MYNEWT_VAL(I2C_2)
- &i2c2,
-#else
- NULL,
-#endif
-};
-
-int
-hal_i2c_init(uint8_t i2c_num, void *usercfg)
-{
- struct stm32f1_hal_i2c_cfg *cfg = (struct stm32f1_hal_i2c_cfg *)usercfg;
- struct stm32f1_hal_i2c *dev;
- I2C_InitTypeDef *init;
- GPIO_InitTypeDef gpio;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- init = &dev->hid_handle.Init;
- dev->hid_handle.Instance = cfg->hic_i2c;
- init->ClockSpeed = cfg->hic_speed;
- if (cfg->hic_10bit) {
- init->AddressingMode = I2C_ADDRESSINGMODE_10BIT;
- } else {
- init->AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- }
- init->OwnAddress1 = I2C_ADDRESS;
- init->OwnAddress2 = 0xFE;
-
- init->DutyCycle = I2C_DUTYCYCLE_2;
- init->DualAddressMode = I2C_DUALADDRESS_DISABLE;
- init->GeneralCallMode = I2C_GENERALCALL_DISABLE;
- init->NoStretchMode = I2C_NOSTRETCH_DISABLE;
-
- /*
- * Configure GPIO pins for I2C.
- * Enable clock routing for I2C.
- */
- gpio.Speed = GPIO_SPEED_FREQ_HIGH;
- gpio.Pull = GPIO_NOPULL;
- gpio.Mode = GPIO_MODE_AF_OD;
- hal_gpio_init_stm(cfg->hic_pin_scl, &gpio);
- hal_gpio_init_stm(cfg->hic_pin_sda, &gpio);
-
-#if 0
- hal_gpio_write(cfg->hic_pin_scl, 0);
- //for (int i = 0; i < 1000; i++) asm("nop");
- hal_gpio_write(cfg->hic_pin_scl, 1);
-
- hal_gpio_write(cfg->hic_pin_sda, 0);
- //for (int i = 0; i < 1000; i++) asm("nop");
- hal_gpio_write(cfg->hic_pin_sda, 1);
-#endif
-
- if (cfg->hic_pin_remap_fn) {
- cfg->hic_pin_remap_fn();
- }
-
- *cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
- rc = HAL_I2C_Init(&dev->hid_handle);
- if (rc) {
- goto err;
- }
-
- return 0;
-err:
- *cfg->hic_rcc_reg &= ~cfg->hic_rcc_dev;
- return rc;
-}
-
-int
-hal_i2c_master_write(uint8_t i2c_num, struct hal_i2c_master_data *data,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32f1_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- //return HAL_I2C_Master_Transmit_NoStop(&dev->hid_handle,
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- } else {
- return HAL_I2C_Master_Transmit(&dev->hid_handle,
- data->address << 1, data->buffer, data->len, timo);
- }
-}
-
-int
-hal_i2c_master_read(uint8_t i2c_num, struct hal_i2c_master_data *pdata,
- uint32_t timo, uint8_t last_op)
-{
- struct stm32f1_hal_i2c *dev;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- if (!last_op) {
- //return HAL_I2C_Master_Receive_NoStop(&dev->hid_handle,
- return HAL_I2C_Master_Receive(&dev->hid_handle,
- pdata->address << 1, pdata->buffer, pdata->len, timo);
- } else {
- return HAL_I2C_Master_Receive(&dev->hid_handle, pdata->address << 1,
- pdata->buffer, pdata->len, timo);
- }
-}
-
-int
-hal_i2c_master_probe(uint8_t i2c_num, uint8_t address, uint32_t timo)
-{
- struct stm32f1_hal_i2c *dev;
- int rc;
-
- if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
- return -1;
- }
-
- rc = HAL_I2C_IsDeviceReady(&dev->hid_handle, address, 1, timo);
- return rc;
-}
diff --git a/hw/mcu/stm/stm32f1xx/syscfg.yml b/hw/mcu/stm/stm32f1xx/syscfg.yml
index 2b35fd2..e59fc47 100644
--- a/hw/mcu/stm/stm32f1xx/syscfg.yml
+++ b/hw/mcu/stm/stm32f1xx/syscfg.yml
@@ -19,10 +19,6 @@
# Package: hw/bsp/stm32l152discovery
syscfg.defs:
- I2C_0:
- description: 'I2C (TWI) interface 0'
- value: 0
-
MCU_FLASH_MIN_WRITE_SIZE:
description: >
Specifies the required alignment for internal flash writes.
@@ -33,6 +29,10 @@ syscfg.defs:
description: MCUs are of STM32F1xx family
value: 1
+ I2C_0:
+ description: 'I2C (TWI) interface 0'
+ value: 0
+
SPI_0_MASTER:
description: 'SPI 0 master'
value: 0
--
To stop receiving notification emails like this one, please contact
utzig@apache.org.
[mynewt-core] 10/13: Add i2c driver for F3/F7
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 20e796df31323b54b9f125690286114a773d0b8b
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 14:55:17 2018 -0300
Add i2c driver for F3/F7
This breaks the stm32cube based driver into two different drivers, one
which is compiled in if the BSP is based on F1/L1/F4 and another for
F3/F7.
FIXME: the driver for F3 is using a delay when no stop was sent by
previous message, might be due to not enough time between messages, need
to check timing register...
---
..._driver_mod_i2c.c => stm32_driver_mod_i2c_v1.c} | 10 +-
.../stm/stm32_common/src/stm32_driver_mod_i2c_v2.c | 647 +++++++++++++++++++++
hw/mcu/stm/stm32f1xx/src/hal_i2c.c | 34 +-
3 files changed, 678 insertions(+), 13 deletions(-)
diff --git a/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v1.c
similarity index 95%
rename from hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c
rename to hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v1.c
index 367e09f..c6e02a8 100644
--- a/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c.c
+++ b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v1.c
@@ -29,6 +29,8 @@
#include <mcu/stm32_hal.h>
#include <syscfg/syscfg.h>
+#if !defined(STM32F3) && !defined(STM32F7)
+
#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
@@ -125,8 +127,6 @@ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeD
return HAL_OK;
}
-
-
/**
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
@@ -345,8 +345,6 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
return HAL_OK;
}
-
-
/**
* @brief Transmits in master mode an amount of data in blocking mode.
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@@ -356,6 +354,7 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
* @param pData Pointer to data buffer
* @param Size Amount of data to be sent
* @param Timeout Timeout duration
+ * @param LastOp If set sends STOP, otherwise no STOP
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
@@ -606,6 +605,7 @@ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t
* @param pData Pointer to data buffer
* @param Size Amount of data to be sent
* @param Timeout Timeout duration
+ * @param LastOp If set sends STOP, otherwise no STOP
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
@@ -852,4 +852,6 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
}
}
+#endif /* !defined(STM32F3) && !defined(STM32F7) */
+
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c
new file mode 100644
index 0000000..b24ee86
--- /dev/null
+++ b/hw/mcu/stm/stm32_common/src/stm32_driver_mod_i2c_v2.c
@@ -0,0 +1,647 @@
+/**
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+#include <os/os_time.h>
+#include <mcu/stm32_hal.h>
+#include <syscfg/syscfg.h>
+
+#if defined(STM32F3) || defined(STM32F7)
+
+#define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */
+
+#define MAX_NBYTE_SIZE 255U
+
+static const uint8_t HAL_I2C_MODE_MASTER_SEL = 0x11;
+
+/**
+ * @brief This function handles I2C Communication Timeout.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for I2C module
+ * @param Flag specifies the I2C flag to check.
+ * @param Status The new Flag status (SET or RESET).
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+/*
+ * FIXME: this function is similar enough that it could be shared between
+ * both i2c drivers.
+ */
+static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
+ uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
+{
+ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
+ {
+ /* Check for the Timeout */
+ if (Timeout != HAL_MAX_DELAY)
+ {
+ if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
+ {
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
+ * @param hi2c I2C handle.
+ * @param DevAddress Specifies the slave address to be programmed.
+ * @param Size Specifies the number of bytes to be programmed.
+ * This parameter must be a value between 0 and 255.
+ * @param Mode New state of the I2C START condition generation.
+ * This parameter can be one of the following values:
+ * @arg @ref I2C_RELOAD_MODE Enable Reload mode .
+ * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode.
+ * @arg @ref I2C_SOFTEND_MODE Enable Software end mode.
+ * @param Request New state of the I2C START condition generation.
+ * This parameter can be one of the following values:
+ * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition.
+ * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
+ * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
+ * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
+ * @retval None
+ */
+static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
+{
+ uint32_t tmpreg = 0U;
+
+ /* Check the parameters */
+ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+ assert_param(IS_TRANSFER_MODE(Mode));
+ assert_param(IS_TRANSFER_REQUEST(Request));
+
+ /* Get the CR2 register value */
+ tmpreg = hi2c->Instance->CR2;
+
+ /* clear tmpreg specific bits */
+ tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
+
+ /* update tmpreg */
+ tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16) & I2C_CR2_NBYTES) | \
+ (uint32_t)Mode | (uint32_t)Request);
+
+ /* update CR2 register */
+ hi2c->Instance->CR2 = tmpreg;
+}
+
+/**
+ * @brief I2C Tx data register flush process.
+ * @param hi2c I2C handle.
+ * @retval None
+ */
+static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
+{
+ /* If a pending TXIS flag is set */
+ /* Write a dummy data in TXDR to clear it */
+ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
+ {
+ hi2c->Instance->TXDR = 0x00U;
+ }
+
+ /* Flush TX register if not empty */
+ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
+ {
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
+ }
+}
+
+/**
+ * @brief This function handles Acknowledge failed detection during an I2C Communication.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
+ {
+ /* Wait until STOP Flag is reset */
+ /* AutoEnd should be initiate after AF */
+ while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
+ {
+ /* Check for the Timeout */
+ if (Timeout != HAL_MAX_DELAY)
+ {
+ if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
+ {
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+
+ /* Clear NACKF Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
+
+ /* Clear STOP Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+
+ /* Flush TX register */
+ I2C_Flush_TXDR(hi2c);
+
+ /* Clear Configuration Register 2 */
+ I2C_RESET_CR2(hi2c);
+
+ hi2c->ErrorCode = HAL_I2C_ERROR_AF;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
+ {
+ /* Check if a NACK is detected */
+ if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if (Timeout != HAL_MAX_DELAY)
+ {
+ if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
+ {
+ /* Check if a NACK is detected */
+ if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief Transmits in master mode an amount of data in blocking mode.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param DevAddress Target device address The device 7 bits address value
+ * in datasheet must be shifted to the left before calling the interface
+ * @param pData Pointer to data buffer
+ * @param Size Amount of data to be sent
+ * @param Timeout Timeout duration
+ * @param LastOp If set sends STOP, otherwise no STOP
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_I2C_Master_Transmit_Custom(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout,
+ uint8_t LastOp)
+{
+ uint32_t tickstart = 0U;
+
+ if (hi2c->State == HAL_I2C_STATE_READY)
+ {
+ /* Process Locked */
+ __HAL_LOCK(hi2c);
+
+ /* Init tickstart for timeout management*/
+ tickstart = HAL_GetTick();
+
+ if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL)
+ {
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+ else
+ {
+ /* FIXME: with not stop must wait here! why? timing config? */
+ os_time_delay(1);
+ }
+
+ hi2c->State = HAL_I2C_STATE_BUSY_TX;
+ hi2c->Mode = HAL_I2C_MODE_MASTER;
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+
+ /* Prepare transfer parameters */
+ hi2c->pBuffPtr = pData;
+ hi2c->XferCount = Size;
+ hi2c->XferISR = NULL;
+
+ /* Send Slave Address */
+ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
+ if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ {
+ hi2c->XferSize = MAX_NBYTE_SIZE;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
+ }
+ else if (!LastOp)
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
+ }
+ else
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
+ }
+
+ while (hi2c->XferCount > 0U)
+ {
+ /* Wait until TXIS flag is set */
+ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+ /* Write data to TXDR */
+ hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
+ hi2c->XferCount--;
+ hi2c->XferSize--;
+
+ if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
+ {
+ /* Wait until TCR flag is set */
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ {
+ hi2c->XferSize = MAX_NBYTE_SIZE;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
+ }
+ else if (!LastOp)
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_SOFTEND_MODE, I2C_NO_STARTSTOP);
+ }
+ else
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
+ }
+ }
+ }
+
+ if (LastOp)
+ {
+ /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
+ /* Wait until STOPF flag is set */
+ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Clear STOP Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+ }
+ else
+ {
+ /* No autoend/reload was requested, make sure transmission of last byte
+ * has finished... */
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, SET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Clear Configuration Register 2 */
+ I2C_RESET_CR2(hi2c);
+
+ hi2c->State = HAL_I2C_STATE_READY;
+ if (LastOp)
+ {
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ }
+ else
+ {
+ hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
+ }
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_OK;
+ }
+ else
+ {
+ return HAL_BUSY;
+ }
+}
+
+/**
+ * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param Timeout Timeout duration
+ * @param Tickstart Tick start value
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
+ {
+ /* Check if a NACK is detected */
+ if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check if a STOPF is detected */
+ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
+ {
+ /* Clear STOP Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+
+ /* Clear Configuration Register 2 */
+ I2C_RESET_CR2(hi2c);
+
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ hi2c->State = HAL_I2C_STATE_READY;
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_ERROR;
+ }
+
+ /* Check for the Timeout */
+ if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
+ {
+ hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ hi2c->State = HAL_I2C_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_TIMEOUT;
+ }
+ }
+ return HAL_OK;
+}
+
+/**
+ * @brief Receives in master mode an amount of data in blocking mode.
+ * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
+ * the configuration information for the specified I2C.
+ * @param DevAddress Target device address The device 7 bits address value
+ * in datasheet must be shifted to the left before calling the interface
+ * @param pData Pointer to data buffer
+ * @param Size Amount of data to be sent
+ * @param Timeout Timeout duration
+ * @param LastOp If set sends STOP, otherwise no STOP
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_I2C_Master_Receive_Custom(I2C_HandleTypeDef *hi2c,
+ uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout,
+ uint8_t LastOp)
+{
+ uint32_t tickstart = 0U;
+
+ if (hi2c->State == HAL_I2C_STATE_READY)
+ {
+ /* Process Locked */
+ __HAL_LOCK(hi2c);
+
+ /* Init tickstart for timeout management*/
+ tickstart = HAL_GetTick();
+
+ if (hi2c->Mode != HAL_I2C_MODE_MASTER_SEL)
+ {
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+ else
+ {
+ /* FIXME: with not stop must wait here! why? timing config? */
+ os_time_delay(1);
+ }
+
+ hi2c->State = HAL_I2C_STATE_BUSY_RX;
+ hi2c->Mode = HAL_I2C_MODE_MASTER;
+ hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+
+ /* Prepare transfer parameters */
+ hi2c->pBuffPtr = pData;
+ hi2c->XferCount = Size;
+ hi2c->XferISR = NULL;
+
+ /* Send Slave Address */
+ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
+ if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ {
+ hi2c->XferSize = MAX_NBYTE_SIZE;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
+ }
+ else if (!LastOp)
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_READ);
+ }
+ else
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
+ }
+
+ while (hi2c->XferCount > 0U)
+ {
+ /* Wait until RXNE flag is set */
+ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Read data from RXDR */
+ (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
+ hi2c->XferSize--;
+ hi2c->XferCount--;
+
+ if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
+ {
+ /* Wait until TCR flag is set */
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ {
+ hi2c->XferSize = MAX_NBYTE_SIZE;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
+ }
+ else if (!LastOp)
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_SOFTEND_MODE, I2C_NO_STARTSTOP);
+ }
+ else
+ {
+ hi2c->XferSize = hi2c->XferCount;
+ I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
+ }
+ }
+ }
+
+ if (LastOp)
+ {
+ /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
+ /* Wait until STOPF flag is set */
+ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ {
+ if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
+ {
+ return HAL_ERROR;
+ }
+ else
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Clear STOP Flag */
+ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+ }
+ else
+ {
+ /* No autoend/reload was requested, make sure transmission of last byte
+ * has finished... */
+ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, SET, Timeout, tickstart) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Clear Configuration Register 2 */
+ I2C_RESET_CR2(hi2c);
+
+ hi2c->State = HAL_I2C_STATE_READY;
+ if (LastOp)
+ {
+ hi2c->Mode = HAL_I2C_MODE_NONE;
+ }
+ else
+ {
+ hi2c->Mode = HAL_I2C_MODE_MASTER_SEL;
+ }
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hi2c);
+
+ return HAL_OK;
+ }
+ else
+ {
+ return HAL_BUSY;
+ }
+}
+
+#endif /* defined(STM32F3) || defined(STM32F7) */
diff --git a/hw/mcu/stm/stm32f1xx/src/hal_i2c.c b/hw/mcu/stm/stm32f1xx/src/hal_i2c.c
index 59dfc14..0d8d8f8 100644
--- a/hw/mcu/stm/stm32f1xx/src/hal_i2c.c
+++ b/hw/mcu/stm/stm32f1xx/src/hal_i2c.c
@@ -76,6 +76,7 @@ hal_i2c_init(uint8_t i2c_num, void *usercfg)
struct stm32f1_hal_i2c_cfg *cfg = (struct stm32f1_hal_i2c_cfg *)usercfg;
struct stm32f1_hal_i2c *dev;
I2C_InitTypeDef *init;
+ GPIO_InitTypeDef gpio;
int rc;
if (i2c_num >= HAL_I2C_MAX_DEVS || !(dev = hal_i2c_devs[i2c_num])) {
@@ -93,20 +94,35 @@ hal_i2c_init(uint8_t i2c_num, void *usercfg)
init->OwnAddress1 = I2C_ADDRESS;
init->OwnAddress2 = 0xFE;
+ init->DutyCycle = I2C_DUTYCYCLE_2;
+ init->DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ init->GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ init->NoStretchMode = I2C_NOSTRETCH_DISABLE;
+
/*
* Configure GPIO pins for I2C.
* Enable clock routing for I2C.
*/
- rc = hal_gpio_init_af(cfg->hic_pin_sda, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
- }
- rc = hal_gpio_init_af(cfg->hic_pin_scl, cfg->hic_pin_af, HAL_GPIO_PULL_UP,
- 1);
- if (rc) {
- goto err;
+ gpio.Speed = GPIO_SPEED_FREQ_HIGH;
+ gpio.Pull = GPIO_NOPULL;
+ gpio.Mode = GPIO_MODE_AF_OD;
+ hal_gpio_init_stm(cfg->hic_pin_scl, &gpio);
+ hal_gpio_init_stm(cfg->hic_pin_sda, &gpio);
+
+#if 0
+ hal_gpio_write(cfg->hic_pin_scl, 0);
+ //for (int i = 0; i < 1000; i++) asm("nop");
+ hal_gpio_write(cfg->hic_pin_scl, 1);
+
+ hal_gpio_write(cfg->hic_pin_sda, 0);
+ //for (int i = 0; i < 1000; i++) asm("nop");
+ hal_gpio_write(cfg->hic_pin_sda, 1);
+#endif
+
+ if (cfg->hic_pin_remap_fn) {
+ cfg->hic_pin_remap_fn();
}
+
*cfg->hic_rcc_reg |= cfg->hic_rcc_dev;
rc = HAL_I2C_Init(&dev->hid_handle);
if (rc) {
--
To stop receiving notification emails like this one, please contact
utzig@apache.org.
[mynewt-core] 08/13: Add initial stm32f3 mcu i2c config
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 0ebe880cf2bfb74d2de931335aa7220c34fcf877
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 14:53:18 2018 -0300
Add initial stm32f3 mcu i2c config
---
hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h | 5 +++++
hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h | 12 ++++++++++++
hw/mcu/stm/stm32f3xx/syscfg.yml | 4 ++++
hw/mcu/stm/stm32f4xx/syscfg.yml | 10 +++++-----
4 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
index 388640e..98d1a5e 100644
--- a/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
+++ b/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
@@ -60,6 +60,11 @@ struct stm32_hal_spi_cfg {
int irq_prio;
};
+/* hal_i2c */
+#include "stm32f3xx_hal_i2c.h"
+#include "mcu/stm32f3xx_mynewt_hal.h"
+#include "mcu/stm32f3_bsp.h"
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h b/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h
index 0b24798..b4465c0 100644
--- a/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h
+++ b/hw/mcu/stm/stm32f3xx/include/mcu/stm32f3xx_mynewt_hal.h
@@ -22,6 +22,8 @@
#include "stm32f3xx.h"
#include "stm32f3xx_hal_gpio.h"
+#include "stm32f3xx_hal_dma.h"
+#include "stm32f3xx_hal_i2c.h"
#ifdef __cplusplus
extern "C" {
@@ -45,6 +47,16 @@ extern "C" {
int hal_gpio_init_stm(int pin, GPIO_InitTypeDef *cfg);
int hal_gpio_deinit_stm(int pin, GPIO_InitTypeDef *cfg);
+struct stm32_hal_i2c_cfg {
+ I2C_TypeDef *hic_i2c;
+ volatile uint32_t *hic_rcc_reg; /* RCC register to modify */
+ uint32_t hic_rcc_dev; /* RCC device ID */
+ uint8_t hic_pin_sda;
+ uint8_t hic_pin_scl;
+ uint8_t hic_pin_af;
+ uint8_t hic_10bit;
+ uint32_t hic_speed;
+};
#ifdef __cplusplus
}
diff --git a/hw/mcu/stm/stm32f3xx/syscfg.yml b/hw/mcu/stm/stm32f3xx/syscfg.yml
index 2c23cd7..4ea70c8 100644
--- a/hw/mcu/stm/stm32f3xx/syscfg.yml
+++ b/hw/mcu/stm/stm32f3xx/syscfg.yml
@@ -58,3 +58,7 @@ syscfg.defs:
SPI_1:
description: 'SPI 1 enable'
value: 'MYNEWT_VAL_SPI_1_MASTER || MYNEWT_VAL_SPI_1_SLAVE'
+
+ I2C_0:
+ description: 'I2C (TWI) interface 0'
+ value: 0
diff --git a/hw/mcu/stm/stm32f4xx/syscfg.yml b/hw/mcu/stm/stm32f4xx/syscfg.yml
index db33de7..ad8fb54 100644
--- a/hw/mcu/stm/stm32f4xx/syscfg.yml
+++ b/hw/mcu/stm/stm32f4xx/syscfg.yml
@@ -16,13 +16,9 @@
# under the License.
#
-# Package: hw/bsp/nrf52dk
+# Package: hw/mcu/stm32f4xx
syscfg.defs:
- I2C_0:
- description: 'I2C (TWI) interface 0'
- value: 0
-
MCU_FLASH_MIN_WRITE_SIZE:
description: >
Specifies the required alignment for internal flash writes.
@@ -33,6 +29,10 @@ syscfg.defs:
description: MCUs are of STM32F4xx family
value: 1
+ I2C_0:
+ description: 'I2C (TWI) interface 0'
+ value: 0
+
SPI_0_MASTER:
description: 'SPI 0 master'
value: 0
--
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[mynewt-core] 03/13: Fix i2c config naming for all f4 bsps
Posted by ut...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit e418a77180c42bfa81995312a6997342f8d242e6
Author: Fabio Utzig <ut...@apache.org>
AuthorDate: Thu Mar 22 09:47:43 2018 -0300
Fix i2c config naming for all f4 bsps
---
hw/bsp/nucleo-f401re/src/hal_bsp.c | 2 +-
hw/bsp/nucleo-f413re/src/hal_bsp.c | 2 +-
hw/bsp/nucleo-f413zh/src/hal_bsp.c | 2 +-
hw/bsp/olimex_stm32-e407_devboard/src/hal_bsp.c | 2 +-
hw/bsp/stm32f4discovery/src/hal_bsp.c | 2 +-
hw/mcu/stm/stm32f4xx/include/mcu/stm32f4xx_mynewt_hal.h | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/bsp/nucleo-f401re/src/hal_bsp.c b/hw/bsp/nucleo-f401re/src/hal_bsp.c
index 60640bc..65eaf42 100644
--- a/hw/bsp/nucleo-f401re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-f401re/src/hal_bsp.c
@@ -73,7 +73,7 @@ static const struct hal_bsp_mem_dump dump_cfg[] = {
* be removed (they are the default connections) and SB46/SB52 need to
* be added.
*/
-static struct stm32f4_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
diff --git a/hw/bsp/nucleo-f413re/src/hal_bsp.c b/hw/bsp/nucleo-f413re/src/hal_bsp.c
index 7938926..31c0dfc 100644
--- a/hw/bsp/nucleo-f413re/src/hal_bsp.c
+++ b/hw/bsp/nucleo-f413re/src/hal_bsp.c
@@ -59,7 +59,7 @@ static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
#endif
#if MYNEWT_VAL(I2C_0)
-static struct stm32f4_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
diff --git a/hw/bsp/nucleo-f413zh/src/hal_bsp.c b/hw/bsp/nucleo-f413zh/src/hal_bsp.c
index d62af86..002fd6e 100644
--- a/hw/bsp/nucleo-f413zh/src/hal_bsp.c
+++ b/hw/bsp/nucleo-f413zh/src/hal_bsp.c
@@ -59,7 +59,7 @@ static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
#endif
#if MYNEWT_VAL(I2C_0)
-static struct stm32f4_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
diff --git a/hw/bsp/olimex_stm32-e407_devboard/src/hal_bsp.c b/hw/bsp/olimex_stm32-e407_devboard/src/hal_bsp.c
index 4170c65..89a1e9d 100644
--- a/hw/bsp/olimex_stm32-e407_devboard/src/hal_bsp.c
+++ b/hw/bsp/olimex_stm32-e407_devboard/src/hal_bsp.c
@@ -254,7 +254,7 @@ struct stm32f4_adc_dev_cfg adc3_config = STM32F4_ADC3_DEFAULT_CONFIG;
#endif
#if MYNEWT_VAL(I2C_0)
-static struct stm32f4_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
diff --git a/hw/bsp/stm32f4discovery/src/hal_bsp.c b/hw/bsp/stm32f4discovery/src/hal_bsp.c
index b783f9d..3cf3d68 100644
--- a/hw/bsp/stm32f4discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f4discovery/src/hal_bsp.c
@@ -62,7 +62,7 @@ static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
#endif
#if MYNEWT_VAL(I2C_0)
-static struct stm32f4_hal_i2c_cfg i2c_cfg0 = {
+static struct stm32_hal_i2c_cfg i2c_cfg0 = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
diff --git a/hw/mcu/stm/stm32f4xx/include/mcu/stm32f4xx_mynewt_hal.h b/hw/mcu/stm/stm32f4xx/include/mcu/stm32f4xx_mynewt_hal.h
index 73a420d..a656886 100644
--- a/hw/mcu/stm/stm32f4xx/include/mcu/stm32f4xx_mynewt_hal.h
+++ b/hw/mcu/stm/stm32f4xx/include/mcu/stm32f4xx_mynewt_hal.h
@@ -47,7 +47,7 @@ extern "C" {
int hal_gpio_init_stm(int pin, GPIO_InitTypeDef *cfg);
int hal_gpio_deinit_stm(int pin, GPIO_InitTypeDef *cfg);
-struct stm32f4_hal_i2c_cfg {
+struct stm32_hal_i2c_cfg {
I2C_TypeDef *hic_i2c;
volatile uint32_t *hic_rcc_reg; /* RCC register to modify */
uint32_t hic_rcc_dev; /* RCC device ID */
--
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