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Posted to commits@tvm.apache.org by GitBox <gi...@apache.org> on 2022/08/30 12:14:41 UTC
[GitHub] [tvm] zxybazh opened a new pull request, #12648: [MetaSchedule] Complete NCHW Conv2D Winograd Kernel Scheduling
zxybazh opened a new pull request, #12648:
URL: https://github.com/apache/tvm/pull/12648
This PR is a follow up for #12127 with updates on a critical local read cache (`d`) in `data_pack` block and scheduling for the kernel parts if available.
This change would bring MS's performance to be aligned with AutoTVM on NCHW Conv2d on CUDA. Benchmarking results to follow. And dispatch priority change will follow up in a separate PR.
CC @vinx13 @junrushao
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[GitHub] [tvm] zxybazh commented on pull request #12648: [MetaSchedule] Complete NCHW Conv2D Winograd Kernel Scheduling
Posted by GitBox <gi...@apache.org>.
zxybazh commented on PR #12648:
URL: https://github.com/apache/tvm/pull/12648#issuecomment-1232249412
@tvm-bot rerun
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[GitHub] [tvm] zxybazh commented on pull request #12648: [MetaSchedule] Complete NCHW Conv2D Winograd Kernel Scheduling
Posted by GitBox <gi...@apache.org>.
zxybazh commented on PR #12648:
URL: https://github.com/apache/tvm/pull/12648#issuecomment-1231920134
Follow up with CUDA benchmarking results on Geforce RTX 3070, all data layouts are `NCHW`, padding `(1, 1)`, kernel size `(3, 3)`. Workload is a single conv2d function, dispatched to `nn.contrib_conv2d_winograd_without_weight_transform` for both AutoTVM and MetaSchedule.
<table class="table table-bordered table-hover table-condensed">
<thead><tr><th title="Field #1">Data Shape</th>
<th title="Field #2">Kernel Layout</th>
<th title="Field #3">Kernel Shape</th>
<th title="Field #4">Winograd</th>
<th title="Field #5">MS trials</th>
<th title="Field #6">AutoTVM trials</th>
<th title="Field #7">MS Perf(ms)</th>
<th title="Field #8">AutoTVM Perf(ms)</th>
<th title="Field #9">Perf Compare</th>
</tr></thead>
<tbody><tr>
<td>(1, 512, 7, 7)</td>
<td>OIHW</td>
<td>(512, 512, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.05053524796891558</td>
<td>0.05030714765801846</td>
<td align="right">-0.4513687378%</td>
</tr>
<tr>
<td>(2, 64, 56, 56)</td>
<td>OIHW</td>
<td>(64, 64, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.040951505223880594</td>
<td>0.04111647433704021</td>
<td align="right">0.4028401698%</td>
</tr>
<tr>
<td>(2, 48, 56, 56)</td>
<td>OIHW</td>
<td>(48, 48, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.029897891745708238</td>
<td>0.030240458663465385</td>
<td align="right">1.1457895449%</td>
</tr>
<tr>
<td>(1, 64, 28, 28)</td>
<td>OIHW</td>
<td>(64, 64, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.010250015296394941</td>
<td>0.010370220173567484</td>
<td align="right">1.1727287589%</td>
</tr>
<tr>
<td>(1, 128, 28, 28)</td>
<td>OIHW</td>
<td>(128, 128, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.026061056047912482</td>
<td>0.02657971123398702</td>
<td align="right">1.9901541408%</td>
</tr>
<tr>
<td>(1, 64, 56, 56)</td>
<td>OIHW</td>
<td>(64, 64, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.022871235249414843</td>
<td>0.023843754776970795</td>
<td align="right">4.2521513025%</td>
</tr>
<tr>
<td>(1, 128, 14, 14)</td>
<td>OIHW</td>
<td>(128, 128, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.011837556120361336</td>
<td>0.012637039015519788</td>
<td align="right">6.7537833572%</td>
</tr>
<tr>
<td>(1, 256, 14, 14)</td>
<td>OIHW</td>
<td>(256, 256, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.028101132421289355</td>
<td>0.03071125413188647</td>
<td align="right">9.2883150453%</td>
</tr>
<tr>
<td>(1, 80, 73, 73)</td>
<td>OIHW</td>
<td>(192, 80, 3, 3)</td>
<td>Yes</td>
<td align="right">2048</td>
<td align="right">1024</td>
<td>0.2016123825065274</td>
<td>0.22382275871015564</td>
<td align="right">11.0163750497%</td>
</tr>
</tbody></table>
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[GitHub] [tvm] Hzfengsy merged pull request #12648: [MetaSchedule] Complete NCHW Conv2D Winograd Kernel Scheduling
Posted by GitBox <gi...@apache.org>.
Hzfengsy merged PR #12648:
URL: https://github.com/apache/tvm/pull/12648
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