[GitHub] [tvm] tqchen commented on a change in pull request #7809: [Target][Lowering] Update Op Intrinsic Lowering Mechanism And Intrinsic Lowering Pass

[GitBox <gi...@apache.org>]

tqchen commented on a change in pull request #7809:
URL: https://github.com/apache/tvm/pull/7809#discussion_r618561537



##########
File path: src/target/llvm/intrin_rule_llvm.cc
##########
@@ -25,155 +25,175 @@
 #include "intrin_rule_llvm.h"
 
 #include <tvm/tir/op.h>
+#include <tvm/tir/op_attr_types.h>
 
 namespace tvm {
 namespace codegen {
 namespace llvm {
+using tir::FLowerIntrinsic;
 
-TVM_REGISTER_GLOBAL("tvm.intrin.rule.llvm.prefetch")
-    .set_body(DispatchLLVMIntrin<::llvm::Intrinsic::prefetch, 4>);
+TVM_REGISTER_OP("tir.prefetch")
+    .set_attr<FLowerIntrinsic>("llvm.FLowerIntrinsic",
+                               PackedFunc(DispatchLLVMIntrin<::llvm::Intrinsic::prefetch, 4>));
 
-TVM_REGISTER_GLOBAL("tvm.intrin.rule.llvm.exp")
-    .set_body(DispatchLLVMPureIntrin<::llvm::Intrinsic::exp, 1>);
+TVM_REGISTER_OP("tir.exp").set_attr<FLowerIntrinsic>(
+    "llvm.FLowerIntrinsic", PackedFunc(DispatchLLVMPureIntrin<::llvm::Intrinsic::exp, 1>));
 
-TVM_REGISTER_GLOBAL("tvm.intrin.rule.llvm.exp2")
-    .set_body(DispatchLLVMPureIntrin<::llvm::Intrinsic::exp2, 1>);
+TVM_REGISTER_OP("tir.exp2")
+    .set_attr<FLowerIntrinsic>("llvm.FLowerIntrinsic",
+                               PackedFunc(DispatchLLVMPureIntrin<::llvm::Intrinsic::exp2, 1>));
 
 // TODO(tvm-team): migrate the legalization transformations as a separate
 //                 set of rules in TIR that can be shared across backends.
-TVM_REGISTER_GLOBAL("tvm.intrin.rule.llvm.exp10")
-    .set_body([](const TVMArgs& targs, TVMRetValue* rv) {
-      using tir::make_const;
-      using tir::make_zero;
+TVM_REGISTER_OP("tir.exp10")
+    .set_attr<FLowerIntrinsic>("llvm.FLowerIntrinsic",
+                               PackedFunc([](const TVMArgs& targs, TVMRetValue* rv) {
+                                 using tir::make_const;
+                                 using tir::make_zero;
+                                 PrimExpr e = targs[0];

Review comment:
       Would be great use the typed version of PackedFunc

##########
File path: include/tvm/ir/op.h
##########
@@ -270,14 +270,17 @@ class OpRegEntry {
    *  an higher priority level attribute
    *  will replace lower priority level attribute.
    *  Must be bigger than 0.
+   * \param can_override Whether to explicitly allow
+   *  overriding the attribute, any non-zero value
+   *  implies allowance and 0 means disallowance.
    *
    *  Cannot set with same plevel twice in the code.
    *
    * \tparam ValueType The type of the value to be set.
    */
   template <typename ValueType>
   inline OpRegEntry& set_attr(const std::string& attr_name,  // NOLINT(*)
-                              const ValueType& value, int plevel = 10);
+                              const ValueType& value, int plevel = 10, int can_override = 0);

Review comment:
       Wju do we need to introduce can_override when we already have plevel to specify overriding rule.
   
   Previously we check the plevel, if the plevel have higher priority level then we can override the attribute

##########
File path: src/target/llvm/intrin_rule_hexagon.cc
##########
@@ -19,44 +19,54 @@
 
 #ifdef TVM_LLVM_VERSION
 
+#include <tvm/tir/op_attr_types.h>
+
 #include "intrin_rule_llvm.h"
 
 namespace tvm {
 namespace codegen {
 namespace llvm {
+using tir::FLowerIntrinsic;
 
-TVM_REGISTER_GLOBAL("tvm.intrin.rule.hexagon.exp")
-    .set_body(DispatchLLVMPureIntrin<::llvm::Intrinsic::exp, 1>);
+TVM_REGISTER_OP("tir.exp").set_attr<FLowerIntrinsic>(
+    "hexagon.FLowerIntrinsic", PackedFunc(DispatchLLVMPureIntrin<::llvm::Intrinsic::exp, 1>));

Review comment:
       would be nice if we can modify the signature of DispatchLLVMPureIntrin to be PrimExpr->PrimExpr, so we do not have to do the convertion to PackedFunc




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