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Posted to commits@nuttx.apache.org by "donghengqaz (via GitHub)" <gi...@apache.org> on 2023/12/07 08:06:11 UTC
[PR] xtensa/esp32: Add flash mmap function [nuttx]
donghengqaz opened a new pull request, #11338:
URL: https://github.com/apache/nuttx/pull/11338
## Summary
Add flash mmap function.
## Impact
## Testing
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Re: [PR] xtensa/esp32: Add flash mmap function [nuttx]
Posted by "pkarashchenko (via GitHub)" <gi...@apache.org>.
pkarashchenko commented on code in PR #11338:
URL: https://github.com/apache/nuttx/pull/11338#discussion_r1419524902
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -79,6 +79,19 @@
#define SPI_FLASH_ENCRYPT_MIN_SIZE (16)
+#define IBUS1_PAGE_BASE IROM0_PAGES_START
+#define IBUS1_PAGE_ADRR SOC_IROM_MASK_LOW
+#define IBUS1_PAGE_START (IBUS1_PAGE_BASE + 13)
Review Comment:
Does 13 have a special meaning? I mean is it worth of a separate define?
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -79,6 +79,19 @@
#define SPI_FLASH_ENCRYPT_MIN_SIZE (16)
+#define IBUS1_PAGE_BASE IROM0_PAGES_START
+#define IBUS1_PAGE_ADRR SOC_IROM_MASK_LOW
+#define IBUS1_PAGE_START (IBUS1_PAGE_BASE + 13)
+#define IBUS1_PAGE_END (IBUS1_PAGE_BASE + 64)
Review Comment:
Is 64 here for `SPI_FLASH_READ_BUF_SIZE`? Or it has some other meaning?
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Re: [PR] xtensa/esp32: Add flash mmap function [nuttx]
Posted by "donghengqaz (via GitHub)" <gi...@apache.org>.
donghengqaz commented on code in PR #11338:
URL: https://github.com/apache/nuttx/pull/11338#discussion_r1419867077
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -79,6 +79,19 @@
#define SPI_FLASH_ENCRYPT_MIN_SIZE (16)
+#define IBUS1_PAGE_BASE IROM0_PAGES_START
+#define IBUS1_PAGE_ADRR SOC_IROM_MASK_LOW
+#define IBUS1_PAGE_START (IBUS1_PAGE_BASE + 13)
Review Comment:
Because the space from 0x4000,000 to 0x400d,0000 (totally 13 MMU units) is invalid, so we need to skip these.
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Re: [PR] xtensa/esp32: Add flash mmap function [nuttx]
Posted by "xiaoxiang781216 (via GitHub)" <gi...@apache.org>.
xiaoxiang781216 commented on code in PR #11338:
URL: https://github.com/apache/nuttx/pull/11338#discussion_r1418888163
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -2660,4 +2750,200 @@ bool esp32_flash_encryption_enabled(void)
return enabled;
}
+#ifdef CONFIG_ESP32_SPI_FLASH_MMAP
+
+/****************************************************************************
+ * Name: esp32_spiflash_mmu_init
+ *
+ * Description:
+ * Initialize MMU for accessing SPI flash by I-Bus.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32_spiflash_mmu_init(void)
+{
+ uint32_t regval;
+
+ /* Initialize I-Bus 2 section, initial value can't be invalid */
+
+ for (int i = IBUS2_PAGE_START; i < IBUS2_PAGE_END; i++)
Review Comment:
`int i;` to the beginning of function
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -2660,4 +2750,200 @@ bool esp32_flash_encryption_enabled(void)
return enabled;
}
+#ifdef CONFIG_ESP32_SPI_FLASH_MMAP
+
+/****************************************************************************
+ * Name: esp32_spiflash_mmu_init
+ *
+ * Description:
+ * Initialize MMU for accessing SPI flash by I-Bus.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32_spiflash_mmu_init(void)
+{
+ uint32_t regval;
+
+ /* Initialize I-Bus 2 section, initial value can't be invalid */
+
+ for (int i = IBUS2_PAGE_START; i < IBUS2_PAGE_END; i++)
+ {
+ PRO_MMU_TABLE[i] = IBUS2_INVALID_MMU_VAL;
+#ifdef CONFIG_SMP
+ APP_MMU_TABLE[i] = IBUS2_INVALID_MMU_VAL;
+#endif
+ }
+
+ /* Enable multiply I-Bus region when cache is enable */
+
+ regval = getreg32(DPORT_PRO_CACHE_CTRL_REG);
+ regval &= ~DPORT_PRO_SINGLE_IRAM_ENA_M;
+ putreg32(regval, DPORT_PRO_CACHE_CTRL_REG);
+#ifdef CONFIG_SMP
+ regval = getreg32(DPORT_APP_CACHE_CTRL_REG);
+ regval &= ~DPORT_APP_SINGLE_IRAM_ENA_M;
+ putreg32(regval, DPORT_APP_CACHE_CTRL_REG);
+#endif
+
+ /* Enable I-Bus 2 when cache is enable */
+
+ regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG);
+ regval &= ~DPORT_PRO_CACHE_MASK_IRAM1_M;
+ putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG);
+#ifdef CONFIG_SMP
+ regval = getreg32(DPORT_APP_CACHE_CTRL1_REG);
+ regval &= ~DPORT_APP_CACHE_MASK_IRAM1_M;
+ putreg32(regval, DPORT_APP_CACHE_CTRL1_REG);
+#endif
+}
+
+/****************************************************************************
+ * Name: esp32_flash_mmap
+ *
+ * Description:
+ * Map SPI flash physical space to I-Bus address.
+ *
+ * Input Parameters:
+ * flash_addr - SPI flash physical space start address
+ * flash_size - SPI flash physical space size
+ * mapped_ptr - Mapped I-Bus address
+ *
+ * Returned Value:
+ * 0 if success or a negative value if failed.
+ *
+ ****************************************************************************/
+
+int IRAM_ATTR esp32_flash_mmap(uint32_t flash_addr,
+ uint32_t flash_size,
+ uint32_t *mapped_ptr)
+{
+ uint32_t i;
+ uint32_t regval;
+ uint32_t mmu_start;
+ uint32_t mmu_units = MMU_BYTES2PAGES(flash_size);
+ uint32_t flash_page = MMU_ADDR2PAGE(flash_addr);
+
+ esp32_spiflash_opstart();
+
+ for (mmu_start = IBUS1_PAGE_START;
+ mmu_start < IBUS2_PAGE_END - mmu_units;
+ mmu_start++)
+ {
+ if (mmu_is_unused(mmu_start))
+ {
+ for (i = 0; i < mmu_units; i++)
+ {
+ if (!mmu_is_unused(mmu_start + i))
+ {
+ mmu_start += i;
+ break;
+ }
+ }
+
+ if (i >= mmu_units)
+ {
+ break;
+ }
+ }
+ }
+
+ if (mmu_start >= IBUS2_PAGE_END - mmu_units)
+ {
+ esp32_spiflash_opdone();
+ return -ENOSPC;
+ }
+
+ for (i = 0; i < mmu_units; i++)
+ {
+ PRO_MMU_TABLE[mmu_start + i] = flash_page + i;
+#ifdef CONFIG_SMP
+ APP_MMU_TABLE[mmu_start + i] = flash_page + i;
+#endif
+ }
+
+#ifdef CONFIG_ESP32_SPIRAM
+ esp_spiram_writeback_cache();
+#endif
+
+ cache_flush(0);
+#ifdef CONFIG_SMP
+ cache_flush(1);
+#endif
+
+ esp32_spiflash_opdone();
+
+ *mapped_ptr = IBUS1_PAGE_ADRR +
+ (mmu_start - IBUS1_PAGE_BASE) * SPI_FLASH_MMU_PAGE_SIZE;
+
+ return 0;
+}
+
+/****************************************************************************
+ * Name: esp32_flash_unmap
+ *
+ * Description:
+ * Free mapped I-Bus space.
+ *
+ * Input Parameters:
+ * mapped_ptr - Mapped I-Bus space start address
+ * mapped_size - Mapped I-Bus space size
+ *
+ * Returned Value:
+ * 0 if success or a negative value if failed.
+ *
+ ****************************************************************************/
+
+int IRAM_ATTR esp32_flash_unmap(uint32_t mapped_ptr,
+ uint32_t mapped_size)
+{
+ uint32_t mmu_start;
+ uint32_t mmu_units;
+
+ if ((mapped_ptr < SOC_IROM_LOW) ||
+ (mapped_ptr >= IRAM1_CACHE_ADDRESS_HIGH))
+ {
+ return -EINVAL;
+ }
+
+ mmu_start = (mapped_ptr - IBUS1_PAGE_ADRR) / SPI_FLASH_MMU_PAGE_SIZE +
+ IBUS1_PAGE_BASE;
+ mmu_units = MMU_ADDR2PAGE(mapped_size);
+
+ esp32_spiflash_opstart();
+
+ for (uint32_t i = mmu_start; i < mmu_start + mmu_units; i++)
+ {
+ if (mmu_is_unused(i))
+ {
+ esp32_spiflash_opdone();
+ return -EINVAL;
+ }
+ }
+
+ for (uint32_t i = mmu_start; i < mmu_start + mmu_units; i++)
Review Comment:
`uint32_t i;` to the beginning of function
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -2660,4 +2750,200 @@ bool esp32_flash_encryption_enabled(void)
return enabled;
}
+#ifdef CONFIG_ESP32_SPI_FLASH_MMAP
+
+/****************************************************************************
+ * Name: esp32_spiflash_mmu_init
+ *
+ * Description:
+ * Initialize MMU for accessing SPI flash by I-Bus.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32_spiflash_mmu_init(void)
+{
+ uint32_t regval;
+
+ /* Initialize I-Bus 2 section, initial value can't be invalid */
+
+ for (int i = IBUS2_PAGE_START; i < IBUS2_PAGE_END; i++)
+ {
+ PRO_MMU_TABLE[i] = IBUS2_INVALID_MMU_VAL;
+#ifdef CONFIG_SMP
+ APP_MMU_TABLE[i] = IBUS2_INVALID_MMU_VAL;
+#endif
+ }
+
+ /* Enable multiply I-Bus region when cache is enable */
+
+ regval = getreg32(DPORT_PRO_CACHE_CTRL_REG);
+ regval &= ~DPORT_PRO_SINGLE_IRAM_ENA_M;
+ putreg32(regval, DPORT_PRO_CACHE_CTRL_REG);
+#ifdef CONFIG_SMP
+ regval = getreg32(DPORT_APP_CACHE_CTRL_REG);
+ regval &= ~DPORT_APP_SINGLE_IRAM_ENA_M;
+ putreg32(regval, DPORT_APP_CACHE_CTRL_REG);
+#endif
+
+ /* Enable I-Bus 2 when cache is enable */
+
+ regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG);
+ regval &= ~DPORT_PRO_CACHE_MASK_IRAM1_M;
+ putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG);
+#ifdef CONFIG_SMP
+ regval = getreg32(DPORT_APP_CACHE_CTRL1_REG);
+ regval &= ~DPORT_APP_CACHE_MASK_IRAM1_M;
+ putreg32(regval, DPORT_APP_CACHE_CTRL1_REG);
+#endif
+}
+
+/****************************************************************************
+ * Name: esp32_flash_mmap
+ *
+ * Description:
+ * Map SPI flash physical space to I-Bus address.
+ *
+ * Input Parameters:
+ * flash_addr - SPI flash physical space start address
+ * flash_size - SPI flash physical space size
+ * mapped_ptr - Mapped I-Bus address
+ *
+ * Returned Value:
+ * 0 if success or a negative value if failed.
+ *
+ ****************************************************************************/
+
+int IRAM_ATTR esp32_flash_mmap(uint32_t flash_addr,
+ uint32_t flash_size,
+ uint32_t *mapped_ptr)
+{
+ uint32_t i;
+ uint32_t regval;
+ uint32_t mmu_start;
+ uint32_t mmu_units = MMU_BYTES2PAGES(flash_size);
+ uint32_t flash_page = MMU_ADDR2PAGE(flash_addr);
+
+ esp32_spiflash_opstart();
+
+ for (mmu_start = IBUS1_PAGE_START;
+ mmu_start < IBUS2_PAGE_END - mmu_units;
+ mmu_start++)
+ {
+ if (mmu_is_unused(mmu_start))
+ {
+ for (i = 0; i < mmu_units; i++)
+ {
+ if (!mmu_is_unused(mmu_start + i))
+ {
+ mmu_start += i;
+ break;
+ }
+ }
+
+ if (i >= mmu_units)
+ {
+ break;
+ }
+ }
+ }
+
+ if (mmu_start >= IBUS2_PAGE_END - mmu_units)
+ {
+ esp32_spiflash_opdone();
+ return -ENOSPC;
+ }
+
+ for (i = 0; i < mmu_units; i++)
+ {
+ PRO_MMU_TABLE[mmu_start + i] = flash_page + i;
+#ifdef CONFIG_SMP
+ APP_MMU_TABLE[mmu_start + i] = flash_page + i;
+#endif
+ }
+
+#ifdef CONFIG_ESP32_SPIRAM
+ esp_spiram_writeback_cache();
+#endif
+
+ cache_flush(0);
+#ifdef CONFIG_SMP
+ cache_flush(1);
+#endif
+
+ esp32_spiflash_opdone();
+
+ *mapped_ptr = IBUS1_PAGE_ADRR +
+ (mmu_start - IBUS1_PAGE_BASE) * SPI_FLASH_MMU_PAGE_SIZE;
+
+ return 0;
+}
+
+/****************************************************************************
+ * Name: esp32_flash_unmap
+ *
+ * Description:
+ * Free mapped I-Bus space.
+ *
+ * Input Parameters:
+ * mapped_ptr - Mapped I-Bus space start address
+ * mapped_size - Mapped I-Bus space size
+ *
+ * Returned Value:
+ * 0 if success or a negative value if failed.
+ *
+ ****************************************************************************/
+
+int IRAM_ATTR esp32_flash_unmap(uint32_t mapped_ptr,
+ uint32_t mapped_size)
+{
+ uint32_t mmu_start;
+ uint32_t mmu_units;
+
+ if ((mapped_ptr < SOC_IROM_LOW) ||
+ (mapped_ptr >= IRAM1_CACHE_ADDRESS_HIGH))
+ {
+ return -EINVAL;
+ }
+
+ mmu_start = (mapped_ptr - IBUS1_PAGE_ADRR) / SPI_FLASH_MMU_PAGE_SIZE +
+ IBUS1_PAGE_BASE;
+ mmu_units = MMU_ADDR2PAGE(mapped_size);
+
+ esp32_spiflash_opstart();
+
+ for (uint32_t i = mmu_start; i < mmu_start + mmu_units; i++)
Review Comment:
`uint32_t i;` to the beginning of function
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Re: [PR] xtensa/esp32: Add flash mmap function [nuttx]
Posted by "pkarashchenko (via GitHub)" <gi...@apache.org>.
pkarashchenko commented on code in PR #11338:
URL: https://github.com/apache/nuttx/pull/11338#discussion_r1419522842
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -2660,4 +2750,200 @@ bool esp32_flash_encryption_enabled(void)
return enabled;
}
+#ifdef CONFIG_ESP32_SPI_FLASH_MMAP
+
+/****************************************************************************
+ * Name: esp32_spiflash_mmu_init
+ *
+ * Description:
+ * Initialize MMU for accessing SPI flash by I-Bus.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32_spiflash_mmu_init(void)
+{
+ uint32_t regval;
+
+ /* Initialize I-Bus 2 section, initial value can't be invalid */
+
+ for (int i = IBUS2_PAGE_START; i < IBUS2_PAGE_END; i++)
+ {
+ PRO_MMU_TABLE[i] = IBUS2_INVALID_MMU_VAL;
+#ifdef CONFIG_SMP
+ APP_MMU_TABLE[i] = IBUS2_INVALID_MMU_VAL;
+#endif
+ }
+
+ /* Enable multiply I-Bus region when cache is enable */
+
+ regval = getreg32(DPORT_PRO_CACHE_CTRL_REG);
+ regval &= ~DPORT_PRO_SINGLE_IRAM_ENA_M;
+ putreg32(regval, DPORT_PRO_CACHE_CTRL_REG);
+#ifdef CONFIG_SMP
+ regval = getreg32(DPORT_APP_CACHE_CTRL_REG);
+ regval &= ~DPORT_APP_SINGLE_IRAM_ENA_M;
+ putreg32(regval, DPORT_APP_CACHE_CTRL_REG);
+#endif
+
+ /* Enable I-Bus 2 when cache is enable */
+
+ regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG);
+ regval &= ~DPORT_PRO_CACHE_MASK_IRAM1_M;
+ putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG);
+#ifdef CONFIG_SMP
+ regval = getreg32(DPORT_APP_CACHE_CTRL1_REG);
+ regval &= ~DPORT_APP_CACHE_MASK_IRAM1_M;
+ putreg32(regval, DPORT_APP_CACHE_CTRL1_REG);
+#endif
+}
+
+/****************************************************************************
+ * Name: esp32_flash_mmap
+ *
+ * Description:
+ * Map SPI flash physical space to I-Bus address.
+ *
+ * Input Parameters:
+ * flash_addr - SPI flash physical space start address
+ * flash_size - SPI flash physical space size
+ * mapped_ptr - Mapped I-Bus address
+ *
+ * Returned Value:
+ * 0 if success or a negative value if failed.
+ *
+ ****************************************************************************/
+
+int IRAM_ATTR esp32_flash_mmap(uint32_t flash_addr,
+ uint32_t flash_size,
+ uint32_t *mapped_ptr)
+{
+ uint32_t i;
+ uint32_t regval;
+ uint32_t mmu_start;
+ uint32_t mmu_units = MMU_BYTES2PAGES(flash_size);
+ uint32_t flash_page = MMU_ADDR2PAGE(flash_addr);
+
+ esp32_spiflash_opstart();
+
+ for (mmu_start = IBUS1_PAGE_START;
+ mmu_start < IBUS2_PAGE_END - mmu_units;
+ mmu_start++)
+ {
+ if (mmu_is_unused(mmu_start))
+ {
+ for (i = 0; i < mmu_units; i++)
+ {
+ if (!mmu_is_unused(mmu_start + i))
+ {
+ mmu_start += i;
+ break;
+ }
+ }
+
+ if (i >= mmu_units)
+ {
+ break;
+ }
+ }
+ }
+
+ if (mmu_start >= IBUS2_PAGE_END - mmu_units)
+ {
+ esp32_spiflash_opdone();
+ return -ENOSPC;
+ }
+
+ for (i = 0; i < mmu_units; i++)
+ {
+ PRO_MMU_TABLE[mmu_start + i] = flash_page + i;
+#ifdef CONFIG_SMP
+ APP_MMU_TABLE[mmu_start + i] = flash_page + i;
+#endif
+ }
+
+#ifdef CONFIG_ESP32_SPIRAM
+ esp_spiram_writeback_cache();
+#endif
+
+ cache_flush(0);
+#ifdef CONFIG_SMP
+ cache_flush(1);
+#endif
+
+ esp32_spiflash_opdone();
+
+ *mapped_ptr = IBUS1_PAGE_ADRR +
+ (mmu_start - IBUS1_PAGE_BASE) * SPI_FLASH_MMU_PAGE_SIZE;
+
+ return 0;
+}
+
+/****************************************************************************
+ * Name: esp32_flash_unmap
+ *
+ * Description:
+ * Free mapped I-Bus space.
+ *
+ * Input Parameters:
+ * mapped_ptr - Mapped I-Bus space start address
+ * mapped_size - Mapped I-Bus space size
+ *
+ * Returned Value:
+ * 0 if success or a negative value if failed.
+ *
+ ****************************************************************************/
+
+int IRAM_ATTR esp32_flash_unmap(uint32_t mapped_ptr,
+ uint32_t mapped_size)
+{
+ uint32_t mmu_start;
+ uint32_t mmu_units;
+
+ if ((mapped_ptr < SOC_IROM_LOW) ||
+ (mapped_ptr >= IRAM1_CACHE_ADDRESS_HIGH))
+ {
+ return -EINVAL;
+ }
+
+ mmu_start = (mapped_ptr - IBUS1_PAGE_ADRR) / SPI_FLASH_MMU_PAGE_SIZE +
+ IBUS1_PAGE_BASE;
+ mmu_units = MMU_ADDR2PAGE(mapped_size);
+
+ esp32_spiflash_opstart();
+
+ for (uint32_t i = mmu_start; i < mmu_start + mmu_units; i++)
Review Comment:
May be applied, but should not be mandatory for arch specific code
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -2660,4 +2750,200 @@ bool esp32_flash_encryption_enabled(void)
return enabled;
}
+#ifdef CONFIG_ESP32_SPI_FLASH_MMAP
+
+/****************************************************************************
+ * Name: esp32_spiflash_mmu_init
+ *
+ * Description:
+ * Initialize MMU for accessing SPI flash by I-Bus.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+void esp32_spiflash_mmu_init(void)
+{
+ uint32_t regval;
+
+ /* Initialize I-Bus 2 section, initial value can't be invalid */
+
+ for (int i = IBUS2_PAGE_START; i < IBUS2_PAGE_END; i++)
Review Comment:
I would say that it is not mandatory for arch specific code
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Re: [PR] xtensa/esp32: Add flash mmap function [nuttx]
Posted by "donghengqaz (via GitHub)" <gi...@apache.org>.
donghengqaz commented on code in PR #11338:
URL: https://github.com/apache/nuttx/pull/11338#discussion_r1419867807
##########
arch/xtensa/src/esp32/esp32_spiflash.c:
##########
@@ -79,6 +79,19 @@
#define SPI_FLASH_ENCRYPT_MIN_SIZE (16)
+#define IBUS1_PAGE_BASE IROM0_PAGES_START
+#define IBUS1_PAGE_ADRR SOC_IROM_MASK_LOW
+#define IBUS1_PAGE_START (IBUS1_PAGE_BASE + 13)
+#define IBUS1_PAGE_END (IBUS1_PAGE_BASE + 64)
Review Comment:
These are some MMU groups, each group has 64 MMU units. so each gourp can map flash size = 64 * 64KB = 4MB.
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