[incubator-nuttx] 04/04: Run tools/nxstyle against all files modified by PR187 and correct complaints

[gn...@apache.org]

This is an automated email from the ASF dual-hosted git repository.

gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 960c26491c0692f5ac35974517524704fae33524
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Thu Jan 30 19:00:12 2020 -0600

    Run tools/nxstyle against all files modified by PR187 and correct complaints
---
 arch/mips/src/common/up_internal.h       | 7 +++++--
 arch/mips/src/mips32/up_assert.c         | 1 +
 arch/mips/src/mips32/up_releasepending.c | 1 +
 arch/mips/src/pic32mx/pic32mx-irq.c      | 1 +
 arch/mips/src/pic32mz/pic32mz-irq.c      | 2 ++
 5 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/mips/src/common/up_internal.h b/arch/mips/src/common/up_internal.h
index 1c5ff32..fcdf9a3 100644
--- a/arch/mips/src/common/up_internal.h
+++ b/arch/mips/src/common/up_internal.h
@@ -131,7 +131,6 @@ extern volatile uint32_t *g_current_regs[1];
 
 #endif
 
-
 /* This is the beginning of heap as provided from up_head.S. This is the
  * first address in DRAM after the loaded program+bss+idle stack.  The end
  * of the heap is CONFIG_RAM_END
@@ -180,11 +179,12 @@ extern uint32_t _bmxdupba_address;  /* BMX register setting */
  ****************************************************************************/
 
 /****************************************************************************
- * Public Functions
+ * Public Function Prototypes
  ****************************************************************************/
 
 #ifndef __ASSEMBLY__
 /* Common Functions *********************************************************/
+
 /* Common functions define in arch/mips/src/common.  These may be replaced
  * with chip-specific functions of the same name if needed.  See also
  * functions prototyped in include/nuttx/arch.h.
@@ -216,6 +216,7 @@ void up_dumpstate(void);
 #endif
 
 /* Common MIPS32 functions defined in arch/mips/src/MIPS32 */
+
 /* IRQs */
 
 uint32_t *up_doirq(int irq, uint32_t *regs);
@@ -229,7 +230,9 @@ int up_swint0(int irq, FAR void *context, FAR void *arg);
 void up_sigdeliver(void);
 
 /* Chip-specific functions **************************************************/
+
 /* Chip specific functions defined in arch/mips/src/<chip> */
+
 /* IRQs */
 
 void up_irqinitialize(void);
diff --git a/arch/mips/src/mips32/up_assert.c b/arch/mips/src/mips32/up_assert.c
index 8df546f..696dd3b 100644
--- a/arch/mips/src/mips32/up_assert.c
+++ b/arch/mips/src/mips32/up_assert.c
@@ -59,6 +59,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* USB trace dumping */
 
 #ifndef CONFIG_USBDEV_TRACE
diff --git a/arch/mips/src/mips32/up_releasepending.c b/arch/mips/src/mips32/up_releasepending.c
index c9d3473..bf50bfb 100644
--- a/arch/mips/src/mips32/up_releasepending.c
+++ b/arch/mips/src/mips32/up_releasepending.c
@@ -74,6 +74,7 @@ void up_release_pending(void)
   /* Merge the g_pendingtasks list into the ready-to-run task list */
 
   /* sched_lock(); */
+
   if (sched_mergepending())
     {
       /* The currently active task has changed!  We will need to switch
diff --git a/arch/mips/src/pic32mx/pic32mx-irq.c b/arch/mips/src/pic32mx/pic32mx-irq.c
index 5b4f729..064ed4e 100644
--- a/arch/mips/src/pic32mx/pic32mx-irq.c
+++ b/arch/mips/src/pic32mx/pic32mx-irq.c
@@ -58,6 +58,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ************************************************************/
 
 #ifdef CONFIG_PIC32MX_MVEC
diff --git a/arch/mips/src/pic32mz/pic32mz-irq.c b/arch/mips/src/pic32mz/pic32mz-irq.c
index 11a5fb6..6d9e055 100644
--- a/arch/mips/src/pic32mz/pic32mz-irq.c
+++ b/arch/mips/src/pic32mz/pic32mz-irq.c
@@ -58,6 +58,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ************************************************************/
 
 #ifdef CONFIG_PIC32MZ_MVEC
@@ -65,6 +66,7 @@
 #endif
 
 /* Interrupt controller definitions *****************************************/
+
 /* Number of interrupt enable/interrupt status registers */
 
 #define INT_NREGS ((NR_IRQS + 31) >> 5)