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Posted to commits@tvm.apache.org by GitBox <gi...@apache.org> on 2021/04/07 08:34:58 UTC

[GitHub] [tvm] zhanghaohit commented on pull request #6126: [VTA][OpenCL] intelfocl

zhanghaohit commented on pull request #6126:
URL: https://github.com/apache/tvm/pull/6126#issuecomment-814720536


   @tmoreau89 @liangfu @vegaluisjose We tried to update the chisel implementation to reflect the new ISA changes, but failed after some trials.
   
   I think it is not trivial to fix it without much knowledge on the chisel implementation. It doesn't work by simply changing some defined constants. Quite a number of codes have to be changed in order to make it consistent.
   
   I think it would be better to open a new PR later to fix the chisel codes. It is ideal that the chisel implementation can kind-of auto-derive the hardware parameters from the vta C++ headers. This restructure of the chisel code needs the help from @vegaluisjose, and is not very related to this PR. 
   
   So I think maybe we disable the tsim test and merge this PR first since the changes in the VTA repo already merged. And open a new PR to fix the chisel implementation. What do you think?
   
   Thanks


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