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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/06/21 07:47:56 UTC
[incubator-nuttx] branch master updated: sdio,stm32h7: fixed an
issue with not starting IDMA data transfer in case of IO_RW_EXTENDED
command (CMD53);
corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending
on block count and for block data transfers ending with STOP_TRANSMISSION
command; stm32_sdio: added more debug messages
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new f7c8875 sdio,stm32h7: fixed an issue with not starting IDMA data transfer in case of IO_RW_EXTENDED command (CMD53); corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count and for block data transfers ending with STOP_TRANSMISSION command; stm32_sdio: added more debug messages
f7c8875 is described below
commit f7c8875fd71899a1a253c983186ea71a55cae884
Author: Alexander Lunev <al...@mail.ru>
AuthorDate: Sun Jun 20 18:10:41 2021 +0300
sdio,stm32h7: fixed an issue with not starting IDMA data transfer in case of IO_RW_EXTENDED command (CMD53);
corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count
and for block data transfers ending with STOP_TRANSMISSION command;
stm32_sdio: added more debug messages
---
arch/arm/src/stm32/stm32_sdio.c | 9 +++++++--
arch/arm/src/stm32h7/hardware/stm32h7x3xx_sdmmc.h | 4 ++--
arch/arm/src/stm32h7/stm32_sdmmc.c | 21 ++++++++++++++++++---
boards/arm/stm32/emw3162/README.txt | 2 +-
drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c | 12 ++++++------
include/nuttx/sdio.h | 7 ++++---
6 files changed, 38 insertions(+), 17 deletions(-)
diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c
index 5c78d79..0ca47da 100644
--- a/arch/arm/src/stm32/stm32_sdio.c
+++ b/arch/arm/src/stm32/stm32_sdio.c
@@ -1232,6 +1232,10 @@ static void stm32_eventtimeout(wdparm_t arg)
DEBUGASSERT((priv->waitevents & SDIOWAIT_TIMEOUT) != 0 ||
priv->wkupevent != 0);
+ mcinfo("sta: %08" PRIx32 " enabled irq: %08" PRIx32 "\n",
+ getreg32(STM32_SDIO_STA),
+ getreg32(STM32_SDIO_MASK));
+
/* Is a data transfer complete event expected? */
if ((priv->waitevents & SDIOWAIT_TIMEOUT) != 0)
@@ -1917,8 +1921,9 @@ static int stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
regval |= cmdidx | SDIO_CMD_CPSMEN;
- mcinfo("cmd: %08" PRIx32 " arg: %08" PRIx32 " regval: %08" PRIx32 "\n",
- cmd, arg, regval);
+ mcinfo("cmd: %08" PRIx32 " arg: %08" PRIx32 " regval: %08" PRIx32
+ " enabled irq: %08" PRIx32 "\n",
+ cmd, arg, regval, getreg32(STM32_SDIO_MASK));
/* Write the SDIO CMD */
diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_sdmmc.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_sdmmc.h
index 41ea213..71a96ac 100644
--- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_sdmmc.h
+++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_sdmmc.h
@@ -119,10 +119,10 @@
#define STM32_SDMMC_DCTRL_DTDIR (1 << 1) /* Bit 1: Data transfer direction */
#define STM32_SDMMC_DCTRL_DTMODE_SHIFT (2) /* Bits 2-3: Data transfer mode */
#define STM32_SDMMC_DCTRL_DTMODE_MASK (3 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
-# define STM32_SDMMC_DCTRL_DTMODE_END (0 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
+# define STM32_SDMMC_DCTRL_DTMODE_BLOCK (0 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
# define STM32_SDMMC_DCTRL_DTMODE_SDIO (1 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
# define STM32_SDMMC_DCTRL_DTMODE_EMMC (2 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
-# define STM32_SDMMC_DCTRL_DTMODE_BLOCK (3 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
+# define STM32_SDMMC_DCTRL_DTMODE_BLKSTOP (3 << STM32_SDMMC_DCTRL_DTMODE_SHIFT)
#define STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT (4) /* Bits 7-4: Data block size */
#define STM32_SDMMC_DCTRL_DBLOCKSIZE_MASK (0xf << STM32_SDMMC_DCTRL_DBLOCKSIZE_SHIFT)
diff --git a/arch/arm/src/stm32h7/stm32_sdmmc.c b/arch/arm/src/stm32h7/stm32_sdmmc.c
index c813eb8..5ba9fa1 100644
--- a/arch/arm/src/stm32h7/stm32_sdmmc.c
+++ b/arch/arm/src/stm32h7/stm32_sdmmc.c
@@ -1128,10 +1128,12 @@ static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
#if defined(HAVE_SDMMC_SDIO_MODE)
if (priv->sdiomode == true)
{
- dctrl |= STM32_SDMMC_DCTRL_SDIOEN | STM32_SDMMC_DCTRL_DTMODE_SDIO;
+ dctrl |= STM32_SDMMC_DCTRL_SDIOEN;
}
#endif
+ dctrl |= STM32_SDMMC_DCTRL_DTMODE_BLOCK;
+
/* if dlen > priv->blocksize we assume that this is a multi-block transfer
* and that the len is multiple of priv->blocksize.
*/
@@ -2250,9 +2252,22 @@ static int stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd,
cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
regval |= cmdidx | STM32_SDMMC_CMD_CPSMEN;
- if (cmd & MMCSD_DATAXFR_MASK)
+ switch (cmd & MMCSD_DATAXFR_MASK)
{
- regval |= STM32_SDMMC_CMD_CMDTRANS;
+ case MMCSD_RDDATAXFR: /* Read block transfer */
+ case MMCSD_WRDATAXFR: /* Write block transfer */
+ case MMCSD_RDSTREAM: /* MMC Read stream */
+ case MMCSD_WRSTREAM: /* MMC Write stream */
+ regval |= STM32_SDMMC_CMD_CMDTRANS;
+ break;
+
+ case MMCSD_NODATAXFR:
+ default:
+ if ((cmd & MMCSD_STOPXFR) != 0)
+ {
+ regval |= STM32_SDMMC_CMD_CMDSTOP;
+ }
+ break;
}
/* Clear interrupts */
diff --git a/boards/arm/stm32/emw3162/README.txt b/boards/arm/stm32/emw3162/README.txt
index 7aaaa9c..d76fa8d 100644
--- a/boards/arm/stm32/emw3162/README.txt
+++ b/boards/arm/stm32/emw3162/README.txt
@@ -21,7 +21,7 @@ Configuring NuttX for the EMW3162 board
$ cd nuttx
$ make apps_distclean
$ make distclean
- $ ./configure.sh emw3162:wlan
+ $ ./tools/configure.sh emw3162:wlan
Configuring NuttX to use your Wireless Router (aka Access Point)
================================================================
diff --git a/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c b/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c
index dc8bef9..e38034a 100644
--- a/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c
+++ b/drivers/wireless/ieee80211/bcm43xxx/mmc_sdio.c
@@ -226,15 +226,15 @@ int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write,
if ((SDIO_CAPABILITIES(dev) & SDIO_CAPS_DMABEFOREWRITE) != 0)
{
SDIO_DMASENDSETUP(dev, buf, blocklen * nblocks);
- SDIO_SENDCMD(dev, SD_ACMD53, arg.value);
+ SDIO_SENDCMD(dev, SD_ACMD53WR, arg.value);
wkupevent = SDIO_EVENTWAIT(dev);
- ret = SDIO_RECVR5(dev, SD_ACMD53, &data);
+ ret = SDIO_RECVR5(dev, SD_ACMD53WR, &data);
}
else
{
- sdio_sendcmdpoll(dev, SD_ACMD53, arg.value);
- ret = SDIO_RECVR5(dev, SD_ACMD53, &data);
+ sdio_sendcmdpoll(dev, SD_ACMD53WR, arg.value);
+ ret = SDIO_RECVR5(dev, SD_ACMD53WR, &data);
SDIO_DMASENDSETUP(dev, buf, blocklen * nblocks);
wkupevent = SDIO_EVENTWAIT(dev);
@@ -244,10 +244,10 @@ int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write,
{
wlinfo("prep read %d\n", blocklen * nblocks);
SDIO_DMARECVSETUP(dev, buf, blocklen * nblocks);
- SDIO_SENDCMD(dev, SD_ACMD53, arg.value);
+ SDIO_SENDCMD(dev, SD_ACMD53RD, arg.value);
wkupevent = SDIO_EVENTWAIT(dev);
- ret = SDIO_RECVR5(dev, SD_ACMD53, &data);
+ ret = SDIO_RECVR5(dev, SD_ACMD53RD, &data);
}
wlinfo("Transaction ends\n");
diff --git a/include/nuttx/sdio.h b/include/nuttx/sdio.h
index 71edb7d..04f4218 100644
--- a/include/nuttx/sdio.h
+++ b/include/nuttx/sdio.h
@@ -199,7 +199,7 @@
# define SD_ACMDIDX52 52 /* IO_RW_DIRECT: (SDIO only)
* -R5 response, 23:16=status 15:8=data */
# define SD_ACMDIDX53 53 /* IO_RW_EXTENDED: (SDIO only)
- * -R5 response, 23:16=status */
+ * -Addressed data transfer command, R5 response, 23:16=status */
/* Response Encodings:
*
@@ -316,8 +316,9 @@
#define SD_ACMD49 (SD_ACMDIDX49 |MMCSD_R1_RESPONSE |MMCSD_NODATAXFR)
#define SD_ACMD51 (SD_ACMDIDX51 |MMCSD_R1_RESPONSE |MMCSD_RDDATAXFR)
#define SD_ACMD52 (SD_ACMDIDX52 |MMCSD_R5_RESPONSE |MMCSD_NODATAXFR)
-#define SD_ACMD52ABRT (SD_ACMDIDX52 |MMCSD_R1_RESPONSE |MMCSD_NODATAXFR|MMCSD_STOPXFR)
-#define SD_ACMD53 (SD_ACMDIDX53 |MMCSD_R5_RESPONSE |MMCSD_NODATAXFR)
+#define SD_ACMD52ABRT (SD_ACMDIDX52 |MMCSD_R1_RESPONSE |MMCSD_NODATAXFR |MMCSD_STOPXFR)
+#define SD_ACMD53RD (SD_ACMDIDX53 |MMCSD_R5_RESPONSE |MMCSD_RDDATAXFR)
+#define SD_ACMD53WR (SD_ACMDIDX53 |MMCSD_R5_RESPONSE |MMCSD_WRDATAXFR)
/* SDIO Card Common Control Registers definitions
* see https://www.sdcard.org/developers/overview/sdio/