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Posted to commits@tvm.apache.org by GitBox <gi...@apache.org> on 2022/04/22 21:28:02 UTC

[GitHub] [tvm] kparzysz-quic opened a new pull request, #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target

kparzysz-quic opened a new pull request, #11105:
URL: https://github.com/apache/tvm/pull/11105

   These options would take effect at the TVM level, much like the LLVM codegen options take effect within LLVM. The current set of options is `emit-asm`, `emit-llvm`, `emit-obj`, and `emit-so`, and each one can take an optional value 0 or 1 (the default is 1). These options determine whether the particular type of output is generated, although options with any other use relevant to code generation (i.e. applicable in `BuildHexagon`) would be appropriate.
   
   Right now, the Hexagon codegen emits both the object code and the assembly text, which runs the LLVM codegen twice (extending compilation time). Even if the LLVM pass pipeline was constructed in a way to allow using different code emitters without repeating the codegen passes, it may still be useful to have control over whether the different types of output are generated or not. The primary motivation of this patch, though, is to reduce time spent in code generation.
   
   There is a plan to change the `hexagon` target to become a variant of the `llvm` target, and this may serve as a use case for some additional options that may be added to `llvm`.


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[GitHub] [tvm] kparzysz-quic commented on pull request #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target

Posted by GitBox <gi...@apache.org>.
kparzysz-quic commented on PR #11105:
URL: https://github.com/apache/tvm/pull/11105#issuecomment-1109775068

   If we wanted to generate the assembly text in `Module::Save`, we'd need to run a codegen pass inside of it.  My line of thought was that `Module` was a purely runtime structure, if we wanted to run LLVM codegen from inside of `HexagonModule`, we'd need to link the LLVM support into the TVM runtime.
   
   When transitioning the `hexagon` target to `llvm`, I'd add something like `--target-options` to `llvm`, and have flags in there that would be specific to Hexagon, that would accomplish what this patch is doing.  This PR was just an interim solution (we were seeing long compilation times in our local tests).


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[GitHub] [tvm] kparzysz-quic commented on pull request #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target

Posted by GitBox <gi...@apache.org>.
kparzysz-quic commented on PR #11105:
URL: https://github.com/apache/tvm/pull/11105#issuecomment-1181860016

   > @kparzysz-quic sorry i missed this for a bit. i agree to be compatible with Artifact we should keep Module simple. I'm ok with this change if you want, or if you want to proceed directly to `llvm` refactor you could do that too. I'm not sure your latest thoughts around that direction.
   
   I'm going with refactoring the llvm target.  Closing this.


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[GitHub] [tvm] kparzysz-quic closed pull request #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target

Posted by GitBox <gi...@apache.org>.
kparzysz-quic closed pull request #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target
URL: https://github.com/apache/tvm/pull/11105


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[GitHub] [tvm] areusch commented on pull request #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target

Posted by GitBox <gi...@apache.org>.
areusch commented on PR #11105:
URL: https://github.com/apache/tvm/pull/11105#issuecomment-1109168340

   thanks @kparzysz-quic for this PR. just a couple thoughts:
   - i think these are all different renderings of a single runtime::Module produced by the `llvm` codegen iiuc. could we potentially avoid adding flags to Target by using `Module::Save`?
   - in the distant future when we might have that [Artifact](https://discuss.tvm.apache.org/t/introduce-artifact-a-container-for-generated-code/11099) refactor, it seems like we could allow a codegen to emit multiple artifacts and not include all of them in an exported library by marking such metadata. just wanted to get your thoughts whether that flow might be compatible with the intended use case for this PR?


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[GitHub] [tvm] areusch commented on pull request #11105: [Hexagon] Introduce TVM code generation flags to Hexagon target

Posted by GitBox <gi...@apache.org>.
areusch commented on PR #11105:
URL: https://github.com/apache/tvm/pull/11105#issuecomment-1130332006

   @kparzysz-quic sorry i missed this for a bit. i agree to be compatible with Artifact we should keep Module simple. I'm ok with this change if you want, or if you want to proceed directly to `llvm` refactor you could do that too. I'm not sure your latest thoughts around that direction.


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