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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2020/08/12 15:09:24 UTC

[GitHub] [incubator-nuttx] fjpanag opened a new pull request #1572: Added options for I-Cache & D-Cache, in STM32F2 & STM32F4.

fjpanag opened a new pull request #1572:
URL: https://github.com/apache/incubator-nuttx/pull/1572


   ## Summary
   STM32F2 & STM32F4 MCUs support instruction & data caches. Previously they were always enabled.  
   Now both features can be enabled individually through Kconfig options.
   
   ## Impact
   Existing system are not affect. New projects however have the option to disable these features.
   
   ## Testing
   Tested on an STM32F427VI, and configuration works as expected.
   Not tested for the STM32F2 family, as I don't have hardware available.
   


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[GitHub] [incubator-nuttx] fjpanag commented on pull request #1572: Added options for I-Cache & D-Cache, in STM32F2 & STM32F4.

Posted by GitBox <gi...@apache.org>.
fjpanag commented on pull request #1572:
URL: https://github.com/apache/incubator-nuttx/pull/1572#issuecomment-672988975


   Also note that this is a feature of ST's FLASH controller, and not a Cortex-M4 feature.


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[GitHub] [incubator-nuttx] raiden00pl commented on pull request #1572: Added options for I-Cache & D-Cache, in STM32F2 & STM32F4.

Posted by GitBox <gi...@apache.org>.
raiden00pl commented on pull request #1572:
URL: https://github.com/apache/incubator-nuttx/pull/1572#issuecomment-673267403


   LGTM


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[GitHub] [incubator-nuttx] raiden00pl merged pull request #1572: Added options for I-Cache & D-Cache, in STM32F2 & STM32F4.

Posted by GitBox <gi...@apache.org>.
raiden00pl merged pull request #1572:
URL: https://github.com/apache/incubator-nuttx/pull/1572


   


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[GitHub] [incubator-nuttx] fjpanag commented on pull request #1572: Added options for I-Cache & D-Cache, in STM32F2 & STM32F4.

Posted by GitBox <gi...@apache.org>.
fjpanag commented on pull request #1572:
URL: https://github.com/apache/incubator-nuttx/pull/1572#issuecomment-672987081


   I am using the STM32F427. Have a look at the reference manual [RM0090](https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&ved=2ahUKEwi_3rnQjZbrAhXJ3YUKHR9LBRMQFjAAegQIBRAB&url=https%3A%2F%2Fwww.st.com%2Fresource%2Fen%2Freference_manual%2Fdm00031020-stm32f405-415-stm32f407-417-stm32f427-437-and-stm32f429-439-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf&usg=AOvVaw2x8tbTRz8d9PfqXBk3qZ74), page 73, section 3.2. Also pages 82-84, section 3.5.2
   
   Please note that these features were already enabled. I just added the option to disable them.


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[GitHub] [incubator-nuttx] davids5 commented on pull request #1572: Added options for I-Cache & D-Cache, in STM32F2 & STM32F4.

Posted by GitBox <gi...@apache.org>.
davids5 commented on pull request #1572:
URL: https://github.com/apache/incubator-nuttx/pull/1572#issuecomment-673002689


   Ahh my bad, you were referring to ART, that is wholly different to the M7 D-CACHE and I-CACHE. Can you Name them as ART or FLASH so this is not confused by others as well?


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