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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/02/25 03:04:15 UTC
[incubator-nuttx] branch master updated: net: fix a few DP83848C
and DP83825I constants
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 3e3af5b net: fix a few DP83848C and DP83825I constants
3e3af5b is described below
commit 3e3af5b73d0fa1aaca1638b0fecb68cb8a1116bf
Author: Byron Ellacott <co...@bje.id.au>
AuthorDate: Wed Feb 24 21:45:20 2021 +1000
net: fix a few DP83848C and DP83825I constants
---
include/nuttx/net/mii.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/nuttx/net/mii.h b/include/nuttx/net/mii.h
index dcf9e35..64ab1f2 100644
--- a/include/nuttx/net/mii.h
+++ b/include/nuttx/net/mii.h
@@ -146,7 +146,7 @@
#define MII_DP83848C_PHYCR 0x19 /* RW PHY Control Register */
#define MII_DP83848C_10BTSCR 0x1a /* RW 10Base-T Status/Control Register */
#define MII_DP83848C_CDCTRL1 0x1b /* RW CD Test Control Register and BIST Extensions Register */
-#define MII_DP83848C_EDCR 0x1e /* RW Energy Detect Control Register */
+#define MII_DP83848C_EDCR 0x1d /* RW Energy Detect Control Register */
/* Texas Instruments DP83825I PHY Extended Registers. */
@@ -156,14 +156,14 @@
#define MII_DP83825I_MISR2 0x13 /* RO MII Interrupt Status Register 2 */
#define MII_DP83825I_FCSCR 0x14 /* RO False Carrier Sense Counter Register */
#define MII_DP83825I_RECR 0x15 /* RO Receive Error Counter Register */
-#define MII_DP83825I_BICSR 0x16 /* RW BIST Control Register */
+#define MII_DP83825I_BISCR 0x16 /* RW BIST Control Register */
#define MII_DP83825I_RCSR 0x17 /* RW RMII and Control and Status Register */
#define MII_DP83825I_LEDCR 0x18 /* RW LED Direct Control Register */
#define MII_DP83825I_PHYCR 0x19 /* RW PHY Control Register */
#define MII_DP83825I_10BTSCR 0x1a /* RW 10Base-T Status/Control Register */
#define MII_DP83825I_BICSR1 0x1b /* RW BIST Control Register 1 */
#define MII_DP83825I_BICSR2 0x1c /* RW BIST Control Register 2 */
-#define MII_DP83825I_LEDCR 0x1e /* RW Energy Detect Control Register */
+#define MII_DP83825I_CDCR 0x1e /* RW Cable Diagnostic Control Register */
#define MII_DP83825I_PHYRCR 0x1f /* RW PHY Reset Control Register */
/* SMSC LAN8720 PHY Extended Registers */