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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/11/08 07:59:30 UTC
[GitHub] [incubator-nuttx] luojia65 commented on pull request #5782: RISC-V: Implement option to run NuttX in supervisor mode (S-mode)
luojia65 commented on PR #5782:
URL: https://github.com/apache/incubator-nuttx/pull/5782#issuecomment-1306777999
> There is one big issue with the spec. IMO, as it does not provide a way to read the timer (mtime) value or the value of mtimecmp. To create an accurate and safe to use ticker both are needed, as there is no way to calculate time in absolute format otherwise. If it was an offset then it would make sense, but it's not. This ABI does not really make any sense to me.
@pussuw at https://github.com/apache/incubator-nuttx/pull/5782#issuecomment-1080247601 : The SBI environment is typically responsible for RISC-V software register `time`. RISC-V registers include two parts, one implemented by RISC-V hardware and the other part defined by software. RISC-V machine environments typically use trap-and-return procedure to emulate software registers. The register `time` is in absolute, meaning that RISC-V supervisor software may read `time` directly, add difference of time and fill it using SBI set_time. Here's some assemble code:
```asm
csrr t0, time ; read time register from SBI environment
li t1, 1000000
add t0, t0, t1 ; calculate the next time it should interrupt supervisor
mv a0, t0
li a6, FUNCTION_SET_TIME
li a7, EXTENSION_TIMER
ecall ; call SBI environment to set timer
```
Similiar software emulated RISC-V register would include CSR `cycle`.
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