You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/09/09 11:11:03 UTC
[incubator-nuttx] branch releases/11.0 updated: xtensa/esp32s3: Fix alignment of FPU registers in exception context
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch releases/11.0
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/releases/11.0 by this push:
new 075316cae5 xtensa/esp32s3: Fix alignment of FPU registers in exception context
075316cae5 is described below
commit 075316cae52473086da967c3d6d5f0d787b1489b
Author: Gustavo Henrique Nihei <gu...@espressif.com>
AuthorDate: Wed Aug 24 17:38:05 2022 -0300
xtensa/esp32s3: Fix alignment of FPU registers in exception context
Signed-off-by: Gustavo Henrique Nihei <gu...@espressif.com>
---
arch/xtensa/include/irq.h | 21 ++++++++++-----------
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h
index 3f5afa43f9..d23a07ae25 100644
--- a/arch/xtensa/include/irq.h
+++ b/arch/xtensa/include/irq.h
@@ -68,6 +68,10 @@
* Pre-processor Definitions
****************************************************************************/
+#ifndef ALIGN_UP
+# define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
+#endif
+
/* IRQ Stack Frame Format. Each value is a uint32_t register index */
#define REG_PC (0) /* Return PC */
@@ -138,18 +142,13 @@
#endif
#if XCHAL_CP_NUM > 0
-# if (XCHAL_TOTAL_SA_ALIGN == 8) && ((_REG_CP_START & 1) == 1)
- /* Fpu first address must align to cp align size. */
-
-# define REG_CP_DUMMY (_REG_CP_START + 0)
-# define XCPTCONTEXT_REGS (_REG_CP_START + 1)
-# else
-# define XCPTCONTEXT_REGS _REG_CP_START
-# endif
-# define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + XTENSA_CP_SA_SIZE + 0x20)
+ /* FPU first address must align to CP align size. */
+
+# define XCPTCONTEXT_REGS ALIGN_UP(_REG_CP_START, XCHAL_TOTAL_SA_ALIGN / 4)
+# define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + XTENSA_CP_SA_SIZE + 0x20)
#else
-# define XCPTCONTEXT_REGS _REG_CP_START
-# define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + 0x20)
+# define XCPTCONTEXT_REGS _REG_CP_START
+# define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + 0x20)
#endif
/****************************************************************************