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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/01/31 15:35:57 UTC
[incubator-nuttx] branch master updated (512676c -> f49a579)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 512676c sched: Don't duplicate caller file handler when creating kernel thread
new 94fb8f4 esp32s3_rom.ld: Lowercase cache related function to comply with nxstyle.
new f49a579 esp32c3/: Remove unused exported variables from ROM and add declaration for the one used.
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c | 6 ------
arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h | 14 +++++++------
.../esp32s2/esp32s2-saola-1/scripts/esp32s2_rom.ld | 24 +++++++++++++++++++++-
.../esp32s3/esp32s3-devkit/scripts/esp32s3_rom.ld | 6 +++---
4 files changed, 34 insertions(+), 16 deletions(-)
[incubator-nuttx] 01/02: esp32s3_rom.ld: Lowercase cache related function to comply with nxstyle.
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 94fb8f4d2a3f03698d7103acd437eb2383b7041e
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Mon Jan 31 13:16:12 2022 +0100
esp32s3_rom.ld: Lowercase cache related function to comply with nxstyle.
Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
.../esp32s2/esp32s2-saola-1/scripts/esp32s2_rom.ld | 24 +++++++++++++++++++++-
.../esp32s3/esp32s3-devkit/scripts/esp32s3_rom.ld | 6 +++---
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/esp32s2_rom.ld b/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/esp32s2_rom.ld
index e430f33..3290eb3 100644
--- a/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/esp32s2_rom.ld
+++ b/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/esp32s2_rom.ld
@@ -45,7 +45,7 @@ PROVIDE ( Cache_Get_Mode = 0x40017ff0 );
PROVIDE ( Cache_Get_Virtual_Addr = 0x40019210 );
PROVIDE ( cache_ibus_mmu_set = 0x40018df4 );
PROVIDE ( Cache_ICache_Preload_Done = 0x4001859c );
-PROVIDE ( Cache_Invalidate_Addr = 0x400182e4 );
+PROVIDE ( cache_invalidate_addr = 0x400182e4 );
PROVIDE ( Cache_Invalidate_DCache_All = 0x4001842c );
PROVIDE ( Cache_Invalidate_DCache_Items = 0x40018208 );
PROVIDE ( cache_invalidate_icache_all = 0x40018420 );
@@ -816,6 +816,28 @@ PROVIDE ( strncpy = 0x40007f20 );
PROVIDE ( strlen = 0x40007e08 );
PROVIDE ( strnlen = 0x4001ae9c );
+/* Rename the SPI Flash data and functions. */
+
+PROVIDE ( g_rom_spiflash_dummy_len_plus = dummy_len_plus);
+PROVIDE ( g_spiflash_chip = SPI_flashchip_data );
+PROVIDE ( spi_flash_config_param = SPIParamCfg );
+PROVIDE ( spi_flash_read = SPIRead );
+PROVIDE ( spi_flash_read_status = SPI_read_status );
+PROVIDE ( spi_flash_read_statushigh = SPI_read_status_high );
+PROVIDE ( spi_flash_read_user_cmd = SPI_user_command_read );
+PROVIDE ( spi_flash_write = SPIWrite );
+PROVIDE ( spi_flash_write_encrypted_disable = SPI_Write_Encrypt_Disable );
+PROVIDE ( spi_flash_write_encrypted_enable = SPI_Write_Encrypt_Enable );
+PROVIDE ( spi_flash_config_clk = SPIClkConfig );
+PROVIDE ( spi_flash_select_qio_pins = SelectSpiQIO );
+PROVIDE ( spi_flash_unlock = SPIUnlock );
+PROVIDE ( spi_flash_erase_sector = SPIEraseSector );
+PROVIDE ( spi_flash_erase_block = SPIEraseBlock );
+PROVIDE ( spi_flash_wait_idle = SPI_Wait_Idle );
+PROVIDE ( spi_flash_config_readmode = SPIReadModeCnfig );
+PROVIDE ( spi_flash_erase_block = SPIEraseBlock );
+PROVIDE ( spi_flash_write_encrypted = SPI_Encrypt_Write );
+
/* Unlike other ROM functions which are exported using PROVIDE, which declares weak symbols,
* these libgcc functions are exported using assignment, which declare strong symbols.
* This is done so that ROM functions are always used instead of the ones provided by libgcc.a.
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/scripts/esp32s3_rom.ld b/boards/xtensa/esp32s3/esp32s3-devkit/scripts/esp32s3_rom.ld
index 7065096..3b7a964 100644
--- a/boards/xtensa/esp32s3/esp32s3-devkit/scripts/esp32s3_rom.ld
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/scripts/esp32s3_rom.ld
@@ -388,7 +388,7 @@ PROVIDE( Cache_Invalidate_DCache_Items = 0x40001680 );
PROVIDE( Cache_Clean_Items = 0x4000168c );
PROVIDE( Cache_WriteBack_Items = 0x40001698 );
PROVIDE( Cache_Op_Addr = 0x400016a4 );
-PROVIDE( Cache_Invalidate_Addr = 0x400016b0 );
+PROVIDE( cache_invalidate_addr = 0x400016b0 );
PROVIDE( Cache_Clean_Addr = 0x400016bc );
PROVIDE( Cache_WriteBack_Addr = 0x400016c8 );
PROVIDE( Cache_Invalidate_ICache_All = 0x400016d4 );
@@ -429,8 +429,8 @@ PROVIDE( Cache_Disable_ICache = 0x4000186c );
PROVIDE( Cache_Enable_ICache = 0x40001878 );
PROVIDE( Cache_Disable_DCache = 0x40001884 );
PROVIDE( Cache_Enable_DCache = 0x40001890 );
-PROVIDE( Cache_Suspend_ICache = 0x4000189c );
-PROVIDE( Cache_Resume_ICache = 0x400018a8 );
+PROVIDE( cache_suspend_icache = 0x4000189c );
+PROVIDE( cache_resume_icache = 0x400018a8 );
PROVIDE( cache_suspend_dcache = 0x400018b4 );
PROVIDE( cache_resume_dcache = 0x400018c0 );
PROVIDE( Cache_Occupy_Items = 0x400018cc );
[incubator-nuttx] 02/02: esp32c3/: Remove unused exported variables from ROM and add declaration for the one used.
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit f49a5797213f2ec3fd348e1826db6e080e7be4d9
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Mon Jan 31 13:20:30 2022 +0100
esp32c3/: Remove unused exported variables from ROM and add declaration
for the one used.
---
arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c | 6 ------
arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h | 14 ++++++++------
2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c b/arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c
index 68dc75d..36fae3c 100644
--- a/arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c
+++ b/arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c
@@ -103,12 +103,6 @@ static int esp32c3_ioctl(struct mtd_dev_s *dev, int cmd,
unsigned long arg);
/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-extern const struct spiflash_legacy_data_s *rom_spiflash_legacy_data;
-
-/****************************************************************************
* Private Data
****************************************************************************/
diff --git a/arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h b/arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h
index ca6bfe0..aa5a87f 100644
--- a/arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h
+++ b/arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h
@@ -989,7 +989,8 @@ int spi_flash_erase_range(uint32_t start_address, uint32_t size);
*
* Returned Values:
* Return true if both CPUs have flash cache enabled, false otherwise.
- */
+ *
+ *****************************************************************************/
bool spi_flash_cache_enabled(void);
@@ -1001,15 +1002,16 @@ bool spi_flash_cache_enabled(void);
*
* Parameters:
* cpuid - core number to enable instruction cache for.
- */
+ *
+ *****************************************************************************/
void spi_flash_enable_cache(uint32_t cpuid);
-/* Global esp32c3_spiflash_chip_t structure used by ROM functions */
-
-extern esp32c3_spiflash_chip_t g_rom_flashchip;
+/*****************************************************************************
+ * Public Data
+ *****************************************************************************/
-extern uint8_t g_rom_spiflash_dummy_len_plus[];
+extern const struct spiflash_legacy_data_s *rom_spiflash_legacy_data;
#ifdef __cplusplus
}