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Posted to commits@nuttx.apache.org by ar...@apache.org on 2025/02/07 12:21:24 UTC
(nuttx) branch master updated (9754fdf63c -> 6dbb2edd2c)
This is an automated email from the ASF dual-hosted git repository.
archer pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
from 9754fdf63c mps/mps3-an547: correct command line of genromfs
new 22f2d39e21 arch/zynq-mpsoc improve the ethernet driver 1. Changes the phyadd to 0xC to speed up the training of phyadd. 2. Set RX DMA buffer size configureable. 3. Create netnsh configs as ethernet boot from QSPI FLASH. 4. Fix some typo in #15720 which is nonsynchronous with local code.
new 6dbb2edd2c Documentation:add documentation about ethernet for Zynq MPSoC and ZCU111 This commit add documentation Description for ZYNQ-MPSOC's NET driver key features and ethernet config of ZCU111.
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.../arm64/zynq-mpsoc/boards/zcu111/index.rst | 43 ++++++++++++++++++++++
Documentation/platforms/arm64/zynq-mpsoc/index.rst | 33 ++++++++++++++++-
arch/arm64/src/zynq-mpsoc/Kconfig | 10 +++++
arch/arm64/src/zynq-mpsoc/zynq_boot.c | 7 ----
arch/arm64/src/zynq-mpsoc/zynq_enet.c | 16 ++++++--
.../zcu111/configs/{net => netjtag}/defconfig | 26 ++++++++++---
.../zcu111/configs/{net => netnsh}/defconfig | 36 +++++++++++-------
boards/arm64/zynq-mpsoc/zcu111/src/Makefile | 4 ++
8 files changed, 145 insertions(+), 30 deletions(-)
copy boards/arm64/zynq-mpsoc/zcu111/configs/{net => netjtag}/defconfig (79%)
rename boards/arm64/zynq-mpsoc/zcu111/configs/{net => netnsh}/defconfig (76%)
(nuttx) 01/02: arch/zynq-mpsoc improve the ethernet driver 1. Changes the phyadd to 0xC to speed up the training of phyadd. 2. Set RX DMA buffer size configureable. 3. Create netnsh configs as ethernet boot from QSPI FLASH. 4. Fix some typo in #15720 which is nonsynchronous with local code.
Posted by ar...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
archer pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 22f2d39e2152f38878b2952a07dd9ac76bac2878
Author: zouboan <zo...@hotmail.com>
AuthorDate: Wed Feb 5 21:50:52 2025 +0800
arch/zynq-mpsoc improve the ethernet driver
1. Changes the phyadd to 0xC to speed up the training of phyadd.
2. Set RX DMA buffer size configureable.
3. Create netnsh configs as ethernet boot from QSPI FLASH.
4. Fix some typo in #15720 which is nonsynchronous with local code.
---
arch/arm64/src/zynq-mpsoc/Kconfig | 10 ++++++
arch/arm64/src/zynq-mpsoc/zynq_boot.c | 7 -----
arch/arm64/src/zynq-mpsoc/zynq_enet.c | 16 +++++++---
.../zcu111/configs/{net => netjtag}/defconfig | 26 +++++++++++++---
.../zcu111/configs/{net => netnsh}/defconfig | 36 ++++++++++++++--------
boards/arm64/zynq-mpsoc/zcu111/src/Makefile | 4 +++
6 files changed, 70 insertions(+), 29 deletions(-)
diff --git a/arch/arm64/src/zynq-mpsoc/Kconfig b/arch/arm64/src/zynq-mpsoc/Kconfig
index 128cf1b100..70bad2c1a8 100644
--- a/arch/arm64/src/zynq-mpsoc/Kconfig
+++ b/arch/arm64/src/zynq-mpsoc/Kconfig
@@ -86,6 +86,16 @@ config ZYNQ_GMAC_NTXBUFFERS
that can be in flight. This is also equal to the number of TX
descriptors that will be allocated.
+config ZYNQ_GMAC_RXDMA_BUFSIZE
+ int "RX DMA buffer size"
+ default 128
+ range 64 10240
+ ---help---
+ DMA receive buffer size in external AMBA (AHB/AXI) system memory.
+ The value defined by these bits determines the size of buffer to
+ use in main system memory when writing received data. The value
+ must be defined as multiples of 64 bytes, i.e. 64, 128, 256...
+
config ZYNQ_GMAC_PREALLOCATE
bool "Preallocate buffers"
default n
diff --git a/arch/arm64/src/zynq-mpsoc/zynq_boot.c b/arch/arm64/src/zynq-mpsoc/zynq_boot.c
index 0580e37939..c2d3ff753d 100644
--- a/arch/arm64/src/zynq-mpsoc/zynq_boot.c
+++ b/arch/arm64/src/zynq-mpsoc/zynq_boot.c
@@ -203,10 +203,3 @@ void arm64_chip_boot(void)
up_perf_init((void *)CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
#endif
}
-
-#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT)
-void arm64_netinitialize(void)
-{
- /* TODO: Support net initialize */
-}
-#endif
diff --git a/arch/arm64/src/zynq-mpsoc/zynq_enet.c b/arch/arm64/src/zynq-mpsoc/zynq_enet.c
index 135dd833de..e74e8a5d6e 100644
--- a/arch/arm64/src/zynq-mpsoc/zynq_enet.c
+++ b/arch/arm64/src/zynq-mpsoc/zynq_enet.c
@@ -99,8 +99,8 @@
/* GMAC buffer sizes, number of buffers, and number of descriptors. *********/
-#define GMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */
-#define GMAC_TX_UNITSIZE CONFIG_NET_ETH_PKTSIZE /* MAX size for Ethernet packet */
+#define GMAC_RX_UNITSIZE CONFIG_ZYNQ_GMAC_RXDMA_BUFSIZE /* DMA buffer size for receive */
+#define GMAC_TX_UNITSIZE CONFIG_NET_ETH_PKTSIZE /* MAX size for Ethernet packet */
/* The MAC can support frame lengths up to 1536 bytes */
@@ -3551,8 +3551,8 @@ static int zynq_gmac_configure(struct zynq_gmac_s *priv)
* IRXER = 0 : Disable ignore IPG GXER
*/
- regval = GMAC_NCFGR_FD | GMAC_NCFGR_GBE |
- GMAC_NCFGR_CLK_DIV64 | GMAC_NCFGR_DBW_64;
+ regval = GMAC_NCFGR_FD | GMAC_NCFGR_GBE | GMAC_NCFGR_PEN |
+ GMAC_NCFGR_RFCS | GMAC_NCFGR_CLK_DIV64 | GMAC_NCFGR_DBW_64;
#ifdef CONFIG_NET_PROMISCUOUS
regval |= GMAC_NCFGR_CAF;
@@ -3568,6 +3568,14 @@ static int zynq_gmac_configure(struct zynq_gmac_s *priv)
regval = zynq_getreg(priv, ZYNQ_GMAC_DCFGR);
+ /* DMA receive buffer size in external AMBA (AHB/AXI) system memory */
+
+ regval &= ~GMAC_DCFGR_DRBS_MASK;
+
+ /* The value is defined in multiples of 64 bytes */
+
+ regval |= GMAC_DCFGR_DRBS(GMAC_RX_UNITSIZE / 64);
+
regval &= ~GMAC_DCFGR_ESPA;
#ifdef CDNS_TX_CSUM_OFFLOAD
diff --git a/boards/arm64/zynq-mpsoc/zcu111/configs/net/defconfig b/boards/arm64/zynq-mpsoc/zcu111/configs/netjtag/defconfig
similarity index 79%
copy from boards/arm64/zynq-mpsoc/zcu111/configs/net/defconfig
copy to boards/arm64/zynq-mpsoc/zcu111/configs/netjtag/defconfig
index 301bf6fff8..23732710be 100644
--- a/boards/arm64/zynq-mpsoc/zcu111/configs/net/defconfig
+++ b/boards/arm64/zynq-mpsoc/zcu111/configs/netjtag/defconfig
@@ -48,18 +48,33 @@ CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=9192
CONFIG_NET=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=4
+CONFIG_NETDB_DNSSERVER_NOADDR=y
+CONFIG_NETINIT_DRIPADDR=0xc0a80002
+CONFIG_NETINIT_IPADDR=0xc0a8000f
CONFIG_NETINIT_NOMAC=y
+CONFIG_NETUTILS_CODECS=y
CONFIG_NETUTILS_IPERF=y
-CONFIG_NET_BINDTODEVICE=y
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NETUTILS_TFTPC=y
+CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
+CONFIG_NET_ETH_PKTSIZE=1500
CONFIG_NET_ICMP_SOCKET=y
-CONFIG_NET_NETLINK=y
-CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_LL_GUARDSIZE=32
+CONFIG_NET_MAX_LISTENPORTS=8
+CONFIG_NET_RECV_BUFSIZE=32768
+CONFIG_NET_SENDFILE=y
+CONFIG_NET_SOLINGER=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
-CONFIG_NET_TCPPROTO_OPTIONS=y
-CONFIG_NET_TIMESTAMP=y
+CONFIG_NET_TCPBACKLOG=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_KEEPALIVE=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
+CONFIG_NET_UDP_WRITE_BUFFERS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
@@ -93,3 +108,4 @@ CONFIG_USERLED_LOWER=y
CONFIG_ZYNQ_ENET=y
CONFIG_ZYNQ_GMAC_NRXBUFFERS=256
CONFIG_ZYNQ_GMAC_NTXBUFFERS=256
+CONFIG_ZYNQ_GMAC_PHYADDR=12
diff --git a/boards/arm64/zynq-mpsoc/zcu111/configs/net/defconfig b/boards/arm64/zynq-mpsoc/zcu111/configs/netnsh/defconfig
similarity index 76%
rename from boards/arm64/zynq-mpsoc/zcu111/configs/net/defconfig
rename to boards/arm64/zynq-mpsoc/zcu111/configs/netnsh/defconfig
index 301bf6fff8..b12abead1c 100644
--- a/boards/arm64/zynq-mpsoc/zcu111/configs/net/defconfig
+++ b/boards/arm64/zynq-mpsoc/zcu111/configs/netnsh/defconfig
@@ -5,10 +5,8 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
-# CONFIG_DEBUG_OPT_UNUSED_SECTIONS is not set
CONFIG_ARCH="arm64"
CONFIG_ARCH_ARM64=y
-CONFIG_ARCH_ARM64_EXCEPTION_LEVEL=3
CONFIG_ARCH_BOARD="zcu111"
CONFIG_ARCH_BOARD_ZCU111=y
CONFIG_ARCH_CHIP="zynq-mpsoc"
@@ -18,22 +16,19 @@ CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_ARM64_DCACHE_DISABLE=y
CONFIG_ARM64_GIC_VERSION=2
CONFIG_ARM64_ICACHE_DISABLE=y
+CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=116524
-CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_IRQ=y
CONFIG_DEBUG_IRQ_INFO=y
-CONFIG_DEBUG_NET=y
-CONFIG_DEBUG_NET_ERROR=y
-CONFIG_DEBUG_NET_WARN=y
CONFIG_DEBUG_SCHED=y
CONFIG_DEBUG_SCHED_ERROR=y
CONFIG_DEBUG_SCHED_INFO=y
CONFIG_DEBUG_SCHED_WARN=y
CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEBUG_SYMBOLS_LEVEL="-g3"
CONFIG_DEFAULT_TASK_STACKSIZE=8192
CONFIG_ETC_ROMFS=y
CONFIG_EXAMPLES_HELLO=y
@@ -48,18 +43,33 @@ CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=9192
CONFIG_NET=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDB_DNSCLIENT_ENTRIES=4
+CONFIG_NETDB_DNSSERVER_NOADDR=y
+CONFIG_NETINIT_DRIPADDR=0xc0a80002
+CONFIG_NETINIT_IPADDR=0xc0a8000f
CONFIG_NETINIT_NOMAC=y
+CONFIG_NETUTILS_CODECS=y
CONFIG_NETUTILS_IPERF=y
-CONFIG_NET_BINDTODEVICE=y
+CONFIG_NETUTILS_TELNETD=y
+CONFIG_NETUTILS_TFTPC=y
+CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
+CONFIG_NET_ETH_PKTSIZE=1500
CONFIG_NET_ICMP_SOCKET=y
-CONFIG_NET_NETLINK=y
-CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_LL_GUARDSIZE=32
+CONFIG_NET_MAX_LISTENPORTS=8
+CONFIG_NET_RECV_BUFSIZE=32768
+CONFIG_NET_SENDFILE=y
+CONFIG_NET_SOLINGER=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
-CONFIG_NET_TCPPROTO_OPTIONS=y
-CONFIG_NET_TIMESTAMP=y
+CONFIG_NET_TCPBACKLOG=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_KEEPALIVE=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
+CONFIG_NET_UDP_WRITE_BUFFERS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
@@ -81,7 +91,6 @@ CONFIG_START_MONTH=11
CONFIG_START_YEAR=2022
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_SYSTEM=y
CONFIG_SYSTEM_TIME64=y
CONFIG_TESTING_GETPRIME=y
@@ -93,3 +102,4 @@ CONFIG_USERLED_LOWER=y
CONFIG_ZYNQ_ENET=y
CONFIG_ZYNQ_GMAC_NRXBUFFERS=256
CONFIG_ZYNQ_GMAC_NTXBUFFERS=256
+CONFIG_ZYNQ_GMAC_PHYADDR=12
diff --git a/boards/arm64/zynq-mpsoc/zcu111/src/Makefile b/boards/arm64/zynq-mpsoc/zcu111/src/Makefile
index 252de5d0f7..a0eacd701e 100644
--- a/boards/arm64/zynq-mpsoc/zcu111/src/Makefile
+++ b/boards/arm64/zynq-mpsoc/zcu111/src/Makefile
@@ -38,6 +38,10 @@ ifeq ($(CONFIG_USERLED),y)
CSRCS += zcu111_userleds.c
endif
+ifeq ($(CONFIG_NET),y)
+CSRCS += zcu111_ethernet.c
+endif
+
ifeq ($(CONFIG_ETC_ROMFS),y)
RCSRCS = etc/init.d/rc.sysinit etc/init.d/rcS
endif
(nuttx) 02/02: Documentation:add documentation about ethernet for Zynq MPSoC and ZCU111 This commit add documentation Description for ZYNQ-MPSOC's NET driver key features and ethernet config of ZCU111.
Posted by ar...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
archer pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 6dbb2edd2c06993a2ef5b7d8c2127f03d1f58e74
Author: zouboan <zo...@hotmail.com>
AuthorDate: Thu Feb 6 16:17:53 2025 +0800
Documentation:add documentation about ethernet for Zynq MPSoC and ZCU111
This commit add documentation Description for ZYNQ-MPSOC's NET driver key
features and ethernet config of ZCU111.
---
.../arm64/zynq-mpsoc/boards/zcu111/index.rst | 43 ++++++++++++++++++++++
Documentation/platforms/arm64/zynq-mpsoc/index.rst | 33 ++++++++++++++++-
2 files changed, 75 insertions(+), 1 deletion(-)
diff --git a/Documentation/platforms/arm64/zynq-mpsoc/boards/zcu111/index.rst b/Documentation/platforms/arm64/zynq-mpsoc/boards/zcu111/index.rst
index 797e7b90f6..b22294d3ec 100644
--- a/Documentation/platforms/arm64/zynq-mpsoc/boards/zcu111/index.rst
+++ b/Documentation/platforms/arm64/zynq-mpsoc/boards/zcu111/index.rst
@@ -60,6 +60,37 @@ LEDs and Buttons
The PS-side pushbutton SW19 is connected to MIO22 (pin U1.Y28). The PS-side LED DS50,
which is physically placed adjacent to the pushbutton, is connected to MIO23(pin U1.U29).
+Networking
+==========
+
+The ZCU111 board uses the TI DP83867IRPAP Ethernet RGMII PHY for Ethernet communications
+at 10 Mb/s, 100 Mb/s, or 1000 Mb/s. The board supports RGMII mode only. The PHY connection
+to a user-provided Ethernet cable is through a RJ-45 connector with built-in magnetics.
+The Ethernet connections from XCZU28DR to the DP83867 PHY device at are listed in fllowing:
+
+=== ================== === =============
+Pin XCZU28DR Name Pin DP83867 Name
+=== ================== === =============
+J32 MIO65_ENET_TX_D0 38 TX_DO
+J34 MIO66_ENET_TX_D1 37 TX_D1
+K28 MIO67_ENET_TX_D2 36 TX_D2
+K29 MIO68_ENET_TX_D3 35 TX_D3
+K30 MIO69_ENET_TX_CTRL 52 TX_EN_TX_CTRL
+K31 MIO70_ENET_RX_CLK 43 RX_CLK
+K32 MIO71_ENET_RX_D0 44 RX_DO
+K33 MIO72_ENET_RX_D1 45 RX_D1
+K34 MIO73_ENET_RX_D2 46 RX_D2
+L29 MIO74_ENET_RX_D3 47 RX_D3
+L30 MIO75_ENET_RX_CTRL 53 RX_DV_RX_CTRL
+L33 MIO76_ENET_MDC 20 MDC
+L34 MIO77_ENET_MDIO 21 MDIO
+=== ================== === =============
+
+Networking is supported via GEM3. DHCP is not used in this configuration; rather, a hard-coded
+IP address of 192.168.0.15 is used with a netmask of 255.255.255.0. The host is assumed to
+be 192.168.0.101 in places. You can reconfigure to enabled DHCPC or to change these addresses
+as you see fit.
+
Configurations
==============
@@ -83,6 +114,18 @@ zynqmp_fsbl.elf, zynqmp_pmufw.elf, bl31.elf and nuttx.elf in Vivado SDK or XSCT
shell. Also we need copy BOOT.BIN into SD Card(in SD card boot mode) or Flash it
into the QSPI FLASH(in QSPI boot mode).
+netjtag
+-------
+
+This is a network enabled configuration based on the NuttShell (NSH) for JTAG boot mode
+
+netnsh
+------
+
+This is a network enabled configuration based on the NuttShell (NSH). We need create boot
+image with zynqmp_fsbl.elf, zynqmp_pmufw.elf, bl31.elf and nuttx.elf in Vivado SDK or XSCT
+shell. Also we need Flash BOOT.BIN intothe QSPI FLASH(in QSPI boot mode).
+
ARM64 Toolchain
===============
diff --git a/Documentation/platforms/arm64/zynq-mpsoc/index.rst b/Documentation/platforms/arm64/zynq-mpsoc/index.rst
index e254e9eaa6..a1d31cd577 100644
--- a/Documentation/platforms/arm64/zynq-mpsoc/index.rst
+++ b/Documentation/platforms/arm64/zynq-mpsoc/index.rst
@@ -20,7 +20,7 @@ MIO Yes
EMIO Yes Depending on PL
I2C No
CAN No
-NET No
+NET Yes GEM3
SPI No
QSPI No
TIMER NO
@@ -63,6 +63,37 @@ number of interrupts which may be undesirable.
UART can be configured/operated using ``zynq_uart_*`` functions. Both receive and
transmit can be operated in interrupt mode and polling mode.
+ETHERNET
+--------
+
+The gigabit Ethernet controller (GEM) implements a 10/100/1000 Mb/s Ethernet MAC that
+is compatible with the IEEE Standard for Ethernet (IEEE Std 802.3-2008) and capable of
+operating in either half or full-duplex mode in 10/100 mode and full-duplex in 1000 mode.
+The processing system (PS) is equipped with four gigabit Ethernet controllers. Each
+controller can be configured independently. Each controller uses a reduced gigabit media
+independent interface (RGMII) v2.0. Each GEM controller provides management data
+input/output (MDIO) interfaces for PHY management. Key features of the NET driver are
+summarized as follows:
+
+- Configurable MAC.
+ - Configurable DMA receive buffer size.
+ - Configurable transmit packet size.
+ - Configurable TX and RX buffer number.
+ - Preallocate or malloc TX and RX buffer.
+- Configurable PHY.
+ - MDIO phy read and write interface.
+ - Configurable phy address.
+ - PHY autonegotiation to determine speed and mode.
+ - Board support phy initialize.
+- Configurable ethernet 1,2,3,4.
+- Configurable ethernet speed 10M,100M,1000M.
+
+Access to the programmable logic (PL) is through the EMIO which provides the gigabit
+media independent interface (GMII). Other Ethernet communications interfaces can be
+created in the PL using the GMII available on the EMIO interface. GEM supports the serial
+gigabit media-independent interface (SGMII, 1000BASE-SX, and 1000BASE-LX) at 1000
+Mb/s using the PS-GTR interface.
+
Psci and debug
--------------